Commit graph

950 commits

Author SHA1 Message Date
Holger Hans Peter Freyther
03414ac45e gpio: Build the da8xx_gpio code for the davinci644x device
The differences include the number of GPIOs and that one is
not required to set the pinmux on request.

Signed-off-by: Holger Hans Peter Freyther <holger@freyther.de>
2013-02-20 08:52:41 -05:00
Tom Rini
951c6baaf4 Merge branch 'master' of git://git.denx.de/u-boot-arm 2013-02-12 10:18:31 -05:00
Tom Warren
2fc65e2834 Tegra114: Add arch-tegra114 include files
Common Tegra files are in arch-tegra, shared between T20/T30/T114.
Tegra114-specific headers are in arch-tegra114. Note that some of
these will be filled in as more T114 support is added (drivers,
WB/LP0 support, etc.).

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-02-11 10:35:25 -07:00
Allen Martin
b19f57491a tegra: add SPI SLINK driver
Add driver for tegra SPI "SLINK" style driver.  This controller is
similar to the tegra20 SPI "SFLASH" controller.  The difference is
that the SLINK controller is a genernal purpose SPI controller and the
SFLASH controller is special purpose and can only talk to FLASH
devices.  In addition there are potentially many instances of an SLINK
controller on tegra and only a single instance of SFLASH.  Tegra20 is
currently ths only version of tegra that instantiates an SFLASH
controller.

This driver supports basic PIO mode of operation and is configurable
(CONFIG_OF_CONTROL) to be driven off devicetree bindings.  Up to 4
devices per controller may be attached, although typically only a
single chip select line is exposed from tegra per controller so in
reality this is usually limited to 1.

To enable this driver, use CONFIG_TEGRA_SLINK

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-02-11 10:35:25 -07:00
Allen Martin
91673e2adf tegra: add addresses of SPI SLINK controllers
Add I/O addresses of SPI SLINK controllers 1-6

Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-02-11 10:35:24 -07:00
Stephen Warren
4727a13bde tegra: rename FUNCMUX_UART2_UARTB
FUNCMUX_ defines should be named after the pin groups they affect, not
after the module they're muxing onto those pin groups.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-02-11 10:35:24 -07:00
Tom Warren
f29f086a09 Tegra: Move common clock code to arch/arm/cpu/tegra-common/clock.c
This 'commonizes' much of the clock/pll code. SoC-dependent code
and tables are left in arch/cpu/tegraXXX-common/clock.c

Some T30 tables needed whitespace fixes due to checkpatch complaints.

Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-02-11 10:35:24 -07:00
Tom Warren
d83152d8e4 Tegra: T20: Remove unused 'SLOW' SoC ID and PLLX table entry
Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-02-11 10:35:23 -07:00
Jeff Lance
13526f7157 Add DDR3 support for AM335x-EVM (Version 1.5A)
AM335x EVM 1.5A uses Micron MT41J512M8RH-125 SDRAM 4Gb (512Mx8) as the
DDR3 chip.

[Hebbar Gururaja <gururaja.hebbar@ti.com>]
	- Resolve merge conflict while rebasing. File structure is
	  changed in the mainline. So re-arrange the code accordingly.
	- Update commit message to reflect the DDR3 part number

Signed-off-by: Jeff Lance <j-lance1@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
Signed-off-by: Hebbar Gururaja <gururaja.hebbar@ti.com>
2013-02-07 10:36:26 -05:00
Lars Poeschel
1c1b7c3739 pcm051: Add support for Phytec phyCORE-AM335x
The board is named pcm051 and has this hardware:
SOC: TI AM3359
DDR3-RAM: 2x MT41J256M8HX-15EIT:D 512MiB
ETH 1: LAN8710AI
SPI-Flash: W25Q64BVSSIG
RTC: RV-4162-C7
I2C-EEPROM: CAT32WC32
NAND: MT29F4G08_VFPGA63
PMIC: TPS65910A3
LCD

Supported:
UART 1
MMC/SD
ETH 1
USB
I2C
SPI

Not yet supported:
NAND
RTC
LCD

Signed-off-by: Lars Poeschel <poeschel@lemonage.de>
[trini: Add #define CONFIG_PHY_ADDR 0 to config]
Signed-off-by: Tom Rini <trini@ti.com>
2013-02-07 10:36:26 -05:00
Lars Poeschel
aca0b8b4f7 am33xx: add a pulldown macro to pinmux config
Signed-off-by: Lars Poeschel <poeschel@lemonage.de>
2013-02-07 10:36:25 -05:00
Simon Glass
baa1e53683 arm: Use generic global_data
Signed-off-by: Simon Glass <sjg@chromium.org>
2013-02-04 09:05:45 -05:00
Simon Glass
e9adeca3fc ppc: arm: Move sdhc_clk into arch_global_data
This is used by both powerpc and arm, but I think it still qualifies as
architecture-specific.

Signed-off-by: Simon Glass <sjg@chromium.org>
2013-02-04 09:05:44 -05:00
Rob Herring
2ff467c051 ARM: add wfi assembly macro
Since wfi instruction is only available on ARMv7, add a conditional
macro for it.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
2013-02-03 14:43:58 +01:00
Albert ARIBAUD
e5f5c4a977 Merge branch 'u-boot-imx/master' into 'u-boot-arm/master' 2013-02-02 19:29:59 +01:00
Simon Glass
34fd5d253d arm: Move tlb_addr and tlb_size to arch_global_data
Move these fields into arch_global_data and tidy up.

Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Address tlb_size in this patch as well]
Signed-off-by: Tom Rini <trini@ti.com>
2013-02-01 15:21:58 -05:00
Simon Glass
b4d51db86b ixp: Move timestamp to arch_global_data
Move this field into arch_global_data and tidy up.

Signed-off-by: Simon Glass <sjg@chromium.org>
2013-02-01 15:07:50 -05:00
Simon Glass
5f70714c2f arm: Move timer_reset_value to arch_global_data
Move this field into arch_global_data and tidy up.

Signed-off-by: Simon Glass <sjg@chromium.org>
2013-02-01 15:07:50 -05:00
Simon Glass
582601da2f arm: Move lastinc to arch_global_data
Move this field into arch_global_data and tidy up.

Signed-off-by: Simon Glass <sjg@chromium.org>
2013-02-01 15:07:50 -05:00
Simon Glass
66ee692347 arm: Move tbl to arch_global_data
Move this field into arch_global_data and tidy up.

Signed-off-by: Simon Glass <sjg@chromium.org>
2013-02-01 15:07:50 -05:00
Simon Glass
8ff43b03e9 arm: Move tbu to arch_global_data
Move this field into arch_global_data and tidy up.

Signed-off-by: Simon Glass <sjg@chromium.org>
2013-02-01 15:07:50 -05:00
Simon Glass
b339051c0d arm: Move timer_rate_hz into arch_global_data
Move this field into arch_global_data and tidy up.

Signed-off-by: Simon Glass <sjg@chromium.org>
2013-02-01 15:07:49 -05:00
Simon Glass
f47e6ecd5d at91: Move at91 global data into arch_global_data
Move these fields into arch_global_data.

Signed-off-by: Simon Glass <sjg@chromium.org>
2013-02-01 15:07:49 -05:00
Simon Glass
5cb48582ac Add architecture-specific global data
We plan to move architecture-specific data into a separate structure so
that we can make the rest of it common.

As a first step, create struct arch_global_data to hold these fields.
Initially it is empty.

This patch applies to all archs at once. I can split it if this is really
a pain.

Signed-off-by: Simon Glass <sjg@chromium.org>
2013-02-01 15:07:49 -05:00
Marek Vasut
90bc2bf297 mxs: mmc: Allow overriding default card detect implementation
Some MXS based boards do not implement the card-detect signal. Allow
user to specify alternate card-detect implementation.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
2013-01-28 11:43:01 +01:00
Marek Vasut
f3801e2b9b mxs: ssp: Add SSP registers map for MX23
The MX23 SSP register layout differs from MX28 in certain bits,
adjust the register layout accordingly.

Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
2013-01-28 11:43:01 +01:00
Marek Vasut
0e5c05efb4 mxs: dma: Fix APBH DMA driver for MX23
The MX23 has less channels for the APBH DMA, sligtly different register
layout and some bits in those registers are placed differently. Reflect
this in the driver. This patch fixes MMC/DMA issue on MX23.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
2013-01-28 11:43:00 +01:00
Otavio Salvador
0023997709 mxs: Add MX23 quirks into the clock code
The MX23 has different handling of the SSP clock and GPMI NAND clock sources,
add necessary quirks into the clock code to properly handle these.

Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
2013-01-21 12:05:22 +01:00
Otavio Salvador
a8b2884d94 mx23: Add boot mode description
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
2013-01-21 12:05:21 +01:00
Otavio Salvador
f69077e420 mx23: Add support on print_cpuinfo()
Add information to identify i.MX23 chips and its known revisions.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2013-01-21 12:05:20 +01:00
Marek Vasut
95e873d601 mx23: ssp: Fix ssp-regs.h for MX23
Disable SSP2 and SSP3 ports on MX23.

Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
2013-01-21 12:05:20 +01:00
Marek Vasut
06dc8160a0 mx23: Add POWER and CLKCTRL register definitions
Add register definitions for the i.MX23 power control block and
clock control block. These are essential for the basic bootstrap
of the i.MX23. Also, properly include them in imx-regs.h .

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
2013-01-21 12:05:20 +01:00
Otavio Salvador
180f47a8df mx23: Add iomux-mx23.h
This has been copied from Linux source at revision 786f02b719f.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2013-01-21 12:05:20 +01:00
Otavio Salvador
3fd7f365e1 mx23: Add register base addresses
This adds the base addresses of i.MX23 and easy the detection of wrong
order in board setup, in case no SoC has been set, an error is raised
during build.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2013-01-21 12:05:20 +01:00
Otavio Salvador
bf48fcb61b mxs: clock: Use 'mxs' prefix for methods
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2013-01-21 12:05:20 +01:00
Marek Vasut
14e26bcfa7 mxs: ssp: Pull out the SSP bus to regs conversion
Create function which converts SSP bus number to SSP register pointer.
This functionality is reimplemented multiple times in the code, thus
make one common implementation. Moreover, make it a switch(), since the
SSP ports are not mapped in such nice linear fashion on MX23, therefore
having it a switch will simplify things there.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Andy Fleming <afleming@freescale.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
2013-01-21 12:05:19 +01:00
Allen Martin
d08b9e9c7e tegra: remove IRDA pinmux synonym
IRDA is a synonym for UARTB in tegra pinmux, remove all usage of this
synonym and replace with UARTB to disambiguate.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-01-16 13:40:08 -07:00
Tom Warren
619bd99e5c Tegra30: clocks: Fix clock tables for I2C and other periphs
Add 16-bit divider support (I2C) to periph table, annotate and
correct some entries, and fix clk_id lookup function.

Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-01-16 13:40:08 -07:00
Tom Warren
b2871037d2 Tegra30: Add common CPU (shared) files
These files are used by both SPL and main U-Boot.
Also made minor changes to shared Tegra code to support
T30 differences.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-01-16 13:40:07 -07:00
Tom Warren
dc89ad1438 Tegra30: Add arch-tegra30 include files
Common Tegra files are in arch-tegra, shared between T20 and T30.
Tegra30-specific headers are in arch-tegra30. Note that some of
these will be filled in as more T30 support is added (drivers,
WB/LP0 support, etc.). A couple of Tegra20 files were changed
to support common headers in arch-tegra, also.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
2013-01-16 13:40:07 -07:00
Marc Dietrich
716d943983 tegra: display: add board pinmux
Boards may require a different pinmux setup for DISPALY than the default one.
Add a way to call into board specific code to set this up.

Signed-off-by: Marc Dietrich <marvin24@gmx.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-01-16 13:40:07 -07:00
Albert ARIBAUD
a17617d655 Merge branch 'u-boot-imx/master' into 'u-boot-arm/master' 2013-01-14 17:00:02 +01:00
Albert ARIBAUD
1199c377cf Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master' 2013-01-14 15:21:00 +01:00
Troy Kisky
abbab70363 mx31/mx35/mx51/mx53/mx6: add watchdog
Use a common watchdog driver for all these cpus.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2013-01-13 11:39:57 +01:00
Jaehoon Chung
c39e969e8e Exynos: clock: support get_mmc_clk for exynos
To get exactly clock value for mmc, support the get_mmc_clk() like
set_mmc_clk().

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-01-11 16:56:31 +09:00
Gabe Black
724cdffca1 arm: Keep track of the tlb size as well as its location
It may be necessary to know where the TLB area ends as well as where it
starts. This allows board code to complete a secure memory erase without
destroying the page tables.

Signed-off-by: Gabe Black <gabeblack@google.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2013-01-10 22:21:32 +01:00
Ajay Kumar
7b4bd121b6 EXYNOS: Add dummy definition to fix compilation dependency on CONFIG_EXYNOS_MIPI_DSIM
When only DP is used, we need not enable CONFIG_EXYNOS_MIPI_DSIM.
But if we do not select CONFIG_EXYNOS_MIPI_DSIM, exynos_fb.c throws
error saying exynos_mipi_dsi_init() not defined. So, we add
dummy definition for exynos_mipi_dsi_init when CONFIG_EXYNOS_MIPI_DSIM
is not defined.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-01-10 10:19:47 +09:00
Ajay Kumar
9b572852c0 EXYNOS5: Add support for FIMD and DP
Add panel_info structure required by LCD driver
and DP panel platdata for SMDK5250.
Add GPIO configuration for LCD.
Enable FIMD and DP support on SMDK5250.
DP Panel size: 2560x1600.
We use 16BPP resolution to get LCD console.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Acked-by: Simon Glass <sjg@chomium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2013-01-10 10:19:47 +09:00
Albert ARIBAUD
612404c28a Merge 'u-boot-atmel/master' into 'u-boot-arm/master' 2013-01-09 20:01:48 +01:00
Luke Lowrey
3e75e69668 arch-kirkwood: Ethernet port macro returning incorrect address
Modified the arch-kirkwood header so KWGBE_PORT_SERIAL_CONTROL1_REG(x)
returns the correct address.

Originally calling KWGBE_PORT_SERIAL_CONTROL1_REG(1) returned the
address for port 0 and vice versa.

Doesn't have any knock on effects to the u-boot code as the only
time they're used is to do the same function to both addresses

Signed-off-by: Luke Lowrey <luke@chamsys.co.uk>
Acked-by: Prafulla Wadaskar <Prafulla@marvell.com>
Acked-by: Heiko Schocher <hs@denx.de>
2013-01-09 04:12:11 +05:30