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88527 commits

Author SHA1 Message Date
Marek Vasut
c9678850bd ARM: dts: stm32: Switch DWMAC RMII clock to MCO2 on DHCOM
The DHCOM SoM has two options for supplying ETHRX clock to the DWMAC
block and PHY. Either (1) ETHCK_K generates 50 MHz clock on ETH_CLK
pad for the PHY and the same 50 MHz clock are fed back to ETHRX via
internal eth_clk_fb clock connection OR (2) ETH_CLK is not used at
all, MCO2 generates 50 MHz clock on MCO2 output pad for the PHY and
the same MCO2 clock are fed back into ETHRX via ETH_RX_CLK input pad
using external pad-to-pad connection.

Option (1) has two downsides. ETHCK_K is supplied directly from either
PLL3_Q or PLL4_P, hence the PLL output is limited to exactly 50 MHz and
since the same PLL output is also used to supply SDMMC blocks, the
performance of SD and eMMC access is affected. The second downside is
that using this option, the EMI of the SoM is higher.

Option (2) solves both of those problems, so implement it here. In this
case, the PLL4_P is no longer limited and can be operated faster, at
100 MHz, which improves SDMMC performance (read performance is improved
from ~41 MiB/s to ~57 MiB/s with dd if=/dev/mmcblk1 of=/dev/null bs=64M
count=1). The EMI interference also decreases.

Ported from Linux kernel commit
73ab99aad50cd ("ARM: dts: stm32: Switch DWMAC RMII clock to MCO2 on DHCOM")

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-08-16 15:37:14 +02:00
Patrick Delaunay
284b08fb51 board: stm32mp1: add splash screen with stmicroelectronics logo
Display the STMicroelectronics logo with features VIDEO_LOGO and
SPLASH_SCREEN on STMicroelectronics boards.

With CONFIG_SYS_VENDOR = "st", the logo st.bmp is selected, loaded at the
address indicated by splashimage and centered with "splashpos=m,m".

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-08-16 15:35:55 +02:00
Patrick Delaunay
61ad1a527a ARM: dts: stm32mp: alignment with v6.4
Device tree alignment with Linux kernel v6.4.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-08-16 15:30:49 +02:00
Marek Vasut
b58ab56d14 ARM: stm32: Inhibit PDDS because CSTBYDIS is set
The PWR_MPUCR CSTBYDIS bit is set, therefore the CA cores can never
enter CStandby state and would always end up in CStop state. Clear
the PDDS bit, which indicates the CA cores can enter CStandby state
as it makes little sense to keep it set with CSTBYDIS also set.

This does however fix a problem too. When both PWR_MPUCR and PWR_MCUCR
PDDS bits are set, then the chip enters CStandby state even though the
PWR_MCUCR CSTBYDIS is set. Clearing the PWR_MPUCR PDDS prevents that
from happening.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2023-08-16 15:29:47 +02:00
Dario Binacchi
fc7bd99f6d ARM: dts: stm32: fix display pinmux for stm32f746-disco
As reported by the datasheet (DocID027590 Rev 4) for PG12:
- AF9  -> LCD_B4
- AF14 -> LCD_B1

So replace AF14 with AF9 for PG12 in the dts.

Fixes: fe63d3cfb7 ("ARM: dts: stm32: Sync DT with v4.20 kernel for stm32f7")
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-08-16 15:27:45 +02:00
Patrick Delaunay
141e232dbd clk: stm32mp1: remove error for disabled clock in stm32mp1_clk_get_parent
To disabled a clock in clock tree initialization for a mux of STM32MP15,
the selected clock source index is set with the latest possible index for
the number of bit used. Today this valid configuration cause a error
in U-Boot messages, for example with CLK_ETH_DISABLED, when this clock
is not needed for the used ETH PHY without crystal:

   no parents defined for clk id 123

This patch change the level of this message to avoid this trace for
valid clock tree.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-08-16 15:23:09 +02:00
Marek Vasut
b3d97f8ce3 ARM: stm32: Power cycle Buck3 in reset on DHSOM
In case the DHSOM is in suspend state and either reset button is pushed
or IWDG2 triggers a watchdog reset, then DRAM initialization could fail
as follows:

  "
  RAM: DDR3L 32bits 2x4Gb 533MHz
  DDR invalid size : 0x4, expected 0x40000000
  DRAM init failed: -22
  ### ERROR ### Please RESET the board ###
  "

Avoid this failure by not keeping any Buck regulators enabled during reset,
let the SoC and DRAMs power cycle fully. Since the change which keeps Buck3
VDD enabled during reset is ST specific, move this addition to ST specific
SPL board initialization so that it wouldn't affect the DHSOM .

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2023-08-16 15:19:57 +02:00
Tom Rini
5d3758178b Merge branch '2023-08-15-add-SGMII-support-for-TI-j7200' into next
To quote the author:
This series adds support for SGMII mode to the CPSW driver to enable the
functionality on TI's J7200 SoC.

Supporting SGMII mode also requires changes to the WIZ driver which acts
as a wrapper for the SerDes used by the CPSW MAC to transmit data to the
Ethernet PHY daughtercard mounted on the I2C GPIO Expander 2 connector
on the J7200 EVM.

Powering on and resetting the Ethernet PHY requires MDIO support which
is added to the CPSW driver.

For supporting DMA transactions from the MAIN CPSW instance to the A72
Host on J7200 SoC, the corresponding PSI-L endpoint information is added
for the J721E SoC, which is applicable to J7200 SoC as well.

The SGMII daughtercard used for testing SGMII mode has TI's DP83869 PHY.
Thus, enable the config for DP83869 driver functionality. Also, enable
GPIO HOG config.
2023-08-15 21:49:34 -04:00
Siddharth Vadapalli
9a07d2df76 configs: j7200_evm_a72: Enable configs for SGMII support with MAIN CPSW0
The MAIN CPSW0 instance of CPSW Ethernet Switch on TI's J7200 SoC
supports SGMII mode. To enable support for utilizing the SGMII
daughtercard with TI's DP83869 PHY, enable the corresponding config.

Also, since the SGMII daughtercard is connected to the I2C GPIO
Expander 2 connector on the J7200 EVM, powering on the Ethernet PHY and
resetting it requires GPIO Hogging capability. Enable it as well.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
2023-08-15 17:46:39 -04:00
Siddharth Vadapalli
cb6f4bbe3f phy: ti: j721e-wiz: Add SGMII support in WIZ driver for J721E
Enable full rate divider configuration support for J721E_WIZ_16G for SGMII.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
2023-08-15 17:46:39 -04:00
Siddharth Vadapalli
0914616156 phy: ti: phy-j721e-wiz: Add SGMII support in wiz driver for J7200
Select the same mac divider for SGMII too as the one being used for
QSGMII.

Enable full rate divider configuration support for J721E_WIZ_10G for
SGMII.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
2023-08-15 17:46:39 -04:00
Suman Anna
8a5fe04495 net: ti: am65-cpsw-nuss: Add logic to support MDIO reset
Enhance the AM65 CPSW NUSS driver to perform a MDIO reset using a GPIO
line. Logic is also added to perform a pre and post delay around reset
using the optional 'reset-delay-us' and 'reset-post-delay-us' properties.
This is similar to the reset being performed in the Linux kernel. The
reset is done once when the CPSW MDIO bus is being initialized.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
2023-08-15 17:46:39 -04:00
Siddharth Vadapalli
0131c90214 net: ti: am65-cpsw-nuss: Add support for SGMII mode
Add support for configuring the CPSW Ethernet Switch in SGMII mode.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
2023-08-15 17:46:39 -04:00
Suman Anna
066e860bc7 dma: ti: Update J21E PSIL endpoint information for MAIN CPSW0
The PSIL endpoint data for J721E currently covers only the MCU domain
CPSW0 instance. Add the data for the MAIN domain CPSW0 as well to allow
the MAIN domain Ethernet ports to be usable on any platform using J721E
SoC.

Additionally, since J721E's PSIL endpoint data is applicable to J7200
SoC as well, the MAIN CPSW0 instance on J7200 will also be usable now.

Signed-off-by: Suman Anna <s-anna@ti.com>
[s-vadapalli@ti.com: Update commit message indicating support for J7200]
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
2023-08-15 17:46:39 -04:00
Tom Rini
9b54b0e37b Pull request for efi-2023-10-rc3
Documentation:
 
 * Correct description of board_get_usable_ram_top
 * Add partition API to HTML documentation
 * Describe  lmb_is_reserved
 * doc/sphinx/requirements.txt: Bump certifi up
 
 UEFI:
 
 * Fix  efi_add_known_memory
 * Make distro_efi_boot() static
 
 Other:
 
 * Correct return type board_get_usable_ram_top
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Merge tag 'efi-2023-10-rc3' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request for efi-2023-10-rc3

Documentation:

* Correct description of board_get_usable_ram_top
* Add partition API to HTML documentation
* Describe  lmb_is_reserved
* doc/sphinx/requirements.txt: Bump certifi up

UEFI:

* Fix  efi_add_known_memory
* Make distro_efi_boot() static

Other:

* Correct return type board_get_usable_ram_top
2023-08-15 13:08:17 -04:00
Heinrich Schuchardt
d768dd8855 common: return type board_get_usable_ram_top
board_get_usable_ram_top() returns a physical address that is stored in
gd->ram_top. The return type of the function should be phys_addr_t like the
current type of gd->ram_top.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-08-15 18:21:17 +02:00
Heinrich Schuchardt
b571b3acda efi_loader: fix efi_add_known_memory()
In efi_add_known_memory() we currently call board_get_usable_ram_top() with
an incorrect value 0 of parameter total_size. This leads to an incorrect
value for ram_top depending on the code in board_get_usable_ram_top().

Use the value of gd->ram_top instead which is set before relocation by
calling board_get_usable_ram_top().

Fixes: 7b78d6438a ("efi_loader: Reserve unaccessible memory")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-08-15 18:21:17 +02:00
Bin Meng
6072703dc9 bootmeth: efi: Make distro_efi_boot() static
As it is only called in bootmeth_efi.c

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-08-15 18:21:17 +02:00
Heinrich Schuchardt
5aae021c30 doc: add partition API to HTML documentation
* Convert comments in part.h to Sphinx style.
* Create documentation page for the partition API.
* Add the partition API page to the API index page.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-15 18:21:17 +02:00
Heinrich Schuchardt
289bd72ea4 doc: description of board_get_usable_ram_top()
Improve the description of function board_get_usable_ram_top().

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-15 18:21:17 +02:00
Heinrich Schuchardt
78246baa8d lmb: description lmb_is_reserved, lmb_is_reserved_flags
* provide a description for function lmb_is_reserved()
* improve the description of funciton lmb_is_reserved_flags()

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-08-15 18:21:17 +02:00
Tom Rini
f26c54ddde doc/sphinx/requirements.txt: Bump certifi up
Upgrade certifi to the latest version, to remove e-Tugra from the root
store.

Link: https://groups.google.com/a/mozilla.org/g/dev-security-policy/c/C-HrP1SEq1A?pli=1
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-08-15 18:21:17 +02:00
Tom Rini
f0efecd27d Merge tag 'ubi-updates-for-v2023.10-rc3' of https://source.denx.de/u-boot/custodians/u-boot-ubi
ubi changes for v2023.10-rc3

Fix:
- Fix 'ubi list' command arguments parsing
  from Dmitry
2023-08-15 10:44:32 -04:00
Tom Rini
ae9de10d5f Merge tag 'i2c-updates-for-v2023.10-rc3' of https://source.denx.de/u-boot/custodians/u-boot-i2c
i2c updates for v2023.10-rc3

Bugfixes:
- mvtwsi driver fix stuck "bus error" state
  from Sam
2023-08-15 10:44:20 -04:00
Tom Rini
bdc682437a Merge branch '2023-08-14-assorted-general-updates' into next
- Assorted PCI-related fixes, add Apple Type-C PHY support, semihosting
  updates, fix a FAT corner-case, update the help on the pxe cmd and
  clean up the gpio uclass slightly.
2023-08-15 10:39:41 -04:00
Dmitry Dunaev
34031e9cce cmd: ubi: Fix 'ubi list' command arguments parsing
This fixes allowed argc variable value for arguments parsing

Fixes: 6de1daf64b ("cmd: ubi: Add 'ubi list' command")
Signed-off-by: Dmitry Dunaev <dunaev@tecon.ru>
2023-08-15 07:32:13 +02:00
Sam Edwards
250454c59b i2c: mvtwsi: reset controller if stuck in "bus error" state
The MVTWSI controller can act either as a master or slave device. When
acting as a master, the FSM is driven by the CPU. As a slave, the FSM is
driven by the bus directly. In what is (apparently) a safety mechanism,
if the bus transitions our FSM in any improper way, the FSM goes to a
"bus error" state (0x00). I could find no documented or experimental way
to get the FSM out of this state, except for a controller reset.

Since U-Boot only uses the MVTWSI controller as a bus master, this
feature only gets in the way: we do not care what happened on the bus
previously as long as the bus is ready for a new transaction. So, when
trying to start a new transaction, check for this state and reset the
controller if necessary.

Note that this should not be confused with the "deblocking" technique
(used by the `i2c reset` command), which involves pulsing SCL repeatedly
if SDA is found to be held low, in an attempt to force the bus back to
an idle state. This patch only resets the controller in case something
else had previously upset it, and (in principle) results in no
externally-observable change in behavior.

Signed-off-by: Sam Edwards <CFSworks@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
2023-08-15 06:52:04 +02:00
Tom Rini
51171cdd6d Enhance bootmeth_cros
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Merge tag 'dm-next-14aug23' of https://source.denx.de/u-boot/custodians/u-boot-dm into next

Enhance bootmeth_cros
2023-08-14 21:39:08 -04:00
Marek Vasut
aaf5b59230 gpio: Use separate bitfield array to indicate GPIO is claimed
The current gpio-uclass design uses name field in struct gpio_dev_priv as
an indicator that GPIO is claimed by consumer. This overloads the function
of name field and does not work well for named pins not configured as GPIO
pins.

Introduce separate bitfield array as the claim indicator.

This unbreaks dual-purpose AF and GPIO operation on STM32MP since commit
2c38f7c318 ("pinctrl: pinctrl_stm32: Populate uc_priv->name[] with pinmux node's name")
where any pin which has already been configured as AF could no longer be
claimed as dual-purpose GPIO. This is important for pins like STM32 MMCI
st,cmd-gpios .

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-14 17:55:53 -04:00
Heinrich Schuchardt
f7ee9f3d36 test: unit test for semihosting
Provide a unit test for semihosting testing reading and writing a file.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Sean Anderson <sean.anderson@seco.com>
2023-08-14 17:55:53 -04:00
Heinrich Schuchardt
cf159fe0b6 configs: enable SEMIHOSTING on qemu_arm64_defconfig
We need a platform on which we can test our semihosting code.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Sean Anderson <sean.anderson@seco.com>
2023-08-14 17:55:53 -04:00
Bin Meng
eed99ce360 cmd: pxe: Update the command help
Currently the "help" displays pxe command help text like this:

  => help
  ...
  printenv  - print environment variables
  pxe       - commands to get and boot from pxe files
  To use IPv6 add -ipv6 parameter
  qfw       - QEMU firmware interface
  ...

This does not read clearly. Remove the IPv6 stuff as it is in
the detailed help text so that it fits just a single line.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-14 17:55:53 -04:00
Sergei Antonov
852467de92 pci: ftpci100: add new driver implementation
Add a new DM driver supporting FTPCI100 IP used in SoC designs.
This implementation is not based on the old non-DM ftpci100 code
dropped from U-Boot.

Enable the driver in sandbox_defconfig to test compilability.

Signed-off-by: Sergei Antonov <saproj@gmail.com>
2023-08-14 17:55:53 -04:00
Heinrich Schuchardt
84032b6759 fs: fat: avoid multiplication overflow
The product of two 32 bit integers is a 32 bit integer. Hence
clustcount * bytesperclust may overflow on > 4 GiB devices.

Change the type of clustcount.

Fixes: cb8af8af5b ("fs: fat: support write with non-zero offset")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-08-14 17:55:53 -04:00
Heinrich Schuchardt
688d62bfc8 spl: add FIT support to semihosting boot method
Allow loading a FIT image via semihosting in SPL.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2023-08-14 17:55:53 -04:00
Marek Vasut
8ee830d898 pci: Fix device_find_first_child() return value handling
This function only ever returns 0, but may not assign the second
parameter. Same thing for device_find_next_child(). Do not assign
ret to stop proliferation of this misuse.

Reported-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-14 17:55:52 -04:00
Mark Kettenis
b99c635787 phy: Add support for the Apple Type-C PHY
This is merely a dummy driver that makes sure the DWC3 XHCI driver
finds its reset and PHY controllers.  We rely on iBoot to set up
the PHY for us.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
2023-08-14 17:51:51 -04:00
Mark Kettenis
815ce125a4 pci: apple: Enable CONFIG_SYS_PCI_64BIT
The Apple hardware supports 64-bit prefetchable memory windows so
enable CONFIG_SYS_PCI_64BIT. This fixes BAR assignments for the
Broadcom Ethernet controller used in some of the desktop machines.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
2023-08-14 17:51:50 -04:00
Tom Rini
831a80c2af Merge branch '2023-08-14-keep-fixed-gpio-regulator-count-in-balance' into next
To quote the author:

The commit 4fcba5d556 ("regulator: implement basic reference counter")
have made it more important to keep fixed/gpio regulators enable/disable
state in balance.

This series fixes an inbalance in the mmc_dw driver and changes to use
the more relaxed regulator_set_enable_if_allowed function for a few
other drivers.

The regulator_set_enable_if_allowed function is more relaxed and will
return ENOSYS if the provided regulator is NULL or when DM_REGULATOR
was disabled. Using the following call convention should be safe:

  ret = regulator_set_enable_if_allowed(<supply>, <true|false>);
  if (ret && ret != -ENOSYS)
          return ret;
2023-08-14 09:14:51 -04:00
Jonas Karlman
01b2917a19 mmc: dw_mmc: Keep vqmmc-supply enable count in balance
With the commit 4fcba5d556 ("regulator: implement basic reference
counter"), keeping regulator enablement in balance become more important.

Disable vqmmc-supply before signal voltage is changed to keep regulator
enable counter in balance.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
2023-08-14 09:14:41 -04:00
Jonas Karlman
9a2e9cc659 mmc: Use regulator_set_enable_if_allowed
With the commit 4fcba5d556 ("regulator: implement basic reference
counter") the return value of regulator_set_enable may be EALREADY or
EBUSY for fixed/gpio regulators.

Change to use the more relaxed regulator_set_enable_if_allowed to
continue if regulator already was enabled or disabled.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # P895 Tegra 3;
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>  # rockpro64-rk3399
2023-08-14 09:14:41 -04:00
Jonas Karlman
0830333c47 usb: ehci-generic: Use regulator_set_enable_if_allowed
With the commit 4fcba5d556 ("regulator: implement basic reference
counter") the return value of regulator_set_enable may be EALREADY or
EBUSY for fixed/gpio regulators.

Change to use the more relaxed regulator_set_enable_if_allowed to
continue if regulator already was enabled or disabled.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Marek Vasut <marex@denx.de>
2023-08-14 09:14:41 -04:00
Jonas Karlman
335799b725 usb: dwc2: Use regulator_set_enable_if_allowed
With the commit 4fcba5d556 ("regulator: implement basic reference
counter") the return value of regulator_set_enable may be EALREADY or
EBUSY for fixed/gpio regulators.

Change to use the more relaxed regulator_set_enable_if_allowed to
continue if regulator already was enabled or disabled.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>  # rockpro64-rk3399
Reviewed-by: Marek Vasut <marex@denx.de>
2023-08-14 09:14:41 -04:00
Jonas Karlman
d82cbc596e adc: Use regulator_set_enable_if_allowed
With the commit 4fcba5d556 ("regulator: implement basic reference
counter") the return value of regulator_set_enable may be EALREADY or
EBUSY for fixed/gpio regulators.

Change to use the more relaxed regulator_set_enable_if_allowed to
continue if regulator already was enabled or disabled.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>  # rockpro64-rk3399
2023-08-14 09:14:41 -04:00
Tom Rini
832148f675 Merge tag 'u-boot-rockchip-20230814' of https://source.denx.de/u-boot/custodians/u-boot-rockchip
- Add board: rk3568 EmbedFire Lubancat 2
- Fixes for rk3568 clock and pinctrl;
- Fixes for rk3308 clock and uart;
- rk3328 rock64 updates;
- Video fix on veyron board;
2023-08-14 09:11:09 -04:00
Tom Rini
70c45244d9 - fix NULL dereference in vidconsole_measure()
- fix simplefb format for raspberrypi-4b
  - fix typo in Kconfig
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Merge tag 'video-20230814' of https://source.denx.de/u-boot/custodians/u-boot-video

 - fix NULL dereference in vidconsole_measure()
 - fix simplefb format for raspberrypi-4b
 - fix typo in Kconfig
2023-08-14 09:09:23 -04:00
Jonas Karlman
d7009faa09 pinctrl: rockchip: Fix drive and input schmitt on RK3568
On RK3568 most pins have a configurable drive strength of level 0-5 and
some pins level 0-11. When rk3568_set_drive is called with a strength
value above 7 the drv value written to reg may overflow into the write
enable bits, resulting in a bad configuration.

This cause e.g. ethernet PHY on Radxa CM3-IO board not to work after
drive is configured according to the device tree.

  Could not get PHY for ethernet@fe010000: addr 0

Level 6-11 can be configured using a second reg for some pins, however
the drv value is reused resulting in lower 6 bits being written to reg.

Input schmitt is configured in 2-bit fields on RK3568 compared to
earlier generation and 2'b10 should be used to enable input schmitt.

Change to use regmap_update_bits with a rmask to fix the overflow issue
and closer match the linux driver. Bit shift the drv value used for the
second reg to configure drive strength level 6-11. Also write correct
values for input schmitt setting.

Fixes: 1977d746aa ("rockchip: rk3568: add rk3568 pinctrl driver")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-08-14 11:07:27 +08:00
Meng Li
04cc66c047 rpi: set the correct parameter for simple framebuffer node
When raspberrpi-4b platform  boots up, there are 2 sets of same bootup
log displayed on HDMI monitor screen, it looks like the screen is split
into 2 parts. The root cause is that video format of u-boot is different
from kernel. The fixing "a8r8g8b8" video format is used in u-boot, but
"r5g6b5" video format from framebuffer node is used in kernel image. In
order to avoid weird display status on screen, it needs to set the correct
parameter for simple framebuffer node even if it has existed.

Signed-off-by: Meng Li <Meng.Li@windriver.com>
2023-08-13 23:57:46 +02:00
Jason Wessel
28cd244e84 bcm2835: Add simiple-framebuffer for use with fkms
When the fkms dtb overlay is used only the simple-framebuffer is
presented as a usable video display. So, add "simple-framebuffer"
compatible to enable video driver bcm2835.

Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
Signed-off-by: Meng Li <Meng.Li@windriver.com>
2023-08-13 23:55:57 +02:00
Bin Meng
aba6776a71 video: kconfig: Fix a typo in SPL_VIDEO_REMOVE
Add one space between 'before' and 'loading'.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-13 23:09:23 +02:00