Add sha256 hash to FIT images when CONFIG_SPL_FIT_SIGNATURE=y.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
Special nodes, hash and signature, is not being added to the nodes
generated for each segment in split-elf operation.
Copy the subnode logic used in _gen_fdt_nodes to _gen_split_elf to
ensure special nodes are added to the generated nodes.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
SPL load FIT images by reading the data aligned to block length.
Block length aligned image data is read directly to the load address.
Unaligned image data is written to an offset of the load address and
then the data is memcpy to the load address.
This adds a small overhead of having to memcpy unaligned data, something
that normally is not an issue.
However, TF-A may have a segment that should be loaded into SRAM, e.g.
vendor TF-A for RK3568 has a 8KiB segment that should be loaded into the
8KiB PMU SRAM. Having the image data for such segment unaligned result
in segment being written to and memcpy from beyond the SRAM boundary, in
the end this results in invalid data in SRAM.
Aligning the FIT and its external data to MMC block length to work
around such issue.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add support to indicate what alignment to use for the FIT and its
external data. Pass the alignment to mkimage via the -B flag.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
Infineon S25FS256T is 256Mbit Quad SPI NOR flash. The key features and
differences comparing to other Spansion/Cypress flash familes are:
- 4-byte address mode by factory default
- Quad mode is enabled by factory default
- Supports mixture of 128KB and 64KB sectors by OTP configuration
(this patch supports uniform 128KB only)
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Rename s25hx_t prefix to s25 so that the single set of fixup hooks can
support all other S25 families.
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Acked-by: Dhruva Gole <d-gole@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
If the offset or the size passed to the 'sf erase' command exceeds
the size of the SPI flash displaying the command usage is not
helpful. Return CMD_RET_FAILURE instead of CMD_RET_USAGE.
Use the CMD_RET_* constants instead of 0, 1, -1.
Simplify a logical expression in the final return statement.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Acked-by: Dhruva Gole <d-gole@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
CMD_RET_USAGE == -1. The special handling of this value at the end of
do_spi_flash() does not make any sense.
To avoid future confusion use the CMD_RET_* constants and simplify the
code.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
If the offset or the size passed to the 'sf write' or 'sf read' command
exceeds the size of the SPI flash displaying the command usage is not
helpful. Return CMD_RET_FAILURE instead of CMD_RET_USAGE.
Use the CMD_RET_* constants instead of 0, 1, -1.
Simplify a logical expression in the final return statement.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Fix the issue where some flash chips like cypress S25HS256T return the
value of the same register over and over in DAC mode.
For example in the TI K3-AM62x Processors refer [0] Technical Reference
Manual there is a layer of digital logic in front of the QSPI/OSPI
Drive when used in DAC mode. This is part of the Flash Subsystem (FSS)
which provides access to external Flash devices.
The FSS0_0_SYSCONFIG Register (Offset = 4h) has a BIT Field for
OSPI_32B_DISABLE_MODE which has a Reset value = 0. This means, OSPI 32bit
mode enabled by default.
Thus, by default controller operates in 32 bit mode causing it to always
align all data to 4 bytes from a 4byte aligned address. In some flash
chips like cypress for example if we try to read some regs in DAC mode
then it keeps sending the value of the first register that was requested
and inorder to read the next reg, we have to stop and re-initiate a new
transaction.
This causes wrong register values to be read than what is desired when
registers are read in DAC mode. Hence if the data.nbytes is very less
then prefer STIG mode for such small reads.
[0] https://www.ti.com/lit/ug/spruiv7a/spruiv7a.pdf
Tested-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Dhruva Gole <d-gole@ti.com>
[jagan: add tab space for comments]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Setup the Addr bit field while issuing register reads in STIG mode. This
is needed for example flashes like cypress define in their transaction
table that to read any register there is 1 cmd byte and a few more address
bytes trailing the cmd byte. Absence of addr bytes will obviously fail
to read correct data from flash register that maybe requested by flash
driver because the controller doesn't even specify which address of the
flash register the read is being requested from.
Signed-off-by: Dhruva Gole <d-gole@ti.com>
Reviewed-by: Pratyush Yadav <pratyush@kernel.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Cypress defines two flavors of configuration registers, volatile and
non volatile, and both use the same bit fields. Rename the bitfields in
the configuration registers so that they can be used for both flavors.
Suggested-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
CFR5[6] is reserved bit and must be always 1. Set it to comply with flash
requirements. While fixing SPINOR_REG_CYPRESS_CFR5V_OCT_DTR_EN definition,
stop using magic numbers and describe the missing bit fields in CFR5
register. This is useful for both readability and future possible addition
of Octal STR mode support.
Fixes: ea9a22f7e7 ("mtd: spi-nor-core: Add support for Cypress Semper flash")
Suggested-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Introduce Socionext F_OSPI controller driver. This controller is used to
communicate with slave devices such as SPI flash memories. It supports
4 slave devices and up to 8-bit wide bus, but supports master mode only.
This driver uses spi-mem framework for SPI flash memory access, and
can only operate indirect access mode and single data rate mode.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Use log_warning() instead of printf() to print out driver information
Signed-off-by: Pengfei Fan <fanpengfei1@eswincomputing.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Fix some typos in spi drivers
Signed-off-by: Pengfei Fan <fanpengfei1@eswincomputing.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
For Kirkwood boards, it is necessary to have early malloc in DRAM area
when Driver Model for Serial is enabled. This patch removes individual
board settings for early malloc in various Kirkwood boards, and uses the
Kirkwood commonly defined settings in arch/arm/mach-kirkwood/Kconfig.
Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
This syncs drivers/ddr/marvell/a38x/ with the master branch of repository
https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git
up to the commit "mv_ddr: a3700: Use the right size for memset to not overflow"
d5acc10c287e40cc2feeb28710b92e45c93c702c
This patch was created by following steps:
1. Replace all a38x files in U-Boot tree by files from upstream github
Marvell mv-ddr-marvell repository.
2. Run following command to omit portions not relevant for a38x, ddr3, and ddr4:
files=drivers/ddr/marvell/a38x/*
unifdef -m -UMV_DDR -UMV_DDR_ATF -UCONFIG_APN806 \
-UCONFIG_MC_STATIC -UCONFIG_MC_STATIC_PRINT -UCONFIG_PHY_STATIC \
-UCONFIG_PHY_STATIC_PRINT -UCONFIG_CUSTOMER_BOARD_SUPPORT \
-UCONFIG_A3700 -UA3900 -UA80X0 -UA70X0 -DCONFIG_ARMADA_38X -UCONFIG_ARMADA_39X \
-UCONFIG_64BIT $files
3. Manually change license to SPDX-License-Identifier
(upstream license in upstream github repository contains long license
texts and U-Boot is using just SPDX-License-Identifier.
After applying this patch, a38x, ddr3, and ddr4 code in upstream Marvell github
repository and in U-Boot would be fully identical. So in future applying
above steps could be used to sync code again.
The only change in this patch are:
1. Some fixes with include files.
2. Some function return and basic type defines changes in
mv_ddr_plat.c (to correct Marvell bug).
3. Remove of dead code in newly copied files (as a result of the
filter script stripping out everything other than a38x, dd3, and ddr4).
Reference:
"ddr: marvell: a38x: Sync code with Marvell mv-ddr-marvell repository"
107c3391b9
Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
This contains some fixes, and the first bunch of some clean up patches
to get rid of legacy GPIO and PMIC code.
Highlight is the DM AXP PMIC driver, which is required to convert some
drivers over to use DM regulators, and also is required to get rid
of some less optimal PMIC setup code in Trusted Firmware. This isn't
enabled by any defconfig yet, but can be enabled manually and works. For
the full glory some patches are still missing, and this requires more
testing, which would be simpler if the core code is upstream.
To quote the author:
So far, standard boot does not replicate all the of the functionality
of the distro_bootcmd scripts. In particular it lacks some bootdevs and
some of the bootmeths are incomplete.
Also there is currently no internal mechanism to enumerate buses in order
to discover bootdevs, e.g. with USB.
This series addresses these shortcomings:
- Adds the concept of a 'bootdev hunter' to enumerate buses, etc. in an
effort to find bootdevs of a certain priority
- Adds bootdevs for SCSI, IDE, NVMe, virtio, SPI flash
- Handles PXE and DHCP properly
- Supports reading the device tree with EFI and reading scripts from the
network
It also tidies up label processing, so it is possible to use:
bootflow scan mmc2
to scan just one MMC device (with BOOTSTD_FULL).
As before this implementation still relies on CONFIG_CMDLINE being
enabled, mostly for the network stack. Further work would be required to
disentangle that.
Quite a few tests are added but there are some gaps:
- SPI flash bootdev
- EFI FDT loading
Note that SATA works via SCSI (CONFIG_SCSI_AHCI) and does not use
driver model. Only pogo_v4 seems to be affected. Probably all thats is
needed is to call bootdev_setup_sibling_blk() in the Marvell SATA driver.
Also, while it would be possible to init MMC in a bootdev hunter, there is
no point since U-Boot always inits MMC on startup, if present.
With this series it should be possible to migrate boards to standard boot
by removing the inclusion of config_distro_bootcmd.h and instead adding
a suitable value for boot_targets to the environment, e.g.:
boot_targets=mmc1 mmc0 nvme scsi usb pxe dhcp spi
Thus it is possible to boot automatically without scripts and boards can
use a text-based environment instead of the config.h files.
To demonstrate this, rockpro64-rk3399 is migrated to standard boot in this
series. Full migration could probably be automated using a script, similar
in concept to moveconfig:
- obtain the board environment via 'make u-boot-initial-env'
- get the value of "boot_targets"
- drop config_distro_bootcmd.h from the config.h file
- rebuild again to get the environment without distro scripts
- write the environment (adding boot_targets) to board.env
- remove CONFIG_EXTRA_ENV_SETTINGS from the config.h file
SOM itself from PS point of view is using the same configuration as K26
that's why reuse that files and only change compatible strings.
The reason for creating own set of files is just in case when versions
start to diverge because of HW change, supply chain issue, etc.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/61f877ec0b480c5bd368a1211fc73ff7465016bd.1674043915.git.michal.simek@amd.com
The commit eaf6ea6a1d ("Migrate CUSTOM_SYS_INIT_SP_ADDR to Kconfig using
system-constants.h") moved custom init stack pointer address to Kconfig
which ends up in situation that xilinx_versal_mini_qspi.h is not
needed anymore. That's why remove the file and move defconfigs directly to
xilinx_versal_mini.h configuration.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/2d7276ab8d4cb1d245b64287fb59c79325513f22.1674041200.git.michal.simek@amd.com
The commit eaf6ea6a1d ("Migrate CUSTOM_SYS_INIT_SP_ADDR to Kconfig using
system-constants.h") moved custom init stack pointer address to Kconfig
which ends up in situation that xilinx_zynqmp_mini_emmc/qspi.h are not
needed anymore. That's why remove files and move defconfigs directly to
xilinx_zynqmp_mini.h configuration.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/61ae40cf63aabd08adb386c870d3392b0b606fc9.1674040373.git.michal.simek@amd.com
Drop the use of scripts and rely on standard boot for all operation.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add a way to record the bootdevs used when scanning for bootflows. This is
useful for testing.
Enable this only with BOOTSTD_FULL and do the same for the progress
reporting.
Re-enable and update the affected tests now that we have this feature.
For bootdev_test_order_default() there is no-longer any support for using
the bootdev aliases to specify an ordering, so drop that part of the test.
Signed-off-by: Simon Glass <sjg@chromium.org>
This function is not used outside tests. Drop it and rename
bootflow_scan_dev() since it is how we start a scan now.
Signed-off-by: Simon Glass <sjg@chromium.org>
We want to support scanning a single label, like 'mmc' or 'usb0'. Add
this feature by plumbing the label through to the iterator, setting a
flag to indicate that only siblings of the initial device should be used.
This means that scanning a bootdev by its name is not supported anymore.
That feature doesn't seem very useful in practice, so it is no great loss.
Add a test for bootdev_find_by_any() while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present we set up the bootdev order at the start, then scan the
bootdevs one by one.
However this approach cannot be used with hunters, since the bootdevs may
not exist until the hunter is used. Nor can we just run all the hunters at
the start, since that violate's U-Boot's 'lazy init' requirement. It also
increases boot time.
So we need to adjust the algorithm to scan by labels instead. As a first
step, drop the dev_order[] array in favour of a list of labels. Update the
name of bootdev_setup_iter_order() to better reflect what it does.
Update some related comments and log messages. Also disable a few tests
until a later commit where we can use them.
Signed-off-by: Simon Glass <sjg@chromium.org>
The current extension code is designed to be used from commands. We want
to add a boot driver which uses it. To help with this, split the code into
the command processing and a function which actually does the scan.
Really the extension code should be in common/ or use driver model, but
this is a start.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a function which moves to the next priority to be processed.
This works by storing the current priority in the bootflow iterator. The
logic to set this up is included in a subsequent commit.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a function which moves to the next label in a list of labels. This
allows processing the boot_targets environment variable.
This works using a new label list in the bootflow iterator. The logic to
set this up is included in a subsequent commit.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a function to hunt for a bootdev label and find the bootdev produced
by the hunter (or already present).
Add a few extra flags so that we can distinguish between "mmc1", "mmc" and
"1" which all need to be handled differently.
Signed-off-by: Simon Glass <sjg@chromium.org>
We need extensions to be set up before we start trying to boot any of the
bootdevs. Add a new priority before all the others for tht sort of thing.
Also add a 'none' option, so that the first one is not 0.
While we are here, comment enum bootdev_prio_t fully and expand the test
for the 'bootdev hunt' command.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a flag to control whether hunters are used when scanning for
bootflows. Enable it by default and tidy up the flag comments a little.
Fow now this has no effect, until a future patch enables this feature.
Signed-off-by: Simon Glass <sjg@chromium.org>
These are associated with the ethernet boot device but do not match its
uclass name, so handle them as special cases.
Provide a way to pass flags through with the bootdev so that we know
how to process it. The flags are checked by the bootmeths, to ensure that
only the selected bootmeth is used.
While these both use the network device, they work quite differently. It
is common to run only one of these, or to run PXE before DHCP. Provide
bootflow flags to control which methods are used. Check these in the two
bootmeths so that only the chosen one is used.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this bootmeth only supports a block device and the sandbox
host filesystem. Add support for obtaining the script from a network
device. Also implement the set_bootflow() method so that it is easy
for other bootdevs (such as enabling SPI flash to support scripts).
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a bootdev for SPI flash so that these devices can be used with
standard boot. It only supports loading a script.
Add a special case for the label, since we want to use "spi", not
"spi_flash".
Enable the new bootdev on sandbox.
Signed-off-by: Simon Glass <sjg@chromium.org>
Most tests don't want these and they can create a lot of noise. Add a way
to disable them. Use that in tests, with a flag provided to enable them
for tests that need this feature.
Signed-off-by: Simon Glass <sjg@chromium.org>
Normally the bootmeth driver reads the bootflow from the bootdev, since
it knows the correct way to do it.
However it is easier for some bootdevs to handle this themselves. For
example, reading from SPI flash is quite different from other devices.
Add a way for the bootdev to pass a bootflow to the bootmeth, so that
this can be supported.
Signed-off-by: Simon Glass <sjg@chromium.org>
This is complicated enough to merit its own function, particularly as we
are about to add to it. Create a new label_to_uclass() function to decode
a label.
Also update the code to ignore an empty label or one consisting of just a
number.
Signed-off-by: Simon Glass <sjg@chromium.org>
Mention that this function is also used with a NULL block devices to
access files on the host, when using sandbox.
Update the comment on struct bootflow also.
Signed-off-by: Simon Glass <sjg@chromium.org>
This environment variable is supposed to be set so that the script knows
which partition holds the script. Set it before invoking the script.
Signed-off-by: Simon Glass <sjg@chromium.org>
With EFI booting the device tree is required but is not actually specified
in any way. The normal method is to use a fdtfile environment variable to
get the filename, then look for that file on the media.
Implement this in the bootmeth.
Signed-off-by: Simon Glass <sjg@chromium.org>
