Commit graph

3177 commits

Author SHA1 Message Date
Marek Vasut
f24dea4e1b ARM: imx8m: Fix reset in SPL on NXP iMX8MP EVK
Board files should not re-implement do_reset() to work around this
function not being defined in for specific configurations. Rather,
the fix is to compile in drivers which implement this properly.
This patch enables sysreset and watchdog drivers in SPL and ties
them together to implement the same as the do_reset() hack in the
board file, except correctly in the DM/DT framework.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Flavio Suligoi <f.suligoi@asem.it>
Cc: Harald Seiler <hws@denx.de>
Cc: Igor Opaniuk <igor.opaniuk@toradex.com>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2020-05-01 13:46:22 +02:00
Marek Vasut
2455f91833 ARM: imx8m: Fix reset in SPL on NXP iMX8MN EVK
Board files should not re-implement do_reset() to work around this
function not being defined in for specific configurations. Rather,
the fix is to compile in drivers which implement this properly.
This patch enables sysreset and watchdog drivers in SPL and ties
them together to implement the same as the do_reset() hack in the
board file, except correctly in the DM/DT framework.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Flavio Suligoi <f.suligoi@asem.it>
Cc: Harald Seiler <hws@denx.de>
Cc: Igor Opaniuk <igor.opaniuk@toradex.com>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2020-05-01 13:46:22 +02:00
Marek Vasut
77cfd0d2b6 ARM: imx8m: Fix reset in SPL on NXP iMX8MM EVK
Board files should not re-implement do_reset() to work around this
function not being defined in for specific configurations. Rather,
the fix is to compile in drivers which implement this properly.
This patch enables sysreset and watchdog drivers in SPL and ties
them together to implement the same as the do_reset() hack in the
board file, except correctly in the DM/DT framework.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Flavio Suligoi <f.suligoi@asem.it>
Cc: Harald Seiler <hws@denx.de>
Cc: Igor Opaniuk <igor.opaniuk@toradex.com>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2020-05-01 13:46:22 +02:00
Adam Ford
87372fed19 arm: dts: imx8mm: sync dts from Linux Kernel 5.6.7
This patch synchronizes the device tree with that from 5.6.7.

This also adds nodes for crypto and ddrc, which makes keeping
the device tree files from individual boards in sync with the
Linux kernel.  This is helpful when boads reference those nodes.

Signed-off-by: Adam Ford <aford173@gmail.com>
2020-05-01 13:46:22 +02:00
Deepak Das
d597e61374 rockchip: rk3399: Add Nanopi M4 2GB board support
commit b2f5da9dd0 ("rockchip: rk3399: Add Nanopi M4 board support") added
support for Nanopi M4 board with Dual-Channel 4GB LPDDR3-1866 RAM.
This patch adds another variant of NanoPi M4 board with Dual-Channel
2GB DDR3-1866 RAM.

Signed-off-by: Deepak Das <deepakdas.linux@gmail.com>
2020-05-01 18:32:56 +08:00
Suniel Mahesh
f417d71ea7 rk3399: Add ROC-RK3399-PC Mezzanine board
Add Firefly ROC-RK3399-PC Mezzanine board which is an
extension board on top of roc-rk3399-pc.

Will drop the separate defconfig file, once we support
the board detection at runtime.

Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-01 18:32:56 +08:00
Jagan Teki
fb3f5cdbf1 arm: dts: rk3399: Sync roc-pc-mezzanine from v5.7-rc1
Sync Firefly ROC-RK3399-PC Mezzanine Board dts file
from Linux v5.7-rc1.

Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-01 18:32:56 +08:00
Jagan Teki
167efc2c7a arm64: dts: rk3399: Sync v5.7-rc1 from Linux
Sync rk3399 dts(i) files from v5.7-rc1 linux-next.

Reason:
To get updated PCIe nodes and properties on respective
dts(i) files.

Summary:
- sync won't include new board dts(i)
- sync will add required files used on respective dts(i)
- rk3399-puma-u-boot.dtsi spiflash label changed to norflash
- move puma.dtsi bios_enable into rk3399-puma-u-boot.dtsi
- move legacy max-frequency of sdhci into rk3399-u-boot.dtsi
- update cross-ec-[keyboard|sbs].dtsi path as per U-Boot
- keep roc-rk3399-pc dc_12v changes to -u-boot.dtsi

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-01 18:32:56 +08:00
Jagan Teki
f44bf1b5b1 arm64: dts: rk3399-evb: Move u-boot properties into -u-boot.dtsi
Move U-Boot specific properties into rk3399-evb u-boot
specific dtsi file.

This would help to sync the devicetrees from Linux whenever
required instead of adding specific nodes.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-01 18:32:56 +08:00
Jagan Teki
4888fbe935 arm64: dts: rk3399-puma: Move u-boot properties into -u-boot.dtsi
Move U-Boot specific properties into rk3399-puma u-boot
specific dtsi file.

This would help to sync the devicetrees from Linux whenever
required instead of adding specific nodes.

Cc: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-01 18:32:56 +08:00
Chen-Yu Tsai
062baa2566 rockchip: dts: rock64: Fix XHCI usage
If the VBUS regulator is always-on, XHCI will fail to detect USB 3.0
devices; USB 2.0 devices will work however.

Make the VBUS regulator controllable and tie it to only the XHCI. This
makes all three USB ports usable.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-01 18:32:56 +08:00
Chen-Yu Tsai
bab972948e rockchip: rk3328: Add support for ROC-RK3328-CC board
The ROC-RK3328-CC from Firefly and Libre Computer Project is a credit
card size development board based on the Rockchip RK3328 SoC, with:

  - 1/2/4 GB DDR4 DRAM
  - eMMC connector for optional module
  - micro SD card slot
  - 1 x USB 3.0 host port
  - 2 x USB 2.0 host port
  - 1 x USB 2.0 OTG port
  - HDMI video output
  - TRRS connector with audio and composite video output
  - gigabit Ethernet
  - consumer IR receiver
  - debug UART pins

The ROC-RK3328-CC has the enable pin of the SD card power switch tied
to GPIO_0_D6. This pin also has the function SDMMC0_PWREN, which is
muxed by default. SDMMC0_PWREN is an active high signal controlled by
the MMC controller, however the switch enable is active low, and
pulled low (enabled) by default to make things work on boot.

As such, we need to mux away from SDMMC0_PWREN and use GPIO to enable
power to the card. The default GPIO state for the pin is pull-down and
input, which doesn't require extra configuration when paired with the
external pull-down and active low switch.

Deal with this by enabling regulator support in SPL, and setting
"u-boot,dm-spl" for the regulator and other device nodes needed for
muxing the pin.

The device tree file is synced from the Linux kernel next-20200324.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-01 18:32:56 +08:00
Chen-Yu Tsai
50cbff7cf3 rockchip: dts: rk3328: Sync device tree files from Linux
This syncs rk3328 device tree files from the Linux kernel next-20200324.
The last commit to touch these files is:

    b2411befed60 ("arm64: dts: add bus to rockchip amba nodenames")

Additional changes not yet in the Linux kernel include:

    arm64: dts: rockchip: rk3328: drop #address-cells, #size-cells from grf node
    arm64: dts: rockchip: rk3328: drop non-existent gmac2phy pinmux options
    arm64: dts: rockchip: rk3328: Replace RK805 PMIC node name with "pmic"

Changes include:

  - conversion of raw pin numbers to macros
  - removal of deprecated RK_FUNC_* macros
  - update of device tree binding headers
  - new devices
  - device tree cleanups
  - gmac2phy disabled in -u-boot.dtsi as it is not supported in U-boot

This includes a re-ordering of the USB device nodes compared to upstream
Linux, moving the dwc2 OTG controller after the EHCI/OHCI nodes. This is
currently required as otherwise the dwc2 controller would not be able to
detect devices in some cases. This may be due to lack of USB PHY support
in U-boot.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2020-05-01 18:32:56 +08:00
Chen-Yu Tsai
32fd6169a1 rockchip: dts: rk3328: Move OTG node's hnp-srp-disable to rk3328-u-boot.dtsi
The "hnp-srp-disable" property for dwc2 is specific to U-boot, not part
of upstream Linux's device tree bindings.

Move it to rk3328-u-boot.dtsi to avoid losing it when syncing device
tree files.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-01 18:32:56 +08:00
Chen-Yu Tsai
032ca153e2 rockchip: dts: rk3328-evb: Move gmac2io related nodes to -u-boot.dtsi
The device tree file for rk3328-evb in the Linux kernel does not have
gmac2io enabled. Instead, gmac2phy is enabled, but that is not supported
in U-boot.

Move the gmac2io related nodes to rk3328-evb-u-boot.dtsi to preserve the
current functionality. When the device tree files are synced, gmac2phy
should be marked as "broken" in -u-boot.dtsi files.

Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Loic Devulder <ldevulder@suse.com>
Tested-by: Peter Geis <pgwipeout@gmail.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2020-05-01 18:32:56 +08:00
Chen-Yu Tsai
9a03177378 rockchip: dts: rk3328-evb: Move vcc5v0-host-xhci-drv to -u-boot.dtsi
USB 3.0 is only supported in U-boot, not in the Linux kernel where the
device tree files are ultimately synced from. While the xhci node was
moved, the external vbus regulator was not.

Move it as well.

Fixes: 2e91e2025c ("rockchip: rk3328: migrate u-boot node to -u-boot.dtsi")
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Loic Devulder <ldevulder@suse.com>
Tested-by: Peter Geis <pgwipeout@gmail.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2020-05-01 18:32:56 +08:00
Tom Rini
6d7dacf726 Xilinx changes for v2020.07-rc2
mmc:
 - Fix dt property handling via generic function
 
 clk:
 - Fix versal watchdog clock setting
 
 nand:
 - Fix zynq nand command comparison
 
 xilinx:
 - Enable ubifs
 - Sync board_late_init configurations with initrd_high setup
 - Make custom distro boot more verbose
 
 zynq:
 - Kconfig alignments
 - Fix nand cse configuration
 
 zynqmp:
 - Fix zcu104 low level qspi configuration
 - Small DT updates
 -----BEGIN PGP SIGNATURE-----
 
 iF0EABECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCXqp9yAAKCRDKSWXLKUoM
 IXiuAKCLjBKGQ+o+BkJMvjbydF1JgFdXpwCffFPRe6dTkPsLZhpzW/YQMrjidtg=
 =CQTb
 -----END PGP SIGNATURE-----

Merge tag 'xilinx-for-v2020.07-rc2' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx changes for v2020.07-rc2

mmc:
- Fix dt property handling via generic function

clk:
- Fix versal watchdog clock setting

nand:
- Fix zynq nand command comparison

xilinx:
- Enable ubifs
- Sync board_late_init configurations with initrd_high setup
- Make custom distro boot more verbose

zynq:
- Kconfig alignments
- Fix nand cse configuration

zynqmp:
- Fix zcu104 low level qspi configuration
- Small DT updates

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-04-30 11:34:01 -04:00
Tom Rini
b9da77f195 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq
- Add DM_ETH support for DPAA1, DPAA2 based RDB platforms: ls1046ardb,
  ls1043ardb, lx2160ardb, ls2088ardb, ls1088ardb.
- Add GICv3 support for ls1028a, ls2088a, ls1088a.
- Add lpuart support on ls1028aqds.
- Few bug fixes and updates on ls2088a, ls1012a, ls1046a, ls1021a based
  platforms.
2020-04-30 10:06:54 -04:00
Tom Rini
6864fc8704 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-sh
- rmobile gen2/gen3 DTS sync and defconfig consolidation
2020-04-29 10:39:18 -04:00
Madalin Bucur
8de6301dd8 ARM: dts: add QorIQ DPAA 1 FMan v3 to LS1046ARDB
Introduce the QorIQ DPAA 1 Frame Manager nodes in the LS1046ARDB
device tree. The device tree fragments are copied over with little
modification from the Linux kernel source code.

Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-29 11:10:54 +05:30
Madalin Bucur
acbb98c062 ARM: dts: add QorIQ DPAA 1 FMan v3 for LS1046A
Add the QorIQ DPAA 1 Frame Manager v3 device tree nodes for the
LS1046A SoC. The device tree fragments are copied over with little
modification from the Linux kernel source code.

Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-29 11:10:54 +05:30
Madalin Bucur
be1d758969 ARM: dts: add QorIQ DPAA 1 FMan v3 to LS1043ARDB
Introduce the QorIQ DPAA 1 Frame Manager nodes in the LS1043ARDB
device tree. The device tree fragments are copied over with little
modification from the Linux kernel source code.

Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-29 11:10:54 +05:30
Madalin Bucur
cd64b0a6d9 ARM: dts: add QorIQ DPAA 1 FMan v3 for LS1043A
Add the QorIQ DPAA 1 Frame Manager v3 device tree nodes for the
LS1043A SoC. The device tree fragments are copied over with little
modification from the Linux kernel source code.

Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-29 11:10:54 +05:30
Madalin Bucur
d86ab1bc05 ARM: dts: add QorIQ DPAA 1 FMan v3 device tree nodes
Add the QorIQ DPAA Frame Manager v3 device tree nodes description.
The device tree fragments are copied over with little modification
from the Linux kernel source code.

Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-29 11:10:54 +05:30
Yuantian Tang
e88cfb07eb armv8: ls1028aqds: add lpuart dts support
Rename fsl-ls1028a-qds.dts to fsl-ls1028a-qds.dtsi so that
it can be used as common device tree for lpuart and duart.
Add lpuart device tree and duart device tree respectively
for qds which are used with duart and lpuart console.

Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com>
Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-29 11:10:54 +05:30
Yuantian Tang
4659eb24f1 arm: dts: ls1028a: add lpuart nodes
Add lpuart nodes to enable lpuart feature

Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com>
Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-29 11:10:54 +05:30
Ioana Ciornei
68c7c008e8 arm: dts: ls1088ardb: add DPMAC and PHY nodes
In order to maintain compatibility with the Linux DTS, the entire fsl-mc
node is added but instead of being probed by a dedicated bus driver it
will be a simple-mfd.

Also, annotate the external MDIO nodes and describe the PHYs (8 x
VSC8514, AQR105). Also, add phy-handles for the dpmacs to their
associated PHY.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-29 11:10:54 +05:30
Ioana Ciornei
87274918f2 arm: dts: ls2088ardb: add DPMAC and PHY nodes
In order to maintain compatibility with the Linux DTS, the entire fsl-mc
node is added but instead of being probed by a dedicated bus driver it
will be a simple-mfd.

Also, annotate the external MDIO nodes and describe the PHYs (4 x AQR405
and 4 x CS4340). Also, add phy-handles for the dpmacs to their
associated PHY.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-29 11:10:54 +05:30
Ioana Ciornei
f660f7af1d arm: dts: lx2160ardb: add DPMAC and PHY nodes
In order to maintain compatibility with the Linux DTS, the entire fsl-mc
node is added but instead of being probed by a dedicated bus driver it
will be a simple-mfd.

Also, annotate the EMDIO1 node and describe the 2 AR8035 RGMII PHYs and
the 2 AQR107 PHYs. Also, add phy-handles for the dpmacs to their
associated PHY.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-29 11:10:54 +05:30
Ioana Ciornei
a369ee3364 arm: dts: ls1088a: add external MDIO nodes
Add the External MDIO1 device node found in the WRIOP global memory
region. This is needed for management of external PHYs.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-29 11:10:54 +05:30
Ioana Ciornei
0952d7cd9b arm: dts: ls2088a: add external MDIO nodes
Add the External MDIO1 device node found in the WRIOP global memory
region. This is needed for management of external PHYs.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-29 11:10:54 +05:30
Ioana Ciornei
8d34950238 arm: dts: lx2160a: add external MDIO nodes
Add the External MDIO device nodes found in the WRIOP global memory
region. This is needed for management of external PHYs.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-29 11:10:54 +05:30
Lin Jinhan
fb9230c53b arm: dts: rockchip: px30: add and enable rng node
Add enable rng node in px30-evb-u-boot.dtsi.

Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-04-29 10:30:55 +08:00
Lin Jinhan
91e858dcf6 arm: dts: rockchip: rk3399: add and enable rng node
Add rng node in rk3399-u-boot.dtsi and enable it in
rk3399-evb-u-boot.dtsi.

Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-04-29 10:30:40 +08:00
Marek Vasut
836f1ce6c7 ARM: dts: rmobile: Scrub unused DT nodes
Remove DT nodes which are not used by U-Boot, like audio and video in/out
nodes. This saves about 35 kiB on the resulting U-Boot binary without any
impact on functionality.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2020-04-29 00:28:34 +02:00
Marek Vasut
c7d681207d ARM: dts: rmobile: Synchronize Gen3 DTs with Linux 5.6.2
Synchronize R-Car Gen3 device trees with Linux 5.6.2,
commit 9fbe5c87eaa9b72db08425c52c373eb5f6537a0a .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2020-04-28 21:34:51 +02:00
Marek Vasut
329267fad2 ARM: dts: rmobile: Synchronize Gen2 DTs with Linux 5.6.2
Synchronize R-Car Gen2 device trees with Linux 5.6.2,
commit 9fbe5c87eaa9b72db08425c52c373eb5f6537a0a .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2020-04-28 21:34:51 +02:00
Kever Yang
2bffb72883 rockchip: px30-evb: remove redundant include file
The file <board name>-u-boot.dtsi inculde automatically by the build
system, no need to add this to dts file.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2020-04-28 20:47:44 +08:00
Kever Yang
1e1cb9539f rockchip: px30: add -u-boot dtsi for soc
Add soc level -u-boot.dtst so that boards can share the common nodes.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2020-04-28 20:47:44 +08:00
Suniel Mahesh
f9e2d9e889 arm: dts: rockchip: rk3399-roc-pc: Enable FE1.1 USB 2.0 HUB on roc-rk3399-pc
roc-rk3399-pc has an FE1.1 USB 2.0 HUB which connects two USB ports
(HOST1 and HOST2). For end devices to work we need to enable USB hub
so that HOST detects there presence and enumerates them accordingly.
This requires explicit pinctrl within gpio enablement.

Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-04-28 19:39:32 +08:00
Neil Armstrong
5110963c4b arm: dts: meson-khadas-vim3: enable SPI NOR flash
Enable the SPI flash controller and reduce the usable eMMC data pins to 4
to permit using the on-board SPI NOR Flash.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-04-28 10:23:10 +02:00
Neil Armstrong
b31950743a arm: dts: meson-gxm-khadas-vim2-u-boot: enable SPI NOR flash
Activate the on-board SPI NOR Flash by enabling the SPI controller and
disabling the DS eMMC pin in the VIM2 u-boot.dtsi file.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-04-28 10:23:10 +02:00
Neil Armstrong
3a7d6a9c8f arm64: dts: meson: sync dt and bindings from v5.7-rc1
Sync the device tree and dt-bindings from Linux v5.7-rc1 8f3d9f354286
("Linux 5.7-rc1").

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-04-28 10:23:10 +02:00
T Karthik Reddy
e86dce1c0c ARM: zynq: Add nand controller node in zynq-ces-nand dt
Add memory-controller@e000e000 node in zynq-ces-nand.dts as
zynq_nand driver utilizes flash@e1000000 node. Without this
dt node mini nand u-boot does not probe.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-27 14:21:18 +02:00
Michal Simek
14c0fbbc94 arm64: zynqmp: Fix irps5401 device nodes
- Do not use irps54012 as device node which is not correct.
- Fix addresses of irps5401/u180 on zcu104 revisions.
- Remove clock-cells property. It is PMIC without any clock output.
- Define irps5401 nodes in zynqmp-e-a2197

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-27 14:21:18 +02:00
Saeed Nowshadi
783814288b arm64: zynqmp: Add label to GPIO lines for boot mode and POR
Add label to GPIO lines controlling boot mode and POR EMIO pins so System
Controller can assert those lines on Versal.

Signed-off-by: Saeed Nowshadi <saeed.nowshadi@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-27 13:57:18 +02:00
Amit Singh Tomar
99d5ac6f15 arm: add Cubieboard7 board support
The Cubieboard is a single board computer containing a
Actions S700 SoC(with 4 ARMv8 Cortex-A53 cores).

This patch adds respective defconfig alongwith .dts(copied
from Linux v5.5-rc6 with hash "b3a987b0264d").

Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
2020-04-24 16:40:09 -04:00
Amit Singh Tomar
ea6314a797 arm: dts: actions: s700: add u-boot specific dtsi file
Devices like uart and clk are needed to be enabled before relocation.
this patch adds u-boot.dtsi file that mark these device as dm-pre-reloc.

Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
2020-04-24 16:40:09 -04:00
Amit Singh Tomar
1050eaa082 arm: actions: add S700 SoC device tree
This patch adds .dtsi file(sync with Linux 5.5-rc6 with hash "b3a987b0264d")
and required binding for S700 SoC that is a 64-bit Quad-core ARM
Cortex-A53 cores.

It also provisions dts file to be built based on selected
platform(CONFIG_MACH_S900/S700).

Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
2020-04-24 16:40:09 -04:00
Amit Singh Tomar
5bc4c0bccc arm: dts: actions: s900: add u-boot specific dtsi file
Devices like uart and clk are needed to be enabled before relocation.
This patch adds u-boot.dtsi file that mark these device as dm-pre-reloc.

Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
2020-04-24 16:40:09 -04:00
Amit Singh Tomar
4939beea8e arm: dts: sync dts for Action Semi S900
Synchronize device tree bindings with v5.5-rc6 tag with commit id
"b3a987b0264d".

Also, it removes older clock binding defined for S900 along with undocumented
compatible string "actions,s900-serial" from serial driver and adapts clock
driver to cater to new bindings.

Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
2020-04-24 16:40:09 -04:00
Marek Vasut
132e5b6898 ARM: dts: stm32: Split AV96 into DHCOR SoM and AV96 board
The AV96 is in fact an assembly of DH Electronics DHCOR SoM on top
of an AV96 reference board. Split the DTs to reflect that and make
sure to DHCOR SoM can be reused on other boards easily.

It is also highly recommended to configure the board for the DHCOM
make stm32mp15_dhcom_basic_defconfig
make DEVICE_TREE=stm32mp15xx-dhcor-avenger96
as that permits reusing the board code for the DH components, like
accessing and reading out the ethernet MAC from EEPROM.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Change-Id: I7db47280d4eb0d668eb4e006355240271154f97f
2020-04-24 15:52:48 +02:00
Marek Vasut
e5899099ab ARM: dts: stm32: Adjust PLL4 settings on AV96
The PLL4 is supplying SDMMC12, SDMMC3 and SPDIF with 120 MHz and
FDCAN with 96 MHz. This isn't good for the SDMMC interfaces, which
can not easily divide the clock down to e.g. 50 MHz for high speed
SD and eMMC devices, so those devices end up running at 30 MHz as
that is 120 MHz / 4. Adjust the PLL4 settings such that both PLL4P
and PLL4R run at 100 MHz instead, which is easy to divide to 50MHz
for optimal operation of both SD and eMMC, SPDIF clock are not that
much slower and FDCAN is also unaffected.

Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-04-24 15:50:40 +02:00
Patrick Delaunay
e7a0251d50 ARM: dts: stm32mp1: remove file stm32mp157-pinctrl.dtsi
Remove the unnecessary file stm32mp157-pinctrl.dtsi and
solve all issues introduced by the commit 8914831860 ("Merge branch
 'next'") after a conflict on the patch applied in the next branch in
commit 1a4f57c895 ("ARM: dts: stm32mp1: DT alignment with Linux 5.6-rc1")

Need to reapplied on stm32mp15-pinctrl.dtsi the the 3 patches
applied previously on file "stm32mp157-pinctrl.dtsi" in v2020.04
- commit 4fdbe6487d ("ARM: dts: stm32: Add alternate pinmux for SDMMC1
 direction pins")'
- commit 5fdcba6402 ("ARM: dts: stm32: Add alternate pinmux for SDMMC2
 pins 4-7")'
- commit 955de51111 ("ARM: dts: stm32: Add alternate pinmux for ethernet
 RGMII")'

Cc: Marek Vasut <marex@denx.de>

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-04-24 15:50:15 +02:00
Tom Rini
a063758059 Merge branch '2020-04-17-master-imports'
- Further cleanups for 'make refcheckdocs'
- Another BTRFS fix.
- Support for automatic decompression of images with booti as well as
  unlz4 command for manual decompression.
2020-04-20 17:22:47 -04:00
Tom Rini
e4837da782 - enable DM_RNG on meson boards
- fix SMBIOS info on Odroid-C2
 - Fix video output on GXBB/GXL/GXM boards
 - add USB gadget support for GXL/GXM boards
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEPVPGJshWBf4d9CyLd9zb2sjISdEFAl6dk4YACgkQd9zb2sjI
 SdHMkg//ZCBy73xx98g48WqZbeKGpLzpHCYuksa+RIk90tUH2VxpSX2RFPh9F3bs
 5RbzrzDXTgTRRaDPDGS4nDhAnmNnRaGZ0SMGY+2ilt6JD/GW6x1Q3xMJt4spd0Tv
 GnA9jhExZYN0eJampGMXSZX/kO2hjLs929uA+UccxdZZx+q45SPE2Q2tSE+B/3T7
 Owf3PMPLVLyPcdxTN2HBjMKsoPbOpBxIvfwXTucnL2SJE+tBMCdDiObwWSO7nfBa
 zlEntUO0tIOgNLtqDnjQ2o71xQawFMGL0m1vpLXAaS9UUk64tnxgPQewC668X2v/
 aBU7peaA6cMkjpQ4bnWVKnJ4sLS1YdvFaz68TkFSLRHBQLr6XBGcm1biXALhrpId
 e4Rjf6ONJH+mVZtH67vRxaFJ5tpNtDj0ZFM3kzppEeFc5q1ieQ+o+TAC2KmYpi6s
 hH2t3Fs2mh+pXYC9A0eeSXG5hxWKDoT4P8/Wx3DMmDn0cMWjrEZU/yJNUVti2fhO
 8er2NldRFEYmDGAKQ1yeYzUYemZjLFuUEAVZgRaARsjl07MoG0CTqGF8Yf1NwdIT
 xMHBdpjl5iTH4jvOYS5+MqPi7hrr1OCCE9FRwx9KeagudpBzko4HiF8IW5ilQdLb
 GDDqW4RnRv8sYiNsx5cUkQSvoqPfhazawFgrJck3jLqfiVZNKog=
 =1Ffl
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-amlogic-20200420' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic

- enable DM_RNG on meson boards
- fix SMBIOS info on Odroid-C2
- Fix video output on GXBB/GXL/GXM boards
- add USB gadget support for GXL/GXM boards
2020-04-20 13:44:27 -04:00
Tom Rini
62c59545ba Merge tag 'ti-v2020.07-rc1' of https://gitlab.denx.de/u-boot/custodians/u-boot-ti
- Fix boot on am335x guardian board
- Increase OPSI speed on AM65x and J721E devices
- Use JTAD register for identifying K3 devices.
- Update TI entry in MAINTAINERS file.
2020-04-20 11:14:22 -04:00
Neil Armstrong
a19e8a0f03 arm: dts: meson-gxl: Add USB Gadget nodes for U-Boot
Add the USB DWC2 node to u-boot specific dtsi files since Gadget
support is not (yet) available in upstream Linux yet.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-04-20 14:19:10 +02:00
Giulio Benetti
931edc6efb Add support for i.MXRT1020-EVK board
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2020-04-18 14:55:00 +02:00
Giulio Benetti
63d4dc5846 ARM: dts: imxrt1020: add dtsi file
Add dtsi file for i.MXRT1020.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2020-04-18 14:54:44 +02:00
Lukasz Majewski
4a45f4046b dts: imx: Add fixed-link property to HSC and DDC (imx53) devices
Those two boards are supposed to be run with a single u-boot binary.
There are notable differences though - HSC uses DSA switch (which
phy_id == 0x0) and DCC (DP83848C).

After the commit 3bf135b6c3
("drivers: net: phy: Ignore PHY ID 0 during PHY probing") the PHY devices
with phy_id == 0 are not created in U-Boot anymore. This caused regression
on HSC.

To fix this problem - the fec's 'fixed-link' node has been introduced and
the phy_id is not assessed anymore. This approach works on both boards.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2020-04-18 13:08:18 +02:00
Harald Seiler
2c8627110e ARM: imx6: DHCOM i.MX6 PDK: Fix usb-otg VBUS regulator
During the conversion of this board to DM_REGULATOR, usb-mass-storage
was broken and started failing with the following error:

        => ums 0 mmc 2
        UMS: LUN 0, dev 2, hwpart 0, sector 0x0, count 0xe90000
        Error enabling VBUS supply
        g_dnl_register: failed!, error: -38
        g_dnl_register failed

Fix this by adding the relevant GPIO to the regulator node.

Fixes: 4ca99fe81a ("ARM: imx: dh-imx6: Enable DM regulator")
Signed-off-by: Harald Seiler <hws@denx.de>
2020-04-18 13:00:35 +02:00
Harald Seiler
15df6b31b6 ARM: imx6: DHCOM i.MX6 PDK: Convert to DM_ETH
Use DM_ETH instead of legacy networking.  Add VIO as a fixed regulator
to the relevant device-trees and augment the FEC node with properties
for the reset GPIO.

It should be noted that the relevant properties for the reset GPIO
already exist in the PHY node (reset-gpios, reset-delay-us,
reset-post-delay-us) but U-Boot currently ignores those and only
supports the bus-level reset properties in the FEC node
(phy-reset-gpios, phy-reset-duration, phy-reset-post-delay).

Signed-off-by: Harald Seiler <hws@denx.de>
2020-04-18 13:00:07 +02:00
Fabio Estevam
4c13a4db60 wandboard: Fix version detection for mx6q/mx6dl revD1
The detection of the revD1 version is based on the presence of the PMIC.

Currently revb1 device trees are used for mx6q/mx6dl variants, which
do not have the PMIC nodes.

This causes revD1 boards to be incorrectly be detected as revB1.

Fix this issue by using the revd1 device trees, so that the PMIC node can be
found and then the PMIC can be detected by reading its register ID.

Imported the revd1 device trees from mainline kernel version 5.7-rc1.

Reported-by: Heiko Schocher <hs@denx.de>
Reported-by: Derek Atkins <derek@ihtfp.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Derek Atkins <derek@ihtfp.com>
Tested-by: Heiko Schocher <hs@denx.de>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
2020-04-18 12:59:23 +02:00
Giulio Benetti
587e09800c arch: arm: dts: imxrt1050-evk: add lcdif node
Add lcdif node and its pinctrl.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-04-18 12:54:43 +02:00
Giulio Benetti
22aa286ef4 ARM: dts: imxrt1050: allow this dtsi file to be compiled in Linux
Linux doesn't provide skeleton.dtsi file so let's remove its include and
provide #address-cells/size-cells = <1> that were defined in
skeleton.dtsi before.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-04-18 12:54:43 +02:00
Giulio Benetti
bb8af5fb6a ARM: dts: i.mxrt1050: add lcdif node
Add lcdif node to SoC.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-04-18 12:54:43 +02:00
Michael Krummsdorf
acdbe52674 arm: dt: imx6qdl: add tqma6[qdl] som on mba6 mainboard
The device trees for TQMa6x SOM support variations in
- CPU type: imx6dl- or imx6q-
- MBa6 I2C bus access: -mba6a (i2c1) or -mba6b (i2c3)
  (plus the respective common/module include trees)

- USBH1 is directly connected to a hub
- USBOTG is connected to a separate connector
  and can act as host/device or full OTG port.

Signed-off-by: Michael Krummsdorf <michael.krummsdorf@ew.tq-group.com>
2020-04-17 18:57:55 +02:00
Sam Shih
25a1b5efb3 arm: dts: add pwm support for MediaTek SoCs
This patch add pwm support for mt7622, mt7623 and mt7629 SoCs

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
2020-04-17 12:32:36 -04:00
Neil Armstrong
c8ccca921a arm64: dts: meson-gx: add back dmc register range until canvas driver is available
The Linux VPU bindings have changed and dropped the dmc register range.

Add it back in the meson-gx-u-boot.dtsi file until a proper canvas driver
is available.

Fixes: dd5f2351e9 ("arm64: dts: meson: sync dt and bindings from v5.6-rc2")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-04-16 16:25:51 +02:00
Neil Armstrong
ae9bf79bed ARM: dts: add missing meson-gxl-s805x-libretech-ac-u-boot.dtsi file
The libretech-ac u-boot.dtsi file is missing to enabled DT nodes changes
to enable Video output on U-Boot.

Fixes: 671b1db8f8 ("arm64: dts: meson-gx: vpu should be probed before relocation")
Reported-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Jerome Brunet <jbrunet@baylibre.com>
2020-04-16 09:29:00 +02:00
Marek Vasut
9528f8ac81 ARM: dts: stm32: Rename LEDs to match silkscreen on AV96
The LED labels do not match the silkscreen on the board, fix it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2020-04-15 09:09:21 +02:00
Marek Vasut
de80a2476a ARM: dts: stm32: Add KS8851-16MLL ethernet on FMC2
Add DT entries, Kconfig entries and board-specific entries to configure
FMC2 bus and make KS8851-16MLL on that bus accessible to U-Boot.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-04-15 09:08:29 +02:00
Tom Rini
142a07f2a4 Merge branch 'master' of git://git.denx.de/u-boot-marvell
- Misc enhancements to Clearfog, including board variant detection
  (Joel)
- Misc enhancements to Turris Mox, including generalization of the
  ARMADA37xx DDR size detection (Marek)
2020-04-14 08:47:07 -04:00
Marek Behún
9e4cdbabac arm: mvebu: dts: turris_mox: fix USB3 regulator
Commit e8e9715df2 requires the USB3 regulator node to have the
enable-active-high property for the regulator to work properly. The
GPIO_ACTIVE_HIGH constant is not enough anymore.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Fixes: e8e9715df2 ("regulator: fixed: Modify enable-active-high...")
Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-14 13:16:42 +02:00
Marek Behún
eddd6f90c9 arm: mvebu: dts: turris_mox: update sdhci properties
With recent changes to the mmc subsystem (chip detect code etc) update
the sdhci node of the Turris Mox device tree.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-14 13:16:42 +02:00
Joel Johnson
a8d0aa31bd arm: mvebu: solidrun: remove hardcoded DTS MAC address
Using a consistent hardcoded MAC address from the DTS file causes
issues when using multiple devices on the same network segment.
Instead rely on environment configuration or random generation.

Signed-off-by: Joel Johnson <mrjoel@lixil.net>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-14 13:16:42 +02:00
Josip Kelecic
5e2de83f71 arm: mvebu: dts: Sort Armada series dts alphabetically
Sort the Armada series dts in the Makefile alphabetically
prior to adding new board support.

Signed-off-by: Josip Kelečić <josip.kelecic@sartura.hr>
Reviewed-by: Luka Kovacic <luka.kovacic@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-14 13:15:26 +02:00
Vignesh Raghavendra
aaf55800a3 arm: dts: k3-j721e: Increase OSPI default frequency to 50MHz
In 1 bit mode OSPI can work at upto 50MHz, this provides better write
performance. Therefore increase frequency from 40MHz to 50MHz

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-04-14 15:44:48 +05:30
Vignesh Raghavendra
d5a1f4f551 arm: dts: k3-am654: Increase OSPI default frequency to 50MHz
In 1 bit mode OSPI can work at upto 50MHz, this provides better write
performance. Therefore increase frequency from 40MHz to 50MHz

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-04-14 15:44:48 +05:30
Moses Christopher
a31216772a am335x, guardian: load env from NAND
- As there is a requirement to store certain data, we need a persistent
    storage in u-boot. Hence, we need to save env in NAND

  - Add default Guardian environment variables

  - Update partition table:
    - Reserve some space for experimentation, this ensures proper
      backwards compatibility

  - Update defconfig accordingly

Signed-off-by: Moses Christopher <BollavarapuMoses.Christopher@in.bosch.com>
2020-04-14 15:44:48 +05:30
Moses Christopher
f2330691d9 am335x, guardian: boot stage feedback in headless mode
This patch enables the guardian board to provide feedback
  about the boot stage in headless mode. The on-board led
  would behave in the following pattern

    * U-boot -> GLOW LED
    * Linux  -> BLINK LED [HEART-BEAT PATTERN]

Signed-off-by: Moses Christopher <BollavarapuMoses.Christopher@in.bosch.com>
2020-04-14 15:44:48 +05:30
Tom Rini
2af31afc7a Merge branch 'master' of git://git.denx.de/u-boot-socfpga 2020-04-13 16:06:51 -04:00
Tom Rini
8914831860 Merge branch 'next'
Pull in changes that have been pending in our 'next' branch.  This
includes:
- A large number of CI improvements including moving to gcc-9.2 for all
  platforms.
- amlogic, xilinx, stm32, TI SoC updates
- USB and i2c subsystem updtaes
- Re-sync Kbuild/etc logic with v4.19 of the Linux kernel.
- RSA key handling improvements
2020-04-13 11:27:00 -04:00
Ley Foon Tan
3958ef307e arm: socfpga: arria10: Enable cache driver in SPL
Adding "u-boot,dm-pre-reloc" and enable CONFIG_SPL_CACHE
to enable cache driver in SPL.

This fixed error below in SPL:
cache controller driver NOT found!

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2020-04-13 13:49:51 +02:00
Ley Foon Tan
5feb5e3215 arm: dts: arria10: Update dtsi/dts from Linux
Update these 3 files from Linux:.
- socfpga_arria10.dtsi (Commit ID c1459a9d7e92)
- socfpga_arria10_socdk.dtsi (Commit ID d9b9f805ee2b)
- socfpga_arria10_socdk_sdmmc.dts (Commit ID 17808d445b6f)

Change in socfpga_arria10.dtsi:
- Add clkmgr label, so that can reference to it in u-boot.dtsi.

Change in socfpga_arria10-u-boot.dtsi:
- Add compatible and altr,sysmgr-syscon for uboot.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2020-04-13 13:49:51 +02:00
Ley Foon Tan
f3fccb12c0 arm: dts: arria10: Move uboot specific properties to u-boot.dtsi
Move Uboot specific properties to *u-boot.dtsi files.
Preparation to sync Arria 10 device tree from Linux.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2020-04-13 13:49:51 +02:00
Marek Vasut
8876f89640 ARM: socfpga: Enable DM RTC bootcount on ABB SECU1
Add and enable RTC-backed boot counter on ABB SECU1 platform.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
2020-04-13 13:49:51 +02:00
Tom Rini
1ebf50d9bb - clk: meson-g12a: missing break
- sync all Amlogic DT from Linux v5.6-rc2
 - MMC clock fixups
 - add support for Libre Computer AML-S905D-PC and AML-S912-PC
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEPVPGJshWBf4d9CyLd9zb2sjISdEFAl6K4bQACgkQd9zb2sjI
 SdFpIw//QZbwDYFJWb7m3OuutceTWwx6sB/vjYjUBzkRZLBKOWn1WdKmt3PHHcHB
 Mj1CrUGaK29TVSyC654Sn7W75WMWJOQsvLwZVIc+TA6gOGU0P0khn/LitHgIyn9r
 Fo8wCxD9ohVQLfDcgWn/KRkTdX++Sx1IxURvc1ebd82W507XyTjf8dLjgDA6rETF
 3dVlnR/el/UojG0MhxaIce/GVldNukC4Y02Imuw9bV1DvhiXp1GnzVaXqmlChxkr
 rqoKFBelh5c2I85xm8+FunUX9wCDPuMXE75pFOwVX5imAekExaVaZA+y78hWIUTg
 bEFT6Ug0PWaLzZCJAkPKzE3+flJk4tXbG9oXsPIfgGWm7KoC3Lzd6mstpOMzq55V
 NMxvPrFJo7bmPZNM7sIbB/KQYBB1r9dnV+UANXHiRS2G7acBDpueuPX6ki6wiG4v
 OlwfcWGWTk+6ci0271a/05B4rclZqM33rbRUGlheEpHrFPINXksaArdaY1Pl5FIu
 kuP6wg5lyF4G1QuFE68K8OidJticchzh116D6ccD9z3Z5s2KTg555Wp83lLLe+Zi
 2YtNYtEr1yiCUDO9OBaYTHzDK/Tfj5Xz2q1Bny6YAyN48NTiOoeK6R9ZsAyXLDK1
 Qn/rjHR31ZyrnZ7OZ7GQ/rqfyfZDD+/Fq9mDZ9+ScYe0QFpTwY4=
 =PiOt
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-amlogic-20200406' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic into next

- clk: meson-g12a: missing break
- sync all Amlogic DT from Linux v5.6-rc2
- MMC clock fixups
- add support for Libre Computer AML-S905D-PC and AML-S912-PC
2020-04-08 08:48:31 -04:00
Tom Rini
1f47e2aca4 Xilinx changes for v2020.07
common:
 - Align ENV_FAT_INTERFACE
 - Fix MAC address source print log
 - Improve based autodetection code
 
 xilinx:
 - Enable netconsole
 
 Microblaze:
 - Setup default ENV_OFFSET/ENV_SECT_SIZE
 
 Zynq:
 - Multiple DT updates/fixes
 - Use DEVICE_TREE environment variable for DTB selection
 - Switch to single zynq configuration
 - Enable NOR flash via DM
 - Minor SPL print removal
 - Enable i2c mux driver
 
 ZynqMP:
 - Print multiboot register
 - Enable cache commands in mini mtest
 - Multiple DT updates/fixes
 - Fix firmware probing when driver is not enabled
 - Specify 3rd backup RAM boot mode in SPL
 - Add SPL support for zcu102 v1.1 and zcu111 revA
 - Redesign debug uart enabling and psu_init delay
 - Enable full u-boot run from EL3
 - Enable u-boot.itb generation without ATF with U-Boot in EL3
 
 Versal:
 - Enable distro default
 - Enable others SPI flashes
 - Enable systems without DDR
 
 Drivers:
 - Gem:
   - Flush memory after freeing
   - Handle mdio bus separately
 - Watchdog:
   - Get rid of unused global data pointer
   - Enable window watchdog timer
 - Serial:
   - Change reinitialization logic in zynq serial driver
 -----BEGIN PGP SIGNATURE-----
 
 iF0EABECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCXoxw9wAKCRDKSWXLKUoM
 IbQxAKCK23yTy4FoN8oTGTYsbmLOA9kVUQCbBx8lg4nBeA8ihSaAnY+HMDF37YI=
 =Lg54
 -----END PGP SIGNATURE-----

Merge tag 'xilinx-for-v2020.07' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into next

Xilinx changes for v2020.07

common:
- Align ENV_FAT_INTERFACE
- Fix MAC address source print log
- Improve based autodetection code

xilinx:
- Enable netconsole

Microblaze:
- Setup default ENV_OFFSET/ENV_SECT_SIZE

Zynq:
- Multiple DT updates/fixes
- Use DEVICE_TREE environment variable for DTB selection
- Switch to single zynq configuration
- Enable NOR flash via DM
- Minor SPL print removal
- Enable i2c mux driver

ZynqMP:
- Print multiboot register
- Enable cache commands in mini mtest
- Multiple DT updates/fixes
- Fix firmware probing when driver is not enabled
- Specify 3rd backup RAM boot mode in SPL
- Add SPL support for zcu102 v1.1 and zcu111 revA
- Redesign debug uart enabling and psu_init delay
- Enable full u-boot run from EL3
- Enable u-boot.itb generation without ATF with U-Boot in EL3

Versal:
- Enable distro default
- Enable others SPI flashes
- Enable systems without DDR

Drivers:
- Gem:
  - Flush memory after freeing
  - Handle mdio bus separately
- Watchdog:
  - Get rid of unused global data pointer
  - Enable window watchdog timer
- Serial:
  - Change reinitialization logic in zynq serial driver

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-04-07 17:13:35 -04:00
Igor Opaniuk
eb719060ab ARM: dts: imx8qxp-colibri: dm-pre-proper for pd_dma nodes
pd_dma_* nodes should be accessible during pre-relocation stage of
U-Boot proper for properly handling power domains.

This fixes the issue with permanent failing of invocation of
power_domain_get_by_index() in the common code of DM power domain
uclass (drivers/power/domain/power-domain-uclass.c).

Fixes: f0cc4eae9a ("core: device: use dev_power_domain_on")
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-04-07 10:41:10 +02:00
Igor Opaniuk
8fe92b8045 ARM: dts: imx8qm-apalis: dm-pre-proper for pd_dma nodes
pd_dma_* nodes should be accessible during pre-relocation stage of
U-Boot proper for properly handling power domains.

This fixes the issue with permanent failing of invocation of
power_domain_get_by_index() in the common code of DM power domain
uclass (drivers/power/domain/power-domain-uclass.c).

Fixes: f0cc4eae9a ("core: device: use dev_power_domain_on")
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-04-07 10:41:07 +02:00
Igor Opaniuk
67c8e2826b ARM: dts: imx8qxp-colibri: replace dm-spl with dm-pre-proper
For non-SPL/TPL setups dm-spl, dm-tpl, dm-pre-proper, dm-pre-reloc are
handled equally, forcing the nodes with these properties
to be accessible and device being probed
before pre-relocation of U-Boot proper (drivers/core/util.c):

bool ofnode_pre_reloc(ofnode node)
{
    /* for SPL and TPL the remaining nodes after the fdtgrep 1st pass
     * had property dm-pre-reloc or u-boot,dm-spl/tpl.
     * They are removed in final dtb (fdtgrep 2nd pass)
     */
    return true;
    if (ofnode_read_bool(node, "u-boot,dm-pre-reloc"))
        return true;
    if (ofnode_read_bool(node, "u-boot,dm-pre-proper"))
        return true;

    /*
     * In regular builds individual spl and tpl handling both
     * count as handled pre-relocation for later second init.
     */
    if (ofnode_read_bool(node, "u-boot,dm-spl") ||
        ofnode_read_bool(node, "u-boot,dm-tpl"))
        return true;

    return false;
}

Howewer, to avoid confusion in future, replace dm-spl
`%s/dm-spl/dm-pre-proper/g` properties to dm-pre-proper
to explicitly state that they are handled during pre-relocation
stage of U-Boot proper.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-04-07 10:41:02 +02:00
Igor Opaniuk
99897dd80d ARM: dts: imx8qm-apalis: replace dm-spl with dm-pre-proper
For non-SPL/TPL setups dm-spl, dm-tpl, dm-pre-proper, dm-pre-reloc are
handled equally, forcing the nodes with these properties
to be accessible and device being probed
before pre-relocation of U-Boot proper (drivers/core/util.c):

bool ofnode_pre_reloc(ofnode node)
{
    /* for SPL and TPL the remaining nodes after the fdtgrep 1st pass
     * had property dm-pre-reloc or u-boot,dm-spl/tpl.
     * They are removed in final dtb (fdtgrep 2nd pass)
     */
    return true;
    if (ofnode_read_bool(node, "u-boot,dm-pre-reloc"))
        return true;
    if (ofnode_read_bool(node, "u-boot,dm-pre-proper"))
        return true;

    /*
     * In regular builds individual spl and tpl handling both
     * count as handled pre-relocation for later second init.
     */
    if (ofnode_read_bool(node, "u-boot,dm-spl") ||
        ofnode_read_bool(node, "u-boot,dm-tpl"))
        return true;

    return false;
}

Howewer, to avoid confusion in future, replace dm-spl
`%s/dm-spl/dm-pre-proper/g` properties to dm-pre-proper
to explicitly state that they are handled during pre-relocation
stage of U-Boot proper.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-04-07 10:40:56 +02:00
Michal Simek
47cc45a91c arm64: zynqmp Add support for zcu102 rev1.1
rev1.1 has different DDR sodimm module that's why it requires different DDR
configuration.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:52:45 +02:00
Michal Simek
f7375aff95 ARM: zynq: Enable DM for CFI NOR flash
With multi defconfig NOR flash information about NOR should be taken from
DT that's why there is no reason to specify address and sizes via fixed
config.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:52:45 +02:00
Michal Simek
7c49a6d08e ARM: zynq: Do not include full zynq-7000.dtsi to cse-nor configuration
There is no real need to include full DT when only some nodes are enough to
use. It will save some space.

Retested with FSBL for initial SoC setup. SPL didn't work.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:51:31 +02:00
Michal Simek
f5a122e2ab ARM: zynq: Change zc770 xm011 Nand x16 configurations
Instead of symlink include origin file and just change model description.
Difference is not in DT but in ps7_init configurations which is taken based
on device tree name that's why the same DT can't be used.

Also update model and update comments to match configurations.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:51:31 +02:00
Michal Simek
00fb945cf5 arm64: zynqmp: Move pinctrl node under firmware node
Pinctrl is handled via firmare interface that's why move it there without
reg property and new compatible string.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:51:31 +02:00
Michal Simek
ba19690287 arm64: zynqmp: Fix GIC compatible property
dtbs_check is showing warning around GIC compatible property as
interrupt-controller@f9010000: compatible: ['arm,gic-400', 'arm,cortex-a15-gic']
is not valid under any of the given schemas

Similar change has been done also by Linux kernel commit 5400cdc1410b
("ARM: dts: sunxi: Fix GIC compatible")

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:51:31 +02:00