The ti816x/am389x SoC is the first generation in what U-Boot calls the
"am33xx" family. In the first generation of this family the DDR
initialization sequence is quite different from all of the subsequent
generations. Whereas with ti814x (second generation) we can easily work
the minor differenced between that and am33xx (third generation), our
attempts to do this for ti816x weren't sufficient. Rather than add a
large amount of #ifdef logic to make this different sequence work we add
a new file, ti816x_emif4.c to handle the various required undocumented
register writes and sequence and leverage what we can from
arch/arm/mach-omap2/am33xx/ddr.c still. As DDR2 has similar problems
today but I am unable to test it, we drop the DDR2 defines from the code
rather than imply that it works by leaving it. We also remove a bunch
of other untested code about changing the speed the DDR runs at.
Signed-off-by: Tom Rini <trini@konsulko.com>
Orangepi Prime is an open-source single-board computer
using the Allwinner h5 SOC.
H5 Orangepi Prime has
- Quad-core Cortex-A53
- 2GB DDR3
- Debug TTL UART
- 1000M/100M Ethernet RJ45
- Three USB 2.0
- HDMI
- Audio and MIC
- Wifi + BT
- IR receiver
- HDMI
- Wifi + BT
Boot from MMC:
-------------
U-Boot SPL 2017.05-00662-ga3f4c05-dirty (May 25 2017 - 13:30:14)
DRAM: 2048 MiB
Trying to boot from MMC1
NOTICE: BL3-1: Running on H5 (1718) in SRAM A2 (@0x44000)
NOTICE: Configuring SPC Controller
NOTICE: BL3-1: v1.0(debug):aa75c8d
NOTICE: BL3-1: Built : 18:28:27, May 24 2017
INFO: BL3-1: Initializing runtime services
INFO: BL3-1: Preparing for EL3 exit to normal world
INFO: BL3-1: Next image address: 0x4a000000, SPSR: 0x3c9
U-Boot 2017.05-00662-ga3f4c05-dirty (May 25 2017 - 13:30:14 +0000) Allwinner Technology
CPU: Allwinner H5 (SUN50I)
Model: OrangePi Prime
DRAM: 2 GiB
MMC: SUNXI SD/MMC: 0
*** Warning - bad CRC, using default environment
In: serial
Out: serial
Err: serial
Net: phy interface7
eth0: ethernet@1c30000
starting USB...
USB0: USB EHCI 1.00
USB1: USB OHCI 1.0
scanning bus 0 for devices... 1 USB Device(s) found
scanning usb for storage devices... 0 Storage Device(s) found
Hit any key to stop autoboot: 0
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
When U-Boot boots from EL2, skip some lowlevel init code requiring
EL3, including CCI-400/CCN-504, trust zone, GIC, etc. These
initialization tasks are carried out before U-Boot runs. This applies
to the RAM version image used for SPL boot if PPA is loaded first.
Signed-off-by: York Sun <york.sun@nxp.com>
DPAA2 platforms boot the Management Complex based on the u-boot env
variable "mcinitcmd". Instead of doing this step on each platform
individually, define a single mc_env_boot function in the MC driver,
since it's semantically tied to it.
Call the function in a per-board reset_phy hook, as it gets called at a
later moment, when all board PHY devices have been initialized.
Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
Signed-off-by: Heinz Wrobel <heinz.wrobel@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Add a sandbox board to test the non-livetree build (i.e. with
CONFIG_OF_FLAT disabled). This increases our build and test coverage.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add support for requesting GPIOs with a live device tree.
This involves adjusting the function signature for the legacy function
gpio_request_by_name_nodev(), so fix up all callers.
Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes to stm32f746-disco.c:
Signed-off-by: Tom Rini <trini@konsulko.com>
Enable CONFIG_DM_MMC_OPS and CONFIG_BLK for all Tegra devices. This moves
Tegra to use driver model fully for MMC.
Signed-off-by: Simon Glass <sjg@chromium.org>
This header includes things that are needed to make driver build. Adjust
existing users to include that always, even if other dm/ includes are
present
Signed-off-by: Simon Glass <sjg@chromium.org>
BPI-M64 is a 64-bit quad-core mini single board computer
using the Allwinner A64 SOC.
BPI-M64 features
- 1.2 Ghz Quad-Core ARM Cortex A53
- 2GB DDR3 SDRAM with 733MHz
- MicroSD/eMMC(8GB)
- 10/100/1000Mbps ethernet (Realtek RTL8211E/D)
- Wifi + BT
- IR receiver
- Audio In/Out
- Video In/Out
- 5V 2A DC power-supply
For dts file,
Sync with Linux commit 4879b7ae("Merge tag 'dmaengine-4.12-rc1'").
Boot from MMC:
-------------
U-Boot SPL 2017.05-00667-g85dd258-dirty (May 29 2017 - 13:07:31)
DRAM: 2048 MiB
Trying to boot from MMC1
NOTICE: BL3-1: Running on A64/H64 (1689) in SRAM A2 (@0x44000)
NOTICE: Configuring SPC Controller
NOTICE: BL3-1: v1.0(debug):aa75c8d
NOTICE: BL3-1: Built : 18:28:27, May 24 2017
NOTICE: Configuring AXP PMIC
NOTICE: PMIC: setup successful
INFO: BL3-1: Initializing runtime services
INFO: BL3-1: Preparing for EL3 exit to normal world
INFO: BL3-1: Next image address: 0x4a000000, SPSR: 0x3c9
U-Boot 2017.05-00667-g85dd258-dirty (May 29 2017 - 13:07:31 +0000) Allwinner Technology
CPU: Allwinner A64 (SUN50I)
Model: BananaPi-M64
DRAM: 2 GiB
MMC: SUNXI SD/MMC: 0, SUNXI SD/MMC: 1
*** Warning - bad CRC, using default environment
In: serial
Out: serial
Err: serial
Net: No ethernet found.
starting USB...
No controllers found
Hit any key to stop autoboot: 0
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Currently these (board agnostic) commands cannot be selected using
menuconfig and friends. Fix this the obvious way. As part of this,
don't muddle the meaning of CONFIG_HASH_VERIFY to mean both 'hash -v'
and "we have a hashing command" as this makes the Kconfig logic odd.
Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
[trini: Re-apply, add imply for a few cases, run moveconfig.py, also
migrate CRC32_VERIFY]
Signed-off-by: Tom Rini <trini@konsulko.com>
Engicam has several SOM's on i.MX6 stream, where each SOM
has one include/configs/*.h file, this patch generate single
config file for all SOM's include/configs/imx6-engicam.h
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
The maximum SD clock frequency in High Speed mode is 50 MHz. This change
makes it possible to get 48 MHz from the USB PLL (240 MHz / 5 / 1)
instead of the previous 33.25 MHz from the AHB clock (133 MHz / 2 / 2).
Signed-off-by: Benoît Thébaudeau <benoit@wsystem.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Add the initial support for pico-imx7d board based on Wig Cheng's
source code.
Add support for eMMC, USB gadget, I2C, PMIC and Ethernet.
For more information about this board, please visit:
http://www.technexion.org/products/pico/pico-som/pico-imx7-emmc
Signed-off-by: Vanessa Maegima <vanessa.maegima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Use GPIO19 which is wired to the uSOM phy reset signal in order to reset
the uSOM's 1512 Gigabit Ethernet phy.
This GPIO is valid on ClearFog rev 2.1 and newer.
Taken from SolidRun's specialised u-boot, see
f906e3df17
Signed-off-by: Patrick Wildt <patrick@blueri.se>
Signed-off-by: Stefan Roese <sr@denx.de>
NanoPi M1 is a board based on Allwinner H3 CPU.
This commit adds the support for this platform with:
- an include device tree which enables UART, LEDs, GPIO key switch,
1 USB host ports and the SD-card as a dtsi file.
- a device tree specific to this board that enables the
2 additional USB ports
- a defconfig file for minimal support
- a section in MAINTAINERS (add myself)
Synchronized with the kernel device tree, from commits:
sun8i-nanopi.dtsi: 85d2913614d9ab899d23b7ab7d22d23cf45bd1de
sun8i-h3-nanopi-m1.dts: 10efbf5f16336b7540ad6a16aa1cb0b26bab033b
Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
This patch adjusts memory map for secure boot headers on LS2080AQDS
and LS2080ARDB platforms. Secure boot headers are placed on NOR
flash at offset 0x00600000.
Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
This patch is to adjust the memory mapping for FLash/SD card on
LS1046AQDS and LS1046ARDB, such as FMAN firmware load address, U-Boot
start address on serial flash and environment address.
Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
LS2081ARDB board is similar to LS2080ARDB board with few differences
It hosts LS2081A SoC
Default boot source is QSPI-boot
It does not have IFC interface
RTC and QSPI flash device are different
It provides QIXIS access via I2C
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
QSPI-boot is supported on LS2088ARDB RevF board with LS2088A SoC.
LS2088ARDB RevF Board has limitation that QIXIS can not be accessed.
CONFIG_FSL_QIXIS is not enabled.
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Update QIXIS related code to be executed only if CONFIG_FSL_QIXIS
flag is enabled. In case QIXIS code is not enabled, use default
sysclk value as 100MHz per board documentation.
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
This allows using PCIe NIC without enabling DPAA FMan.
Signed-off-by: York Sun <york.sun@nxp.com>
CC: Mingkai Hu <mingkai.hu@nxp.com>
Acked-by: Mingkai Hu <mingkai.hu@nxp.com>
This allows using PCIe NIC without enabling DPAA FMan.
Signed-off-by: York Sun <york.sun@nxp.com>
CC: Mingkai Hu <mingkai.hu@nxp.com>
Acked-by: Mingkai Hu <mingkai.hu@nxp.com>
LS2080ARDB/LS2088ARDB RevF board has smart voltage translator
which needs to be programmed to enable high speed SD interface
by setting GPIO4_10 output to zero.
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
In situations like an autobuilder we are likely to not have bl31.bin
present and thus would fail to build and propagate the error upwards.
Instead, print a big warning to stderr so that human will see that
something is wrong but complete the build.
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
trini: Make Kconfig SPL_xxx entires only show if SPL, so that we don't
get Kconfig errors on platforms without SPL, ie sandbox (without SPL).
Signed-off-by: Tom Rini <trini@konsulko.com>
At present IDE support is controlled by CONFIG_CMD_IDE. Add a separate
CONFIG_IDE option so that IDE support can be enabled without requiring
the 'ide' command.
Update existing users and move the ide driver into drivers/block since
it should not be in common/.
Signed-off-by: Simon Glass <sjg@chromium.org>
This converts the following to Kconfig:
CONFIG_CMD_HD44760
Also drop CONFIG_CMD_HD44780 which appears to be a typo.
Signed-off-by: Simon Glass <sjg@chromium.org>
This converts the following to Kconfig:
CONFIG_CMD_HASH
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Rework slightly, enable on some boards again]
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_CMD_ESBC_VALIDATE
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_CMD_EEPROM
CONFIG_CMD_EEPROM_LAYOUT
CONFIG_EEPROM_LAYOUT_HELP_STRING
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Rework Kconfig logic slightly, define EEPROM location on TI eval
platforms]
Signed-off-by: Tom Rini <trini@konsulko.com>
This subsystem is quite old. It has been replaced with a driver-model
version (UCLASS_THERMAL). Boards are free to convert to that if required,
but here is a removal patch that could be applied in the meantime.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Commit 94e3c8c4fd ("crypto/fsl - Add progressive hashing support
using hardware acceleration.") created entries for CONFIG_SHA1,
CONFIG_SHA256, CONFIG_SHA_HW_ACCEL, and CONFIG_SHA_PROG_HW_ACCEL.
However, no defconfig has migrated to it. Complete the move by first
adding additional logic to various Kconfig files to select this when
required and then use the moveconfig tool. In many cases we can select
these because they are required to implement other drivers. We also
correct how we include the various hashing algorithms in SPL.
This commit was generated as follows (after Kconfig additions):
[1] tools/moveconfig.py -y SHA1 SHA256 SHA_HW_ACCEL
[2] tools/moveconfig.py -y SHA_PROG_HW_ACCEL
Note:
We cannot move SHA_HW_ACCEL and SHA_PROG_HW_ACCEL simultaneously
because there is dependency between them.
Cc: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Cc: Naveen Burmi <NaveenBurmi@freescale.com>
Cc: Po Liu <po.liu@freescale.com>
Cc: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Cc: Priyanka Jain <Priyanka.Jain@freescale.com>
Cc: Shaohui Xie <Shaohui.Xie@freescale.com>
Cc: Chunhe Lan <Chunhe.Lan@freescale.com>
Cc: Chander Kashyap <k.chander@samsung.com>
Cc: Steve Rae <steve.rae@raedomain.com>
Cc: Dirk Eibach <eibach@gdsys.de>
Cc: Feng Li <feng.li_2@nxp.com>
Cc: Alison Wang <alison.wang@freescale.com>
Cc: Sumit Garg <sumit.garg@nxp.com>
Cc: Mingkai Hu <Mingkai.Hu@freescale.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Akshay Saraswat <akshay.s@samsung.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_SPL_BOARD_INIT
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
[trini: Update the Kconfig logic]
Signed-off-by: Tom Rini <trini@konsulko.com>
Add minor ifdeffery and default board config for the Salvator-XS board
with R8A7796 M3 SoC.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Rename the salvator-x_defconfig to r8a7795_salvator-x_defconfig in
preparation for the r8a7796 support on salvator-x board.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Instead of counting only the DRAM in the first slot, count
all the DRAM in all slots and report it accordingly.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Add support for the EHCI USB.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Add support for rebooting the board using the ROHM BD9571MWV I2C PMIC,
but keep the CPU reboot option as a fallback.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Add support for the AVB ethernet on the Salvator-X board.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Add support for the SD card slots on the Salvator-X board.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
The UART uses internal SCIF clock except on R8A7795 H3 WS1.0 .
Use the internal clock and ignore the early version of the chip.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
The macro is used twice in the salvator-x board file, drop one.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Reset ENET_RST_B to make ENET function stable.
Since DM_GPIO enabled, we use "gpio_spi@0_5" which corresponds
to ENET_RST_B.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Enable more DM drivers. The imx I2C/MMC DM drivers needs DM_GPIO
enabled. The 74x164 drivers needs SOFT_SPI and DM_GPIO enabled.
So needs to enable them together.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Early backports of the imx wdog external reset feature occured before the
property was accepted upstream and used 'ext-reset-output' instead of
'fsl,ext-reset-output'. In order to support older kernels remove both
properties.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Now that mx6sabresd_spl_defconfig can be used to boot all
mx6sabresd variants, the non-SPL targets can be safely removed.
Signed-off-by: Fabio Estevam <fabio.estvam@nxp.com>
Add support for the mx6dlsabresd board in SPL.
Retrieved the DCD table from:
board/freescale/mx6sabresd/mx6dlsabresd.cfg
(NXP U-Boot branch imx_v2015.04_4.1.15_1.0.0_ga)
Flashed SPL and u-boot.img to an SD card and could successfully boot it
on mx6q, mx6qp and mx6dl sabresd boards.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Currently only MX6Q/QP sabresd boards are supported in SPL.
In order to also support MX6DL we need to convert to using
IOMUX_PADS and SETUP_IOMUX_PADS macros.
Other than that move the <asm/arch/mx6-ddr.h> header inclusion to the
SPL code block in order to avoid build error.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Move board_late_init into common area from supported boards.
Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Move possible common board code into common area
from supported boards.
Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
SPL code for geam6 and isiot are same, so
move them in common area.
Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
SPL code for icorem6 and icorem6_rqs are same, so
move them in common area.
Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Add generic SETUP_IOMUX_PADS function, for imx6ul mux pads
and use them in Is.IoT board.
Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
mmc2 in Is.IoT using usdhc1_pads instead usdhc2_pads,
so update the same.
Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Usually the drive strength values for DQ and SDL are 0x30 and
0x28 respectively, update them accordingly.
Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Since, u-boot handle fdt through uart so move the UART code
to SPL instead make it to global area.
Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
SPL FIT is able to pick the suitable fdt file for u-boot,
so add that function through board_fit_config_name_match.
Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Let the runtime code can set the mmcdev and mmcroot based
on the devno using mmc_get_env_dev instead of defining
separately in build-time configs using mmc_late_init func.
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Add runtime, modeboot env which is setting mmcboot, or
nandboot based on the bootdevice so-that conditional
macros b/w MMC and NAND for CONFIG_BOOTCOMMAND should
be avoided in config files.
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Let the runtime code can set the mmcdev and mmcroot based
on the devno using mmc_get_env_dev instead of defining
separately in build-time configs using mmc_late_init func.
Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Add runtime, modeboot env which is setting mmcboot, or
nandboot based on the bootdevice so-that conditional
macros b/w MMC and NAND for CONFIG_BOOTCOMMAND should
be avoided in config files.
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
After speaking to Hans at FOSDEM, he is fine with transferring the
maintainership of the Pine64 boards over to me.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
With the DRAM init code and the SPL's ability to load the ATF binary as
well, we can now officially get rid of the boot0 boot method, which
involed a closed-source proprietary blob to be used.
Rework the Pine64 README file to document how to build the firmware.
Also since these instructions now cover more boards, rename the
file to README.sunxi64 to reflect this.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Now that we can store a DT name in the SPL header, use this string (if
available) when finding the right DT blob to load for U-Boot proper.
This allows a generic U-Boot (proper) image to be combined with a bunch
of supported DTs, with just the SPL (possibly only that string) to be
different.
Eventually this string can be written after the build process by some
firmware update tool.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Now that the Makefile can call a generator script to build a more
advanced FIT image, let's use this feature to address the needs of
Allwinner boards with 64-bit SoCs (A64 and H5).
The (DTB stripped) U-Boot binary and the ATF are static, but we allow
an arbitrary number of supported device trees to be passed.
The script enters both a DT entry in the /images node and the respective
subnode in /configurations to support all listed DTBs.
The location of the bl31.bin image from the ARM Trusted Firmware build
can either by specified via the BL31 environment variable. If this is not
set, the script looks for bl31.bin in U-Boot's build directory (which
could be a symlink as well).
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
For a board or platform to support FIT loading in the SPL, it has to
provide a board_fit_config_name_match() routine, which helps to select
one of possibly multiple DTBs contained in a FIT image.
Provide a simple function which chooses the DT name U-Boot was
configured with.
If the DT name is one of the two Pine64 versions, determine the exact
model by checking the DRAM size.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@openedev.com>
The sunxi SPL was holding the detected RAM size in some local variable
only, so it wasn't accessible for other functions.
Store the value in gd->ram_size instead, so it can be used later on.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
- Add #undef CONFIG_DM_MMC_OPS to omap3_logic in the SPL build case, to
match other TI platforms in the same situation.
Signed-off-by: Tom Rini <trini@konsulko.com>
Enable TI_COMMON_CMD_OPTIONS and remove similar options
from the defconfig. Updated with savedefconfig
CMD_USB isn't enabled yet. I have some testing to do with
musb.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
In order to be able to migrate the various SoC EHCI CONFIG options we
first need to finish the switch from CONFIG_USB_EHCI to
CONFIG_USB_EHCI_HCD.
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marex@denx.de>
We make use of CONFIG_OMAP3_EVM today to know when to do a specific
tweak in MUSB. This can be tested on via CONFIG_TARGET_OMAP3_EVM
instead, so switch there so we can drop the now unused symbol
CONFIG_OMAP3_EVM. In investigating what to do about the symbol usage we
see that the cairo board defines the same function, but never called it
(as it does not define CONFIG_OMAP3_EVM) and was just returning anyhow,
so drop that function from that board.
Cc: "Albert ARIBAUD (3ADEV)" <albert.aribaud@3adev.fr>
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Now CONFIG_GENERIC_MMC and CONFIG_MMC match for all defconfig.
We do not need two options for the same feature. Deprecate the
former.
This commit was generated with the sed script 's/GENERIC_MMC/MMC/'
and manual fixup of drivers/mmc/Kconfig.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Drop use of this long-deprecated option.
Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
This option is pretty old. It predates CONFIG_SYS_I2C which is itself
deprecated in favour of driver model. Disable it for all boards.
Also drop I2C options which depend on this.
Signed-off-by: Simon Glass <sjg@chromium.org>
OMAP-L138 LCDK board can benefit from using the commonly
used commands enabled by TI_COMMON_CMD_OPTIONS.
Source the relevant Kconfig file so TI_COMMON_CMD_OPTIONS
can be enabled for OMAP-L138 LCDK board in a future patch.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The function 'spin_wheel' is declared as inline, but not static and thus
we see warnings that 'w' and 'p' are declared static in a non-static
inline function. Correct this by marking spin_wheel as static inline.
Cc: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
The variable vga_pads is never referenced, drop.
Cc: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
The variable nfc_pads is only referenced when CONFIG_CMD_NAND is set,
add a gaurd. The variable gpio_pads is never referenced, drop it. The
variable usdhc4_pads are only referenced when we do not have
CONFIG_CMD_NAND set and we are not doing an SPL build, modify the
existing guard.
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
The variables prg_stage2_prepare, prg_stage2_success and prg_stage_fail
are only referenced when CCDM_SECOND_STAGE is set, move these to be by
the existing guard.
Cc: Dirk Eibach <eibach@gdsys.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
The variable nfc_pads is only referenced when CONFIG_CMD_NAND is set,
move the existing guard and drop a now redundant comment. The variable
gwproto_gpio_pads is never referenced, remove it.
Cc: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
The variable usdhc1_pads is only referenced during SPL builds, add a guard.
Cc: Stefano Babic <sbabic@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
The variable usdhc1_pads is only referenced during SPL builds, add a
guard.
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
The variable usdhc2_pads is only referenced during SPL builds, add a guard.
Cc: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Tom Rini <trini@konsulko.com>
The variable pwm_pad is never referenced, drop.
Cc: Christian Gmeiner <christian.gmeiner@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
With gcc-6 and later we see a warning about the fact that we have a
construct of "if (test);\n\tstatement". Upon reviewing the code, the
intention here is as the compiler suggests, we only want to execute the
indented statement if the test was true.
Cc: Sergei Poselenov <sposelenov@emcraft.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
am335x supports various sysclk frequencies which can be determined
using sysboot pins. PLLs should be configures based on this
sysclk frequency. Add PLL configurations for all supported
frequencies.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The boston memory map isn't suited to the simple "all memory starting
from 0" approach that the MIPS arch_fixup_fdt() implementation takes.
Instead we need to indicate the first 256MiB of DDR from 0 and the rest
from 0x90000000. Implement ft_board_setup to do that.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This adds a new firefly-rk3399 board, MIPI support for rk3399 and
rk3288, rk818 pmic support, mkimage improvements for rockchip and a few
other things.
Enable pwm0 for display of rk3399 evb board. The PWM do not have decicated
interrupt number in dts and can not get periph_id by pinctrl framework. So
init them here.
Signed-off-by: Eric Gao <eric.gao@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Set ethernet mac address in late init for Tinker Board,
prevents getting a random mac address each boot.
Read mac address from eeprom, first 6 bytes from m24c08@50.
Same as /etc/init.d/rockchip.sh on Tinker OS.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
With the RK3399 DRAM controller (DMC) driver providing all the
infrastructure, retrieve the DRAM size from the DMC init in the
board-specific code (instead of hard-coding) for the RK3399-Q7 (Puma).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Since our sdram driver is ready, we can use the actual size
instead of hard code.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Use regulators_enable_boot_on() instead of init regulators one by one,
the interface can init all the regulators with regulator-boot-on property.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
In order to add a generic MIPS debug_uart_init call right before the call to
board_early_init_f, we need to remove all calls to debug_uart_init from every
MIPS boards.
WDR4300 doesn't provide a board_debug_uart_init and configures pinmux in
board_early_init_f instead. Since I have no idead of what's the needed uart
pinmux config, I copied the whole pinmux config to a new function that is
called from board_early_init_f if CONFIG_DEBUG_UART_BOARD_INIT is not enabled.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
In order to add a generic MIPS debug_uart_init call right before the call to
board_early_init_f, we need to remove all calls to debug_uart_init from every
MIPS boards.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
In order to add a generic MIPS debug_uart_init call right before the call to
board_early_init_f, we need to remove all calls to debug_uart_init from every
MIPS boards.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
This patch also removes all the excessive code for NS16550 intiailization
as the device tree can do that now. This also adds DM_I2C and DM_MMC
since the overlying drivers have the built-in support already. The
corresponding include/config/omap3_logic.h also reduced in size
due to the new device tree support.
Signed-off-by: Adam Ford <aford173@gmail.com>
Changes in V2:
Retain Auto-detect ability between SOM-LV and Torpedo
Split this off from the device sub submissions
In some boards like the Raspberry Pi the initial bootloader will pass
a DT to the kernel. When using U-Boot as such kernel, the board code in
U-Boot should be able to provide U-Boot with this, already assembled
device tree blob.
This patch introduces a new config option CONFIG_OF_BOARD to use instead
of CONFIG_OF_EMBED or CONFIG_OF_SEPARATE which will initialize the DT
from a board-specific funtion instead of bundling one with U-Boot or as
a separated file. This allows boards like the Raspberry Pi to reuse the
device tree passed from the bootcode.bin and start.elf firmware
files, including the run-time selected device tree overlays.
Signed-off-by: Alex Deymo <deymo@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Convert the bcm2835 SDHCI driver over to support CONFIG_DM_MMC and move
all boards over. There is no need to keep the old code since there are no
other users.
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
The bcm283x chips provide a way for the ARM core to communicate with the
graphics processor, which is in charge of many things. This is handled by
way of a message prototcol.
At present the code for sending message (and receiving a reply) is spread
around U-Boot, primarily in the board file. This means that sending a
message from a driver requires duplicating the code.
Create a new message implementation with a function to support powering on
a subsystem as a starting point.
Signed-off-by: Simon Glass <sjg@chromium.org>
Enable the early debug UART to debug problems when an ICE or other
debug mechanism is not available.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Because the introduction of the pinctrl and clk drivers and the
device tree files, remove unneeded hard coded related code from
the board file.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Update the configuration files to support the device tree and driver
model. The device clock and pins configuration are handled by the
clock and the pinctrl drivers respectively.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Enable the early debug UART to debug problems when an ICE or other
debug mechanism is not available.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Since the introduction of the pinctrl and clk drivers and the
device tree files, remove unneeded hard coded related code from
the board file.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Update the configuration files to support the device tree and driver
model. The device clock and pins configuration are handled by the
clock and the pinctrl drivers respectively.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Enable the early debug UART to debug problems when an ICE or other
debug mechanism is not available.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Since the introduction of the pinctrl and clk drivers and the
device tree files, remove unneeded hard coded related code from
the board file.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Update the configuration files to support the device tree and driver
model. The device clock and pins configuration are handled by the
clock and the pinctrl drivers respectively.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Enable the early debug UART to debug problems when an ICE or other
debug mechanism is not available.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Since the introduction of the pinctrl and clk drivers and the
device tree files, remove unneeded hard coded related code from
the board file.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Update the configuration files to support the device tree and driver
model. The device clock and pins configuration are handled by the
clock and the pinctrl drivers respectively.
Because the limitation of internal SRAM size, the SPL with driver
model can't be supported, disable the SPL option.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Enable the early debug UART to debug problems when an ICE or other
debug mechanism is not available.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Since the introduction of the pinctrl and clk driver and the device
tree files, remove unneeded related code from the board file.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Update the configuration files to support the device tree and driver
model. The device clock and pins configuration are handled by the
clock and the pinctrl drivers respectively.
Because the limitation of internal SRAM size, the SPL with driver
model can't be supported, disable the SPL option.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Enable the early debug UART to debug problems when an ICE or other
debug mechanism is not available.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Since the introduction of the pinctrl and clock driver and the device
tree files, remove unneeded hard coded related code from the board
file.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Update the configuration files to support the device tree and driver
model. The device clock and pins configuration are handled by the
clock and the pinctrl drivers respectively.
Because the limitation of internal SRAM size, the SPL with driver
model can't be supported, disable the SPL option.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Due to the pin configuration and clock enabling is handling by the
driver, remove the unneeded hardcode uart1 init during
board_early_init_f stage.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Because the MACB driver supports the driver model and device tree,
the pins configuration and clock enabling are handled by the
pinctrl driver and clock driver, remove this hardcoded init code.
The USB Ether init code is removed as well.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
With gcc-6 we see a warning that sysclk_tbl is defined but unused, so
remove it.
Cc: York Sun <york.sun@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: York Sun <york.sun@nxp.com>
In non DM I2C read operations the address length passed in during a read
operation will be used automatically. However, in DM I2C the address length
is set to a default value of one which causes problems when trying to
perform a read with a differing alen. Therefore, before the first read in a
series of read operations set the alen to the correct value.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reading from the I2C EEPROM used typically requires using an address length
of 2. However, when using DM for I2C the default address length used is 1.
To fix this introduce a new function that allows the address length to be
changed. The logic to do so was copied from cmd/i2c.c.
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
One some keystone2 platforms like K2G ICE, there is an option
to switch between 24MHz or 25MHz as sysclk. But the existing
driver assumes it is always 24MHz. Add support for getting
all reference clocks dynamically by reading boot pins.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
K2G supports various sysclk frequencies which can be
determined using sysboot pins. PLLs should be configured
based on this sysclock frequency. Add PLL configurations
for all supported sysclk frequencies.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Instead of defining command options in every defconfig,
define a common Kconfig symbol that consolidates all command
options that are supported by any TI platform. Also use imply
keyword so that that specific option can be disabled if
not required.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The IGEP SMARC AM335x is an industrial processor module with
following highlights:
o AM3352 TI processor (Up to AM3359)
o Cortex-A8 ARM CPU
o SMARC form factor module
o Up to 512 MB DDR3 SDRAM / 512 MB FLASH
o WiFi a/b/g/n and Bluetooth v4.0 on-board
o Ethernet 10/100/1000 Mbps and 10/100 Mbps controller on-board
o JTAG debug connector available
o Designed for industrial range purposes
Signed-off-by: Pau Pajuelo <ppajuelo@iseebcn.com>
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Tested-by: Pau Pajuelo <ppajuel@gmail.com>
Convert IGEP board to use UBI volumes for U-Boot, its environment and
kernel. With exception of first four sectors read by SoC BootROM whole
NAND is UBI managed.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Reviewed-by: Heiko Schocher<hs@denx.de>
Tested-by: Pau Pajuelo <ppajuel@gmail.com>
Rename igep0033 to igep003x as IGEP SMARC AM335x module (igep0034)
can use the same source files.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Tested-by: Pau Pajuelo <ppajuel@gmail.com>
All discovery boards have one user button & one user LED. Here we are
just reading the button status & switching ON the user LED.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
With this gpio driver supporting DM, there is no need to enable clocks
for different gpios (for pin muxing) in the board specific code.
Need to increase the allocatable area required before relocation from 0x400 to
0xC00 becuase of 10 new gpio devices(& new gpio class) added in device tree.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This patch also removes the sdram/fmc clock enable from board specific
code.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
As driver model takes care of pin control configuraion, this patch also
removes the sdram/fmc pin configuration.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
Invoke enable_usb_clocks during board_usb_init and disable_usb_clocks
during board_usb_exit to enable and disable clocks respectively.
Modifications:
* Enable USB clocks in the OMAP version of the function
board_usb_init.
* Disable USB clocks in the OMAP version of the function
board_usb_cleanup.
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
A weak version of the function board_usb_init is implemented in:
common/usb.c
drivers/usb/host/xhci-omap.c
To fix the double implementations:
* Convert the board_usb_init function in drivers/usb/host/xhci-omap.c
normal (not weak).
* The function board_usb_init in drivers/usb/host/xhci-omap.c calls to
the weak function omap_xhci_board_usb_init.
* Rename board version of the function board_usb_init to
omap_xhci_board_usb_init.
Done only for boards that defines CONFIG_USB_XHCI_OMAP.
To achieve the same flexibility with the function board_usb_cleanup:
* Add a normal (not weak) implementation of the function
board_usb_cleanup in drivers/usb/host/xhci-omap.c
* The function board_usb_cleanup in drivers/usb/host/xhci-omap.c calls
to the weak function omap_xhci_board_usb_cleanup.
* Rename board version of the function board_usb_cleanup to
omap_xhci_board_usb_cleanup.
Done only for boards that defines CONFIG_USB_XHCI_OMAP.
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Roger Quadros <rogerq@ti.com>
The logical expression to check the dtb is incorrect in
load_devicetree.
The problem was indicated by cppcheck.
The inconsistent variable name dtppart is changed to dtbpart.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Acked-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Banana Pi M2 Plus is an Allwinner H3-based SBC by Sinovoip, which has
already mainline device tree file that have landed into U-Boot source
tree.
Add a defconfig file for it and add the MAINTAINERS items.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
For the consistent location of SoC-level Kconfig.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Mention eMMC and microSD as supported devices.
They have been enabled with patch
d0c5c8d529
odroid-c2: enable new Meson GX MMC driver in board defconfig
which was accepted for u-boot-mmc.git.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Add warp7_secure_defconfig entry to avoid the following warning:
WARNING: no maintainers for 'warp7_secure'
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
This converts the following to Kconfig:
CONFIG_CMD_BLOB
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Add imply CMD_BLOB under CHAIN_OF_TRUST]
Signed-off-by: Tom Rini <trini@konsulko.com>
This is only used by one board and should not be a CONFIG option. Instead
it should use the driver model pmic framework. For now, just move the
setting into the only board that uses it.
Signed-off-by: Simon Glass <sjg@chromium.org>
This commit adds support for HDMI output.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
