Commit graph

273 commits

Author SHA1 Message Date
Francois Berder
2454de2c34 drivers: rtc: fix null pointer access in armada38x_rtc_reset
Replace null pointer by pointer to device registers when calling
armada38x_rtc_write.

Signed-off-by: Francois Berder <fberder@outlook.fr>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-03-04 08:38:05 +01:00
Pali Rohár
48c144f8ef rtc: ds1307: Add bindings for microchip, mcp7940x
Compatible string microchip,mcp7940x is used by Turris Mox DTS file in
Linux kernel and U-Boot ds1307.c driver works fine with it.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-02-17 14:17:07 +01:00
Vladimir Oltean
ad1ff53218 rtc: pcf2127: remove U-Boot specific compatible string
Now that all in-tree boards have been converted to the compatible
strings from Linux, delete the support for the ad-hoc "pcf2127-rtc" one.

Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-02-01 15:08:07 +05:30
Vladimir Oltean
7c67ef3f3f rtc: pcf2127: sync with Linux compatible strings
Allow this driver to be used by boards which inherit their device trees
from Linux. Compatibility is temporarily retained with the old
compatible string which is U-Boot specific, and will be removed after a
few changes.

Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-02-01 15:08:07 +05:30
Clemens Gruber
6f84e809d9 rtc: ds1337: fix compatible string typo
The driver supports the ds1339 as well, which was probably intended by
the author but prevented by a typo. Fix the typo.

Signed-off-by: Clemens Gruber <clemens.gruber@pqgruber.com>
2021-11-11 19:02:44 -05:00
Tom Rini
79b8849d4c u-boot-imx-20211020
-------------------
 
 First PR from u-boot-imx for 2022.01
 
 CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/9535
 
 - new board: kontron-sl-mx8mm
 - imx8m:
 	- fix secure boot
 - imx ESDHC: fixes
 - i.MX53: Support thum2, bmode and fixes for Menlo board
 	  usbarmory switch to Ethernet driver model
 - imx6 :
 	- DDR calibration for Toradex boards
 - imx7:
 	- Fixes
 - Updated gateworks boards (ventana / venice)
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Merge tag 'u-boot-imx-20211020' of https://source.denx.de/u-boot/custodians/u-boot-imx

u-boot-imx-20211020
-------------------

First PR from u-boot-imx for 2022.01

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/9535

- new board: kontron-sl-mx8mm
- imx8m:
	- fix secure boot
- imx ESDHC: fixes
- i.MX53: Support thum2, bmode and fixes for Menlo board
	  usbarmory switch to Ethernet driver model
- imx6 :
	- DDR calibration for Toradex boards
- imx7:
	- Fixes
- Updated gateworks boards (ventana / venice)

# gpg verification failed.
2021-10-20 14:24:09 -04:00
Mark Tomlinson
07c652400d rtc: ds1307: Handle oscillator-stop bit correctly
The DS1307 driver was originally based on the DS1337 driver. However,
the functionality of the clock set/get functions has diverged. In the
original DS1337 driver, the set/get functions did the following:
  1) Setting the clock ensured the oscillator was enabled.
  2) Getting the clock checked and reset the oscillator-stop flag.
The DS1307 does not have an oscillator-stop flag, but the driver tried
(incorrectly) to emulate this by ensuring the oscillator was running. It
really makes no sense to start a stopped clock without setting it.

This patch makes the DS1307 driver behave like the original DS1337
driver again. For the DS1307 itself, this is just a removal of code,
since there is no oscillator-fail bit to check or reset, and the clock
is started when it is set. Since the DS1307 driver can now also be used
for the DS1337 and DS1340 which do have this bit, add code to handle the
oscillator-stop bit in the same was the original DS1337 driver did --
i.e. report that the oscillator had stopped and clear the flag.

This means that setting the date using the date command (which does both
a get and a set) will now clear the oscillator-stop flag in addition to
setting and starting the clock.

The old-style (non-DM) code has not been updated and will be removed in
a future patch. Note that this older code does not support the DS1337,
as there is a separate driver for this. Also note that the original (DM)
code used the wrong control-register address for the DS1337.

Signed-off-by: Mark Tomlinson <mark.tomlinson@alliedtelesis.co.nz>
2021-10-12 16:49:21 -04:00
Heiko Thiery
e1918ce299 rtc: rv8803: add epson,rx8803 and epson,rx8900 compatible
The RX8803 and RX8900 register layouts are compatible with the one of
the RV8803. So add these to the compatibles.

The same compatible strings are used and approved in linux kernel.

Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Reviewed-by: Michael Walle <michael@walle.cc>
2021-10-07 16:53:50 +02:00
Mathew McBride
701c04f331 rtc: rx8025: revise single register write to use offset
Writing of individual registers was not functioning
correctly as a 0 'offset' byte under DM-managed
I2C was being appended in front of register we
wanted to access.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
2021-10-03 14:40:56 -04:00
Mathew McBride
771fc0c079 rtc: rx8025: set date in a single i2c transaction
The RX8025/RX8035 does not like having it's time registers
set byte-by-byte in separate I2C transactions.

From the note at the top of the file, it appears
target-dependent workarounds have been used in the
past for this.

Resolve this by setting the time registers in a single
I2C transaction.

As part of this, also ensure the '24/12' flag in the RTC
is reset before writing the date (instead of after), otherwise
the RX8035 will clear the seconds and minutes registers.

Tested on Traverse Ten64 (NXP LS1088A) with RX8035.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
2021-10-03 14:40:56 -04:00
Mathew McBride
9ca4ae2d2a rtc: rx8025: add support for EPSON RX8035.
The RX8035 is a newer model from EPSON which is
very similar in operation to the RX8025.

The changes mirror similar ones that will be
in Linux 5.15:
https://lore.kernel.org/all/20210709044518.28769-2-matt@traverse.com.au/

The UBOOT_DRIVER ID has also been corrected, previously
it declared itself as rx8010sj_rtc which is a different driver.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
2021-10-03 14:40:56 -04:00
Mathew McBride
152ef916f8 rtc: rx8025: drop non-DM support
A search of the tree showed there is only one user
of this driver (soon to be two) - board/socrates

The second user will be the Traverse Ten64 board.

Both these boards have DM_RTC.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
2021-10-03 14:40:56 -04:00
Simon Glass
9539738509 treewide: Use OF_REAL instead of !OF_PLATDATA
Now that we have a 'positive' Kconfig option, use this instead of the
negative one, which is harder to understand.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-09-25 09:46:15 -06:00
Pali Rohár
121a165c51 Remove including timestamp.h in version.h
Header file version.h does not use anything from timestamp.h. Including of
timestamp.h has side effect which cause recompiling object file at every
make run because timestamp.h changes at every run.

So remove timestamp.h from version.h and include timestamp.h in files
which needs it.

This change reduce recompilation time of final U-Boot binary when U-Boot
source files were not changed as less source files needs to be recompiled.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Add in lib/acpi/acpi_table.c and test/dm/acpi.c, rework a few others]
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-17 12:10:44 -04:00
Callum Sinclair
223c44904d rtc: ds1307: Fix incorrect clock reset for DS13xx
The ds1307 driver also supports the DS1339 and DS1340.
However, in ds1307_rtc_reset the register writes assume that the chip
is a DS1307. This is evident in the writing of bits SQWE, RS1, RS0 to
the control register. While this applies correctly to the DS1307, on a
DS1340 the control register doesn't contain those bits (instead, the
register is used for clock calibration). By writing these bits the
clock calibration will be changed and the chip can become
non-functional after a reset call.

Signed-off-by: Callum Sinclair <callum.sinclair@alliedtelesis.co.nz>
2021-09-01 19:25:37 -04:00
Michal Simek
1f065e8fea rtc: zynqmp: Add support for ZynqMP RTC
The whole driver logic is taken from Linux kernel but only set/get/reset
functions are implemented. When device is power off RTC is power out of
battery.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-06 09:32:02 +02:00
Michal Simek
23a328769a dm: rtc: uclass: Add flag to control sequence numbering
RTCs are using aliases for sequences. That's why enable
DM_UC_FLAG_SEQ_ALIAS for exact RTC indentification.
The same flag is used by a lot of other uclasses like mmc, pci, serial,
spi, timer, tpm, etc.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-06 09:32:02 +02:00
Simon Glass
7e5f460ec4 global: Convert simple_strtoul() with hex to hextoul()
It is a pain to have to specify the value 16 in each call. Add a new
hextoul() function and update the code to use it.

Add a proper comment to simple_strtoul() while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-02 13:32:14 -04:00
Max Yang
92cf458f8a rtc: m41t62: fix wrong register use for set/reset ST bit
Fix wrong register use when set/reset ST bit.
ST bit is in register M41T62_REG_SEC not in M41T62_REG_ALARM_HOUR.

I have not actually tested this. But this seemed buggy from inspection.

Fixes: 9bbe210512 ("rtc: m41t62: add oscillator fail bit reset support")
Signed-off-by: Max Yang <max.yang@deltaww.com>
2021-07-15 19:06:49 -04:00
Heinrich Schuchardt
e94ef57952 lib: move rtc-lib.c to lib
Function rtc_to_tm() is needed for FAT file system support even if we don't
have a real time clock. So move it from drivers/ to lib/.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-07-14 16:57:35 -04:00
Patrick Delaunay
b953ec2bca dm: define LOG_CATEGORY for all uclass
Define LOG_CATEGORY for all uclass to allow filtering with
log command.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-07-06 10:38:03 -06:00
Dario Binacchi
08ea87a6de rtc: davinci: fix date loaded on reset
On reset, the RTC loads the 2000-01-01 date with a wrong day of the
week (Sunday instead of Saturday).

Signed-off-by: Dario Binacchi <dariobin@libero.it>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210602203805.11494-9-dariobin@libero.it
2021-06-09 22:23:45 +05:30
Dario Binacchi
9ec8b8b4ca rtc: davinci: add driver model support
Update the driver to support the device tree and the driver model.
The read / write helpers in rtc_ops allow access to scratch registers
only. The offset parameter is added to the address of the scratch0
register.

Support for non-DM has been removed as there were no users.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210602203805.11494-8-dariobin@libero.it
2021-06-09 22:23:45 +05:30
Dario Binacchi
c7c7c8db00 rtc: davinci: use unlock/lock mechanism
The RTC module contains a kicker mechanism to prevent any spurious
writes from changing the register values. To set the time, you must
first unlock the TC registers, update them and then lock.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210602203805.11494-6-dariobin@libero.it
2021-06-09 22:23:44 +05:30
Dario Binacchi
79250ef3e2 rtc: davinci: check BUSY bit before set TC registers
To write correct data to the TC registers, the STATUS register must be
read until the BUSY bit is equal to zero. Once the BUSY flag is zero,
there is a 15 μs access period in which the TC registers can be
programmed.
The rtc_wait_not_busy() has been inspired by the Kernel.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210602203805.11494-5-dariobin@libero.it
2021-06-09 22:23:44 +05:30
Dario Binacchi
82a456a085 rtc: davinci: replace 32bit access with 8bit access
Use 32-bit access only where it is needed. Most of the RTC registers
contain useful information in the 8 least significant bits, the others
are reserved.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210602203805.11494-4-dariobin@libero.it
2021-06-09 22:23:44 +05:30
Dario Binacchi
6acee20e57 rtc: davinci: fix compiler errors
Fix errors raised by module compilation.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210602203805.11494-3-dariobin@libero.it
2021-06-09 22:23:44 +05:30
Dario Binacchi
73c3d8ebb5 rtc: davinci: enable compilation for omap architectures
The Davinci's onchip RTC is also present on TI OMAP1, AM33XX, AM43XX and
DRA7XX SOCs. So, let's enable compilation for these architectures too.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210602203805.11494-2-dariobin@libero.it
2021-06-09 22:23:44 +05:30
Heiko Schocher
05a0776ed5 rtc: add support for rv3028 rtc
Add support for rtc3028 rtc from microcrystal.
based on linux dirver:
commit a38fd8748464: ("Linux 5.12-rc2")

Signed-off-by: Heiko Schocher <hs@denx.de>

Reviewed-by: Stefan Roese <sr@denx.de>
2021-04-12 17:44:55 -04:00
Marek Behún
aefbc2c2a2 rtc: add armada38x driver
Add RTC driver for Armada 38x, based on Linux' driver.
For now implement only `marvell,armada-380-rtc` compatible.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Cc: Pali Rohár <pali@kernel.org>
Cc: Baruch Siach <baruch@tkos.co.il>
Cc: Chris Packham <judge.packham@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Acked-by: Pali Rohár <pali@kernel.org>
2021-04-08 08:44:51 +02:00
Tom Rini
1057b1be75 Prepare v2021.04-rc5
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Merge tag 'v2021.04-rc5' into next

Prepare v2021.04-rc5
2021-03-29 18:00:21 -04:00
Simon Glass
728d04cc72 sandbox: i2c: Support i2c emulation with of-platdata
At present the i2c emulators require access to the devicetree, which is
not possible (by design) with of-platdata.

Add a way for drivers to record the of-platdata index of their emulator,
so that we can still find the emulator.

This allows i2c emulation to work with of-platdata.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-26 17:03:08 +13:00
Simon Glass
e62ad9c867 sandbox: i2c: Move platdata structs to header files
At present the structs used by these drivers are declared in the C files
and so are not accessible to dtoc. Move them to header files, as required.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-26 17:03:08 +13:00
Chris Packham
f65774e1f6 rtc: ds1307: Add ds1339 compatible
As far as u-boot is concerned the ds1339 is compatible with the other
devices supported by the ds1307 driver. The Linux driver does expose
some additional functionality but as far as u-boot is concerned just
adding the compatible string is enough.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-23 18:06:07 +05:30
Simon Glass
c4085d733b sandbox: i2c: Rename driver names to work with of-platdata
Some of these do not follow the rules. Make sure the driver name matches
the compatible string in all cases.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-22 19:23:27 +13:00
Heinrich Schuchardt
43db07507a sandbox: keep time offset when resetting
The UEFI Self Certification Test (SCT) checks the SetTime() service with
the following steps:

* set date
* reset
* check date matches

To be compliant the sandbox should keep the offset to the host RTC during
resets. The implementation uses the environment variable
UBOOT_SB_TIME_OFFSET to persist the offset.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-30 14:25:42 -07:00
Ying-Chun Liu (PaulLiu)
8d612ccde9 rtc: add rtc-abx80x, a driver for the Abracon AB x80x i2c rtc
This is a basic driver for the ultra-low-power Abracon AB x80x series
of RTC chips. It supports in particular, the supersets AB0805 and AB1805.
It allows reading and writing the time, and enables the supercapacitor or
battery charger.

Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
2021-01-27 17:07:48 -05:00
Patrick Delaunay
33d797ae03 rtc: stm32: migrate trace to log macro
Define LOG_CATEGORY to allow filtering with log command.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2021-01-13 09:52:58 +01:00
Simon Glass
20e442ab2d dm: Rename U_BOOT_DEVICE() to U_BOOT_DRVINFO()
The current macro is a misnomer since it does not declare a device
directly. Instead, it declares driver_info record which U-Boot uses at
runtime to create a device.

The distinction seems somewhat minor most of the time, but is becomes
quite confusing when we actually want to declare a device, with
of-platdata. We are left trying to distinguish between a device which
isn't actually device, and a device that is (perhaps an 'instance'?)

It seems better to rename this macro to describe what it actually is. The
macros is not widely used, since boards should use devicetree to declare
devices.

Rename it to U_BOOT_DRVINFO(), which indicates clearly that this is
declaring a new driver_info record, not a device.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:26:35 -07:00
Simon Glass
8a8d24bdf1 dm: treewide: Rename ..._platdata variables to just ..._plat
Try to maintain some consistency between these variables by using _plat as
a suffix for them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 16:51:09 -07:00
Simon Glass
d1998a9fde dm: treewide: Rename ofdata_to_platdata() to of_to_plat()
This name is far too long. Rename it to remove the 'data' bits. This makes
it consistent with the platdata->plat rename.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 16:51:09 -07:00
Simon Glass
c69cda25c9 dm: treewide: Rename dev_get_platdata() to dev_get_plat()
Rename this to be consistent with the change from 'platdata'.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 16:51:09 -07:00
Simon Glass
caa4daa2ae dm: treewide: Rename 'platdata' variables to just 'plat'
We use 'priv' for private data but often use 'platdata' for platform data.
We can't really use 'pdata' since that is ambiguous (it could mean private
or platform data).

Rename some of the latter variables to end with 'plat' for consistency.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 16:51:08 -07:00
Simon Glass
41575d8e4c dm: treewide: Rename auto_alloc_size members to be shorter
This construct is quite long-winded. In earlier days it made some sense
since auto-allocation was a strange concept. But with driver model now
used pretty universally, we can shorten this to 'auto'. This reduces
verbosity and makes it easier to read.

Coincidentally it also ensures that every declaration is on one line,
thus making dtoc's job easier.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 08:00:25 -07:00
Tom Rini
d062c1344c Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
- Add a new SMBIOS parser and enable it when booting from coreboot
- Fix up various driver names to avoid dtoc warnings
- Fully enable ACPI support on Google Chromebook Coral
- Add a way to set SMBIOS properties using the devicetree
- Update existing boards to use devicetree for SMBIOS using a new
  default sysinfo driver
2020-11-06 09:46:43 -05:00
Tom Rini
7716c328c8 u-boot-imx for 2021.1
---------------------
 
 - new boards : GE (new B1x5v2), phytec phyCORE-i.MX8MM
 - converted doc to reST
 - fixes for verdin-imx8mm (Toradex)
 - fixes for i.MX thermal driver
 - mx7ulp: Align the PLL_USB frequency
 - mx53: primary/secondary bmode
 
 Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/741465284
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Merge tag 'u-boot-imx-20201105' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

u-boot-imx for 2021.1
---------------------

- new boards : GE (new B1x5v2), phytec phyCORE-i.MX8MM
- converted doc to reST
- fixes for verdin-imx8mm (Toradex)
- fixes for i.MX thermal driver
- mx7ulp: Align the PLL_USB frequency
- mx53: primary/secondary bmode

Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/741465284
2020-11-05 11:57:50 -05:00
Simon Glass
9d20db0483 x86: Fix up driver names to avoid dtoc warnings
At present there are a lot of dtoc warnings reported when building
chromebook_coral, of the form:

   WARNING: the driver intel_apl_lpc was not found in the driver list

Correct these by using driver names that matches their compatible string.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-05 14:58:45 +08:00
Tom Rini
41cab8edbc Pull request for UEFI sub-system for efi-2021-01-rc2 (2)
The series contains the following enhancements
 
 * preparatory patches for UEFI capsule updates
 * initialization of the emulated RTC using an environment variable
 
 and a bug fix
 
 * If DisconnectController() is called for a child controller that is the
   only child of the driver, the driver must be disconnected.
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Merge tag 'efi-2020-01-rc2-2' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi

Pull request for UEFI sub-system for efi-2021-01-rc2 (2)

The series contains the following enhancements

* preparatory patches for UEFI capsule updates
* initialization of the emulated RTC using an environment variable

and a bug fix

* If DisconnectController() is called for a child controller that is the
  only child of the driver, the driver must be disconnected.
2020-11-01 10:56:37 -05:00
Sebastian Reichel
9bbe210512 rtc: m41t62: add oscillator fail bit reset support
In case of empty battery or glitches the oscillator fail
bit might be set. This will reset the bit in the reset
routine.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2020-11-01 15:58:47 +01:00
Sebastian Reichel
8691198d1b rtc: m41t62: reset SQW in m41t62_rtc_reset
This takes care of resetting the 32kHz square wave, which is
used by some boards as clock source for the SoC.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2020-11-01 15:58:47 +01:00