3 commits

Author	SHA1	Message	Date
Nate Drude	d79f1a8569	phy: adin: add driver for Analog Devices ADIN1300 PHY ... The current implementation configures RGMII using device tree phy-mode property and then calls genphy_config adin_config_rgmii_mode is derived from: https://github.com/varigit/linux-imx/blob/lf-5.10.y_var04/drivers/net/phy/adin.c#L218-L262 Signed-off-by: Nate Drude <nate.d@variscite.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>	2022-04-10 08:44:13 +03:00
Fabio Estevam	ccbda9e680	phy: atheros: Fix the "qca,clk-out-frequency" example ... The correct name for the property is "qca,clk-out-frequency", so fix it accordingly. Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Michael Walle <michael@walle.cc>	2020-06-23 14:43:23 -04:00
Michael Walle	fe6293a809	phy: atheros: add device tree bindings and config ... Add support for configuring the CLK_25M pin as well as the RGMII I/O voltage by the device tree. By default the AT803x PHYs outputs the 25MHz clock of the XTAL input. But this output can also be changed by software to other frequencies. This commit introduces a generic way to configure this output. Also the PHY supports different RGMII I/O voltages: 1.5V, 1.8V and 2.5V. An internal LDO is able to provide 1.5V (default) and 1.8V. The 2.5V option needs an external supply voltage. This commit adds support to switch the internal LDO to 1.8V. Signed-off-by: Michael Walle <michael@walle.cc> Acked-by: Joe Hershberger <joe.hershberger@ni.com>	2020-05-07 11:05:00 -04:00