Commit graph

8 commits

Author SHA1 Message Date
Tom Rini
83d290c56f SPDX: Convert all of our single license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07 09:34:12 -04:00
Michal Simek
2ad341ed7d arm64: zynqmp: Prepare psu_init rework
Move generic functions to common location psu_spl_init.c. Function
declarations are added to private header.
These changes are done in connection to the fact that still files from
HDF can be copied over and compilation should pass.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:29:18 +01:00
Michal Simek
62e950fad3 arm64: zynqmp: Remove slcr with mio status pin detection
This code is not used on this platform and it is not called.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-11-28 16:08:55 +01:00
Michal Simek
509d4b9545 ARM64: zynqmp: Generate handoff structure for ATF
Xilinx ATF extending options for passing images from BL2(FSBL)
to BL31. U-Boot SPL is FSBL replacement that's why it should generate
handoff structure the same. Support only one entry which is U-Boot in
EL2 itself. When FIT image is adopted structure generate should be data
driven.

Currently ATF is placing this structure at the beggining of OCM which is
rewriting early parts of ATF which should be unused at that time.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2017-01-10 10:22:05 +01:00
Michal Simek
e6a9ed04e7 ARM64: zynqmp: Add SPL support support
Support RAM and MMC boot mode in SPL also with SPL_FIT images.

In MMC boot mode two boot options are available:
1) Boot flow with ATF(EL3) and full U-Boot(EL2):
 aarch64-linux-gnu-objcopy -O binary bl31.elf bl31.bin
 mkimage -A arm64 -O linux -T kernel -C none -a 0xfffe5000 -e 0xfffe5000
 -d bl31.bin atf.ub
 cp spl/boot.bin <sdcard fat partition>
 cp atf.ub <sdcard fat partition>
 cp u-boot.bin <sdcard fat partition>

2) Boot flow with full U-Boot(EL3):
 cp spl/boot.bin <sdcard>
 cp u-boot*.img <sdcard>

3) emmc boot mode
 dd if=/dev/zero of=sd.img bs=1024 count=1024
 parted sd.img mktable msdos
 parted sd.img mkpart p fat32 0% 100%
 kpartx -a sd.img
 mkfs.vfat /dev/mapper/loop0p1
 mount /dev/mapper/loop0p1 /mnt/
 cp spl/boot.bin /mnt
 cp u-boot.img /mnt
 cp u-boot.bin /mnt
 cp atf.ub /mnt
 umount /dev/mapper/loop0p1
 kpartx -d sd.img
 cp sd.img /tftpboot/

 and program it via u-boot
 tftpb 10000 sd.img
 mmcinfo
 mmc write 10000 0 $filesize
 mmc rescan
 mmc part
 ls mmc 0

psu_init() function contains low level SoC setup generated for every HW
design by Xilinx design tools. xil_io.h is only supporting file to fix
all dependencies from tools. The same solution was used on Xilinx Zynq.

The patch also change CONFIG_SYS_INIT_SP_ADDR to the end of OCM which
stays at the same location all the time.
Bootrom expects starting address to be at 0xfffc0000 that's why this
address is SPL_TEXT_BASE.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-05-24 11:15:01 +02:00
Michal Simek
225bf9aa65 zynqmp: Add support for IP detection via SLCR
SLCR can be used for IP configuration setting.
Add SLCR skeleton to enable run time checking.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-07-28 11:56:20 +02:00
Michal Simek
5cb2420037 zynqmp: Add support for R5 sw loading
Add support for loading sw for R5 with enabling for zynqmp.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
2015-04-29 11:19:03 +02:00
Michal Simek
84c7204bd1 arm64: Add Xilinx ZynqMP support
Add basic Xilinx ZynqMP arm64 support.
Serial and SD is supported.
It supports emulation platfrom ep108 and QEMU.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-03-02 18:41:54 +01:00