Commit graph

86493 commits

Author SHA1 Message Date
Heinrich Schuchardt
005acb2a6d test: move unit tests into a sub-menu
The main configuration menu should not contain detail settings.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-04-25 15:31:27 -04:00
Heinrich Schuchardt
0b8b7d47aa test: improve configuration for Kconfig test options
* Fix dependencies
* Provide labels that are easier to grasp.
* Fix typo %s/whgch/which/
* Fix type %s/Is/is/

Fixes: 29784d62ed ("test: Add some tests for kconfig.h")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-04-25 15:31:27 -04:00
Pavel Skripkin
de0095b400 arm64: interrupts: print FAR_ELx on sync exceptions
Default synchronous exceptions handler prints only esr and register
dump. Sometimes it requiers to see an address which caused exceptions
to understand what's going on

ARM ARM in section D13.2.41 states that FAR_EL2 will contain meanfull
value in case of ESR.EC holds 0x20, 0x21, 0x24, 0x25, 0x22, 0x34 or
0x35. Same applies for EL1.

This patch adds function whivh determine current EL, gets correct FAR
register and prints it on panic.

Signed-off-by: Pavel Skripkin <paskripkin@gmail.com>
2023-04-25 15:31:27 -04:00
Peter Hoyes
23ff3e7b15 configs: Create minimal vexpress_fvp_defconfig
The vexpress64 board family now relies on OF_CONTROL and
OF_HAS_PRIOR_STAGE, so platform-specific configuration requirements
are minimal.

The vexpress_aemv8a_semi_defconfig file defines many flags that are not
needed for a minimal boot, such as flash memory configuration.

Therefore create vexpress_fvp_defconfig which contains the minimum
configuration required to boot on an Arm v8a FVP.

Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com>
2023-04-25 15:31:27 -04:00
Peter Hoyes
3e15be549c vexpress64: Enable VIRTIO_MMIO and RTC_PL031 in the base model
The Arm EBBR (Embedded Base Boot Requirements) require that the time
and basic networking EFI interfaces are available and working, so long
as the hardware has an RTC and network interface.

Arm FVPs typically have a memory-mapped PL031 RTC and a VIRTIO_NET
device defined in the device tree, so "imply" these in the Kconfig for
the FVP base model to simplify creating EBBR-compliant firmware.

Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com>
2023-04-25 15:31:27 -04:00
Peter Hoyes
3635df6bdf vexpress64: Use OF_HAS_PRIOR_STAGE for BASE_FVP variant
BASE_FVP now typically uses a devicetree provided by a prior boot stage
(typically Arm TF-A), so imply this option by default when
TARGET_VEXPRESS64_BASE_FVP is selected.

OF_HAS_PRIOR_STAGE selects OF_BOARD so this change is minor, but aligns
TARGET_VEXPRESS64_BASE_FVP with TARGET_VEXPRESS64_BASER_FVP.

Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
2023-04-25 15:31:27 -04:00
Nikhil M Jain
990bf2f38f include: configs: am64x_evm: Change to using .env
Move to using .env file for setting up environment variables for am64x.

Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
Reviewed-by: Devarsh Thakkar <devarsht@ti.com>
2023-04-25 15:31:27 -04:00
Jayesh Choudhary
2e43ba7805 arch: mach-k3: j721s2_init: Disable the firewalls
Some firewalls enabled by ROM are still left on. So some
address space is inaccessible to the bootloader. For example,
in OSPI boot mode we get an exception and the system hangs.
Therefore, disable all the firewalls left on by the ROM.

Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Reviewed-by: Andrew Davis <afd@ti.com>
Reviewed-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-04-25 15:31:27 -04:00
Rasmus Villemoes
45981a9a37 soc: soc_ti_k3: fix revision array bounds checks
If rev is equal to the array size, we'll access the array
one-past-the-end.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Bryan Brattlof <bb@ti.com>
2023-04-25 15:31:27 -04:00
meitao
c1da6fdb5c armv8: enable HAFDBS for other ELx when FEAT_HAFDBS is present
u-boot could be run at EL1/EL2/EL3. so we set it as same as EL1 does.
otherwise it will hang when enable mmu, that is what we encounter
in our SOC.

Signed-off-by: meitao <meitaogao@asrmicro.com>
[ Paul: pick from the Android tree. Rebase to the upstream ]
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Tom Rini <trini@konsulko.com>
Link: 3bf38943ae
2023-04-25 15:31:27 -04:00
Marc Zyngier
836b8d4b20 arm64: Use level-2 for largest block mappings when FEAT_HAFDBS is present
In order to make invalidation by VA more efficient, set the largest
block mapping to 2MB, mapping it onto level-2. This has no material
impact on u-boot's runtime performance, and allows a huge speedup
when cleaning the cache.

Signed-off-by: Marc Zyngier <maz@kernel.org>
[ Paul: pick from the Android tree. Rebase to the upstream ]
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Tom Rini <trini@konsulko.com>
Link: 417a73581a
2023-04-25 15:31:27 -04:00
Marc Zyngier
6cdf6b7a34 arm64: Use FEAT_HAFDBS to track dirty pages when available
Some recent arm64 cores have a facility that allows the page
table walker to track the dirty state of a page. This makes it
really efficient to perform CMOs by VA as we only need to look
at dirty pages.

Signed-off-by: Marc Zyngier <maz@kernel.org>
[ Paul: pick from the Android tree. Rebase to the upstream ]
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Tom Rini <trini@konsulko.com>
Link: 3c433724e6
2023-04-25 15:31:27 -04:00
Tom Rini
bad2618b8c Merge branch '2023-04-25-use-bounce-buffers-for-VIRTIO_F_IOMMU_PLATFORM'
To quote the author:
These patches will use bounce buffers when VIRTIO_F_IOMMU_PLATFORM
feature is in a virtio device.

This feature can be tested with qemu with -device virtio-iommu-pci.  So
that when a -device virtio-blk-pci with iommu_platform=true, it will
uses the bounce buffer instead.
2023-04-25 14:22:40 -04:00
Ilias Apalodimas
8485595927 spi: synquacer: Silence uninitialized variable warnings
When building with clang, the compiler compains with

drivers/spi/spi-synquacer.c:212:11: warning: variable 'bus_width' is used uninitialized whenever 'if' condition is false [-Wsometimes-uninitialized]
        else if (priv->mode & SPI_TX_OCTAL)
                 ^~~~~~~~~~~~~~~~~~~~~~~~~
drivers/spi/spi-synquacer.c:276:11: note: uninitialized use occurs here
        val |= ((bus_width >> 1) << BUS_WIDTH);
                 ^~~~~~~~~
drivers/spi/spi-synquacer.c:212:7: note: remove the 'if' if its condition is always true
        else if (priv->mode & SPI_TX_OCTAL)
             ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/spi/spi-synquacer.c:189:25: note: initialize the variable 'bus_width' to silence this warning

So initialize bus_width to 1 and add a warning if none of the configured
modes matches

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Acked-by: Jassi Brar <jaswinder.singh@linaro.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2023-04-25 23:06:10 +05:30
Heinrich Schuchardt
24c27b3c6c mtd: spi-nor: missing fallthrough in set_4byte()
Add a missing fallthrough macro to avoid a -Wimplicit-fallthrough warning.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2023-04-25 23:03:13 +05:30
Jim Liu
0514227e19 spi: npcm-fiu: add regulator feature and remove set clock
NPCM7xx/NPCM8xx default is boot from flash.
removed set clock feature due to reliability and security.
the clock will set by bootblock or tip.

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2023-04-25 23:01:48 +05:30
Kunihiko Hayashi
c008280a9a spi: f-ospi: Add missing spi_mem_default_supports_op() helper
The .supports_op() callback function returns true by default after
performing driver-specific checks. Therefore the driver cannot apply
the buswidth in devicetree.

Call spi_mem_default_supports_op() helper to handle the buswidth
in devicetree.

Fixes: 358f803ae2 ("spi: Add Socionext F_OSPI SPI flash controller driver")
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2023-04-25 22:58:21 +05:30
Dhruva Gole
db58dc5438 spi: spi-mem: perform odd len check only while writing data
in spi_mem_dtr_supports_op we have a check for allowing only even number
of bytes to be r/w. Odd bytes writing can be a concern while writing
data to a flash for example because 8 DTR mode doesn't support it.
However, reading ODD Bytes even  though may not be physically possible
we can still allow for it because it will not have serious implications
on any critical registers being overwritten since they are just reads.

Cc: Vaishnav Achath <vaishnav.a@ti.com>
Cc: Pratyush Yadav <pratyush@kernel.org>
Cc: Vignesh Raghavendra <vigneshr@ti.com>
Tested-by: Nikhil M Jain <n-jain1@ti.com>
Signed-off-by: Dhruva Gole <d-gole@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2023-04-25 22:56:14 +05:30
Dhruva Gole
963b5da339 spi: spi-mem: s/dummy/data buswidth check in dtr_supports_op()
This should have been op->data.buswidth instead as we check for octal
bus width for the data related ops
Also add explanation for why there is checks for 8D even data bytes

Cc: Pratyush Yadav <pratyush@kernel.org>
Reviewed-by: Pratyush Yadav <ptyadav@amazon.de>
Tested-by: Nikhil M Jain <n-jain1@ti.com>
Signed-off-by: Dhruva Gole <d-gole@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2023-04-25 22:55:51 +05:30
Marek Vasut
b91a0822d7 mtd: spi-nor: Add CHIP_ERASE optimization
Add support for CHIP_ERASE opcode 0xc7 . This is useful in case the
entire SPI NOR is supposed to be erase at once, as is it considerably
faster than 4k sector erase and even slightly faster than 64k block
erase. The spi_nor_erase_chip() implementation is adapted from Linux
6.1.y as of commit 7d54cb2c26dad ("Linux 6.1.14") . The chip erase is
only used in case the entire MTD device is being erased, and the chip
does support this functionality.

Timing figures from W25Q128JW:
16 MiB erase using 4kiB sector erase opcode 0x20 ... 107.5s
16 MiB erase using 64kiB block erase opcode 0xd8 ... 39.1s
16 MiB erase using chip erase opcode 0xc7 .......... 38.7s

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2023-04-25 22:52:55 +05:30
Will Deacon
b0a2fe148a virtio: Use bounce buffers when VIRTIO_F_IOMMU_PLATFORM is set
Devices advertising the VIRTIO_F_IOMMU_PLATFORM feature require
platform-specific handling to configure their DMA transactions.

When handling virtio descriptors for such a device, use bounce
buffers to ensure that the underlying buffers are always aligned
to and padded to PAGE_SIZE in preparation for platform specific
handling at page granularity.

Signed-off-by: Will Deacon <willdeacon@google.com>
[ Paul: pick from the Android tree. Rebase to the upstream ]
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Link: 1eff171e61
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-04-25 11:53:15 -04:00
Will Deacon
37e53db38b virtio: Allocate bounce buffers for devices with VIRTIO_F_IOMMU_PLATFORM
In preparation for bouncing virtio data for devices advertising the
VIRTIO_F_IOMMU_PLATFORM feature, allocate an array of bounce buffer
structures in the vring, one per descriptor.

Signed-off-by: Will Deacon <willdeacon@google.com>
[ Paul: pick from the Android tree. Rebase to the upstream ]
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Link: 3e052749e7
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-04-25 11:53:15 -04:00
Will Deacon
a15d67e01a virtio: Add helper functions to attach/detach vring descriptors
Move the attach and detach logic for manipulating vring descriptors
out into their own functions so that we can later extend these to
bounce the data for devices with VIRTIO_F_IOMMU_PLATFORM set.

Signed-off-by: Will Deacon <willdeacon@google.com>
[ Paul: pick from the Android tree. Rebase to the upstream ]
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Link: f73258a4bf
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-04-25 11:53:15 -04:00
Will Deacon
75582fc2e6 virtio: Allocate virtqueue in page-size units
In preparation for explicit bouncing of virtqueue pages for devices
advertising the VIRTIO_F_IOMMU_PLATFORM feature, introduce a couple
of wrappers around virtqueue allocation and freeing operations,
ensuring that buffers are handled in terms of page-size units.

Signed-off-by: Will Deacon <willdeacon@google.com>
[ Paul: pick from the Android tree. Rebase to the upstream ]
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Link: b4bb5227d4
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-04-25 11:53:15 -04:00
Will Deacon
da4e8bb09d virtio: pci: Tear down VQs in virtio_pci_reset()
The pages backing the virtqueues for virtio PCI devices are not freed
on reset, despite the virtqueue structure being freed as part of the
driver '->priv_auto' destruction at ->remove() time.

Call virtio_pci_del_vqs() from virtio_pci_reset() to free the virtqueue
pages before freeing the virtqueue structure itself.

Signed-off-by: Will Deacon <willdeacon@google.com>
[ Paul: pick from the Android tree. Rebase to the upstream ]
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Link: 5ed54ccd83
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-04-25 11:53:15 -04:00
Will Deacon
7804306c80 virtio: Expose VIRTIO_F_IOMMU_PLATFORM in device features
If we detect the VIRTIO_F_IOMMU_PLATFORM transport feature for a device,
then expose it in the device features.

Signed-off-by: Will Deacon <willdeacon@google.com>
[ Paul: pick from the Android tree. Rebase to the upstream ]
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Link: 9693bd26bf
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-04-25 11:53:15 -04:00
Tom Rini
6a11fdf053 Merge branch '2023-04-24-TI-platform-updates'
- Merge in assorted K3 updates, and re-sync all of the device trees for
  TI platforms with v6.3-rc6
2023-04-24 18:09:22 -04:00
Nikhil M Jain
9eeb1a299d common: Replace #ifdef and #if with if's
Avoid using preprocessor compilation directives and instead use simple
logical expressions for better readability since compiler will anyway
optimize out the respective code block if condition is not satisfied.

Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Devarsh Thakkar <devarsht@ti.com>
2023-04-24 21:37:45 +02:00
Nikhil M Jain
53ae978af5 board: ti: am62x: evm: OSPI support for splash screen
Add ospi boot media support to load splash image from OSPI memory,
add offset to read image from ospi and necessary flags defininig type
of storage and storage device.

Use CONFIG_IS_ENBALED to use the splash locations at SPL and u-boot
proper.

Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Devarsh Thakkar <devarsht@ti.com>
2023-04-24 21:37:45 +02:00
Nikhil M Jain
25127ea388 include: Enable video related global data variable and splash at SPL
To include video related global data variables and splash functions at
SPL and u-boot proper, use CONFIG_IS_ENABLED.

Replace CONFIG_CMD_BMP with CONFIG_BMP to enable splash_display function
at u-boot proper and SPL.

Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
Reviewed-by: Devarsh Thakkar <devarsht@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-04-24 21:37:45 +02:00
Nikhil M Jain
eb9217dc03 common: Enable splash functions at SPL
To support splash screen at both u-boot proper and SPL use
CONFIG_IS_ENABLED and CONFIG_VAL to check for video related Kconfigs at
respective stages.

Replace CONFIG_CMD_BMP with CONFIG_BMP to enable splash_display function
at u-boot proper and SPL.

Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
Reviewed-by: Devarsh Thakkar <devarsht@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-04-24 21:37:45 +02:00
Nikhil M Jain
86fbee6020 drivers: video: Enable necessary video functions at SPL
To support video driver at SPL use CONFIG_IS_ENABLED and CONFIG_VAL,
which checks for stage specific configs and thus enables video support
at respective stage.

Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
Reviewed-by: Devarsh Thakkar <devarsht@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2023-04-24 21:37:45 +02:00
Nikhil M Jain
d45e1d9967 common: Makefile: Rule to compile bmp.c
Add rule to compile bmp.c at SPL and u-boot proper when CONFIG_SPL_BMP
and CONFIG_BMP are defined.

Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
Reviewed-by: Devarsh Thakkar <devarsht@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2023-04-24 21:37:45 +02:00
Nikhil M Jain
58182b2db9 cmd: bmp: Split bmp commands and functions
To enable splash screen at SPL, need to compile cmd/bmp.c which also
includes bmp commands, since SPL doesn't use commands split bmp.c into
common/bmp.c which includes all bmp functions and cmd/bmp.c which only
contains bmp commands.

Add function delclaration for bmp_info in video.h.

Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-04-24 21:37:45 +02:00
Nikhil M Jain
072b0e16c4 common: Kconfig: Add BMP configs
Add CONFIG_BMP and CONFIG_SPL_BMP which enable displaying bmp images at
u-boot proper and SPL.

Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Devarsh Thakkar <devarsht@ti.com>
2023-04-24 21:37:45 +02:00
Nikhil M Jain
a8bca7ea61 common: Makefile: Add rule to compile splash and splash_source at SPL
To enable splash screen and loading bmp from boot media, add rules to
compile splash.c and splash_source.c at SPL stage only when
CONFIG_SPL_SPLASH_SCREEN and CONFIG_SPL_SPLASH_SOURCE are defined.

Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
Reviewed-by: Devarsh Thakkar <devarsht@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-04-24 21:37:45 +02:00
Nikhil M Jain
2e72e4ec84 drivers: video: tidss: Makefile: Add condition to compile TIDSS at SPL
To enable TIDSS driver only at SPL stage add rule to compile the TIDSS
video driver.

CONFIG_$(SPL_)VIDEO_TIDSS will compile tidss_drv, at SPL only if
CONFIG_SPL_VIDEO_TIDSS is defined and at u-boot proper if
CONFIG_VIDEO_TIDSS is defined.

Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-04-24 21:37:45 +02:00
Nikhil M Jain
35ca2e4fa2 drivers: video: Makefile: Rule to compile necessary video driver files
To enable video driver at SPL, need to compile video-uclass,
vidconsole-uclass, backlight-uclass, panel-uclass, simple-panel, add
rules to compile them at SPL and u-boot proper. To support
splash_display at SPL, need to compile video-bmp, add rule to compile at
SPL and u-boot proper.

Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
Reviewed-by: Devarsh Thakkar <devarsht@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2023-04-24 21:37:45 +02:00
Nikhil M Jain
e3357a9e03 drivers: Makefile: Add rule to compile video driver
Compile video driver at SPL using CONFIG_SPL_VIDEO.

Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
Reviewed-by: Devarsh Thakkar <devarsht@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>  # qemu-x86_64
2023-04-24 21:37:45 +02:00
Nikhil M Jain
54929ecdd2 drivers: video: tidss: Kconfig: Configs to enable TIDSS at SPL
To enable tidss display driver only at SPL stage, add necessary config,
CONFIG_SPL_VIDEO_TIDSS.

Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Devarsh Thakkar <devarsht@ti.com>
2023-04-24 21:37:45 +02:00
Nikhil M Jain
857d02d97c drivers: video: Kconfig: Add configs for enabling video at SPL
Add Kconfigs which enable the video driver and splash screen at SPL
stage only and not at u-boot proper. The existing Kconfigs from u-boot
proper were not used to make SPL splash screen independent to them.

Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
Reviewed-by: Devarsh Thakkar <devarsht@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2023-04-24 21:37:45 +02:00
Christian Gmeiner
c0c56f64b3 arm: mach-k3: am642: move do_dt_magic() after sysfw loading
Makes it possible to use e.g mcu_spi0 for custom board detection.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
2023-04-24 13:18:49 -04:00
Neha Malcom Francis
77df85c485 include: configs: j721e_evm: Fix name_fdt for J7200
Currently, name_fdt is not set for J7200, fix this so right DTB is
picked during boot.

Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
2023-04-24 13:18:49 -04:00
Manorit Chawdhry
1e00e9be62 arm: mach-k3: common: re-locate authentication for atf/optee
For setting up the master firewalls present in the K3 SoCs, the arm64
clusters need to be powered on.

Re-locates the code for atf/optee authentication.

Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-04-24 13:18:48 -04:00
Manorit Chawdhry
65f3afc6b9 remoteproc: ti_k3_arm64: Change the startup of arm64 core
Configuring master firewalls require the power of the cluster to be
enabled before configuring them, change the load of rproc to configure
the gtc clocks and start the cluster along with configuring the boot
vector.

The start of rproc will only start the core.

Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-04-24 13:18:48 -04:00
Manorit Chawdhry
53f02be32e arm: dts: k3-am625-r5-sk: add a53 cluster power
adds a53 cluster to control from the rproc driver

Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-04-24 13:18:48 -04:00
Manorit Chawdhry
9a36735b0f arm: dts: k3-am62a7-r5-sk: add a53 cluster power domain node
adds a53 cluster to control from the rproc driver

Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-04-24 13:18:48 -04:00
Manorit Chawdhry
3922cf6295 arm: dts: k3-am642-r5: add a53 cluster power domain node
adds a53 cluster to control from the rproc driver

Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-04-24 13:18:48 -04:00
Manorit Chawdhry
7fe7920c5e arm: dts: k3-am642-r5-sk: add a53 cluster power domain node
adds a53 cluster to control from the rproc driver

Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-04-24 13:18:48 -04:00
Manorit Chawdhry
dcdcbde2bb arm: dts: k3-j7200-r5: add a72 cluster power domain node
adds a72 cluster to control from the rproc driver

Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
2023-04-24 13:18:48 -04:00