Commit graph

69356 commits

Author SHA1 Message Date
Tom Rini
cdeb7b8f98 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-10-29 10:48:01 -04:00
Andre Przywara
5a4a891e04 MAINTAINERS, git-mailrc: Update sunxi maintainers
Maxime mentioned that he feels not having the time to be an Allwinner
maintainer anymore. Take over from him.

Maxime, many thanks for your great work in the past! I hope I can still
relay the occasional technical question to you in the future.

Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2020-10-29 09:57:13 -04:00
Tom Rini
eca57cafa5 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq
- Bug fixes and updates on vid, ls1088a lx2160a and other layerscape
  platforms.
- Add optee_rpmb support for LX2 & Kontron sl28 support
2020-10-29 09:10:24 -04:00
Shmuel Hazan
aaedaaae63 mtd: nand: pxa3xx: enable NAND controller if the SoC needs it
Based on Linux kernel commit fc256f5789cb ("mtd: nand: pxa3xx: enable
NAND controller if the SoC needs it"). This commit adds support for the
Armada 8040 nand controller.

The kernel commit says this:

    Marvell recent SoCs like A7k/A8k do not boot with NAND flash
    controller activated by default. Enabling the controller is a matter
    of writing in a system controller register that may also be used for
    other NAND related choices.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Shmuel Hazan <shmuel.h@siklu.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
2020-10-29 12:31:38 +01:00
Michal Simek
908daf86f9 xilinx: Enable SPI driver for Versal
Enable Zynq SPI driver for Versal.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-29 08:55:43 +01:00
Michal Simek
05af4834ad xilinx: Consolidate board_fit_config_name_match() for Xilinx platforms
Move board_fit_config_name_match() from Zynq/ZynqMP to common location.
This change will open a way to use it also by Microblaze and Versal.
Through this function there is a way to handle images with multiple DTBs.
For now match it with DEVICE_TREE as is done for Zynq.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-29 08:55:43 +01:00
Ashok Reddy Soma
728d21b8c7 mmc: zynq_sdhci: Add common function to set input/output tapdelays
Remove setting tapdelays for different speeds separately. Instead use
the ITAP and OTAP delay values which are read from the device tree.
If the DT does not contain tap delay values, the predefined values
will be used for the same.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-10-29 08:55:43 +01:00
Ashok Reddy Soma
d3d880b41a mmc: zynq_sdhci: Extend UHS timings till hs200
Fix the condition to set UHS timings for speeds upto HS200.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2020-10-29 08:55:33 +01:00
Baruch Siach
6d1edab44c mtd: pxa3xx_nand: remove dead code
The kfree() call is unreachable, and is not needed. Remove this call and
the fail_disable_clk label.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
2020-10-29 08:00:12 +01:00
Shmuel Hazan
8dddfff4d8 mtd: pxa3xx_nand: port to use driver model
Use the generic DT code to find the device compatible property for us.
This makes the driver look more like other current drivers. It also make
it easier to add support for other variants like Armada 8K in a future
commit.

Signed-off-by: Shmuel Hazan <shmuel.h@siklu.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
2020-10-29 08:00:12 +01:00
Baruch Siach
a941226e00 arm: dts: armada-cp110-master: update nand-controller
Align node properties to kernel dts node.

The change of compatible property does not affect any currently
supported board.

Keep U-Boot specific nand-enable-arbiter, and num-cs for compatibility
with the current driver.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
2020-10-29 08:00:12 +01:00
Shmuel Hazan
e2eafaa18a arm: dts: armada-cp110-slave: add missing cps_nand
Align node properties to kernel dts node.

Keep U-Boot specific nand-enable-arbiter, and num-cs for compatibility
with the current driver.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Shmuel Hazan <shmuel.h@siklu.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
2020-10-29 08:00:12 +01:00
Stefan Roese
ccb350491f arm: octeontx: Enable network support in supported boards
Enable the now included network drivers in the currently supported
Marvell Octeon TX & TX2 boards.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Suneel Garapati <sgarapati@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
2020-10-29 08:00:12 +01:00
Igal Liberman
3261f6d390 phy: marvell: cp110: update mode parameter for pcie power on calls
It helps ATF to determine who called power on function (U-boot/Linux).

The corresponding ATF code was added in this commit:

  mvebu: cp110: avoid pcie power on/off sequence when called from Linux
  55df84f974

Signed-off-by: Igal Liberman <igall@marvell.com>
Reviewed-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
2020-10-29 08:00:12 +01:00
Grzegorz Jaszczyk
0a1a1642aa phy: marvell: cp110: let the firmware configure comphy for PCIe
Replace the comphy initialization for PCIe with appropriate SMC call, so
the firmware will perform appropriate comphy initialization.

Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Signed-off-by: Ken Ma <make@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
2020-10-29 08:00:12 +01:00
Grzegorz Jaszczyk
b24bb99df1 phy: marvell: cp110: let the firmware configure the comphy
Replace all comphy initialization with appropriate smc calls. It will
result with triggering synchronous exception that is handled by Secure
Monitor code in EL3. Then the Secure Monitor code will dispatch each smc
call (by parsing the smc function identifier) and triggers appropriate
comphy initialization.

This patch reworks serdes handling for: SATA, SGMII, HS-SGMII and SFI
interfaces.

Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
2020-10-29 08:00:12 +01:00
Tom Rini
81a659e10a Prepare v2021.01-rc1
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-10-28 16:30:06 -04:00
Tom Rini
4f1d3079b9 Merge branch '2020-10-28-mux-driver-framework'
- Add a framework for mux drivers
2020-10-28 14:50:09 -04:00
Pratyush Yadav
15995ac3f4 test: mux-cmd: Add tests for the 'mux' command
Tests tests run the three mux subcommands: list, select, and deselect,
and verify that the commands do what we expect.

Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-10-28 11:49:31 -04:00
Pratyush Yadav
05115abe8d cmd: Add a mux command
This command lets the user list, select, and deselect mux controllers
introduced with the mux framework on the fly. It has 3 subcommands:
list, select, and deselect.

List: Lists all the mux present on the system. The muxes are listed for
each chip. The chip is identified by its device name. Each chip can have
a number of mux controllers. Each is listed in sequence and is assigned
a sequential ID based on its position in the mux chip. It lists details
like ID, whether the mux is currently selected or not, the current
state, the idle state, and the number of states.

A sample output would look something like:

=> mux list
a-mux-controller:
	ID	Selected	Current State	Idle State	Num States
	0	no        	unknown   	as-is     	0x4
	1	no        	0x2       	0x2       	0x10
	2	no        	0x73      	0x73      	0x100

another-mux-controller:
	ID	Selected	Current State	Idle State	Num States
        0       no              0x1             0x1             0x4
        1       no              0x2             0x2             0x4

Select: Selects a given mux and puts it in the specified state. This
subcommand takes 3 arguments: mux chip, mux ID, state to set
the mux in. The arguments mux chip and mux ID are used to identify which
mux needs to be selected, and then it is selected to the given state.
The mux needs to be deselected before it can be selected again in
another state. The state should be a hexadecimal number.

For example:
=> mux list
a-mux-controller:
        ID      Selected        Current State   Idle State      Num States
        0       no              0x1             0x1             0x4
        1       no              0x1             0x1             0x4
=> mux select a-mux-controller 0 0x3
=> mux list
a-mux-controller:
        ID      Selected        Current State   Idle State      Num States
        0       yes             0x3             0x1             0x4
        1       no              0x1             0x1             0x4

Deselect: Deselects a given mux and puts it in its idle state. This
subcommand takes 2 arguments: the mux chip and mux ID to identify which
mux needs to be deselected. So in the above example, we can deselect mux
0 using:

=> mux deselect a-mux-controller 0
=> mux list
a-mux-controller:
        ID      Selected        Current State   Idle State      Num States
        0       no              0x1             0x1             0x4
        1       no              0x1             0x1             0x4

Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-10-28 11:49:31 -04:00
Jean-Jacques Hiblot
739592ccbb test: Add tests for the multiplexer framework
Provide tests to check the behavior of the multiplexer framework.

Two sets of tests are added. One is using an emulated multiplexer driver
that can be used to test basic functionality like select, deselect, etc.
The other is using the mmio mux which adds tests specific to it.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-10-28 11:49:31 -04:00
Pratyush Yadav
4145fc189c Kconfig: Increase the pre-relocation memory
The memory is close to full and adding a syscon node in test.dts makes
it go over the limit and makes malloc() fail on startup.

Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-10-28 11:49:31 -04:00
Jean-Jacques Hiblot
35b8b92c85 drivers: mux: mmio-based syscon mux controller
This adds a driver for mmio-based syscon multiplexers controlled by
bitfields in a syscon register range.
This is heavily based on the linux mmio-mux driver.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
2020-10-28 11:49:30 -04:00
Jean-Jacques Hiblot
90a979d788 dm: board: complete the initialization of the muxes in initr_dm()
This will probe the multiplexer devices that have a "u-boot,mux-autoprobe"
property. As a consequence they will be put in their idle state.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
2020-10-28 11:48:55 -04:00
Jean-Jacques Hiblot
0ad40b2463 drivers: Add a new framework for multiplexer devices
Add a new subsystem that handles multiplexer controllers. The API is the
same as in Linux.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
[trini: Update some error calls to use different functions or pass
        correct arguments]
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-10-28 11:48:32 -04:00
Tom Rini
39dd7c1d6b Pull request for UEFI sub-system for efi-2021-01-rc2
A software RTC driver is supplied for UEFI SCT testing.
 
 The following UEFI related bugs are fixed:
 
 * correct handling of daylight saving time in GetTime() and SetTime()
 * handling of the gd register in function tracing on RISC-V
 * disable U-Boot devices in ExitBootServices()
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Merge tag 'efi-2021-01-rc2' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi

Pull request for UEFI sub-system for efi-2021-01-rc2

A software RTC driver is supplied for UEFI SCT testing.

The following UEFI related bugs are fixed:

* correct handling of daylight saving time in GetTime() and SetTime()
* handling of the gd register in function tracing on RISC-V
* disable U-Boot devices in ExitBootServices()
2020-10-28 08:35:28 -04:00
Tom Rini
a45da8f51e Merge branch '2020-10-27-further-log-enhancements'
- Allow for log message continuation.
- Test fix, build time error checking for new categories
2020-10-28 08:34:11 -04:00
Heinrich Schuchardt
2a0cbf3bca log: correct and check array size of log categories
The log command has led to NULL dereferences if an unknown category name
name was used due to missing entries in the list of category names.

Add compile time checks for the array sizes of log_cat_name and
log_lvl_name to avoid future mishaps.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-10-27 17:04:15 -04:00
Heinrich Schuchardt
0eae552d18 efi_loader: daylight saving time
Adjust the SetTime() and GetTime() runtime services to correctly convert
the daylight saving time information when communicating with the RTC.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-10-27 21:13:16 +01:00
Ilias Apalodimas
529441ca89 efi_loader: Disable devices before handing over control
U-Boot Driver Model is supposed to remove devices with either
DM_REMOVE_ACTIVE_DMA or DM_REMOVE_OS_PREPARE flags set, before exiting.
Our bootm command does that by explicitly calling calling
"dm_remove_devices_flags(DM_REMOVE_ACTIVE_ALL);" and we also disable any
USB devices.

The EFI equivalent is doing none of those at the moment. As a result
probing an fTPM driver now renders it unusable in Linux. During our
(*probe) callback we open a session with OP-TEE, which is supposed to
close with our (*remove) callback. Since the (*remove) is never called,
once we boot into Linux and try to probe the device again we are getting
a busy error response. Moreover all uclass (*preremove) functions won't
run.

So let's fix this by mimicking what bootm does and disconnect devices
when efi_exit_boot_services() is called.

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-10-27 21:13:16 +01:00
Ilias Apalodimas
19763ea0d2 efi_loader: Sort header file ordering
Order header files according to https://www.denx.de/wiki/U-Boot/CodingStyle

Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-10-27 21:13:15 +01:00
Heinrich Schuchardt
d3d6afae3c trace: conserve gd register on RISC-V
An UEFI application may change the value of the register that gd lives in.
But some of our functions like get_ticks() access this register. So we
have to set the gd register to the U-Boot value when entering a trace
point and set it back to the application value when exiting the trace
point.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-10-27 21:13:15 +01:00
Heinrich Schuchardt
87e9963d5a rtc: provide an emulated RTC
On a board without hardware clock this software real time clock can be
used. The build time is used to initialize the RTC. So you will have
to adjust the time either manually using the 'date' command  or use
the 'sntp' to update the RTC with the time from a network time server.
See CONFIG_CMD_SNTP and CONFIG_BOOTP_NTPSERVER. The RTC time is
advanced according to CPU ticks.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-10-27 21:13:15 +01:00
Heinrich Schuchardt
cbf0ffea14 Makefile: provide constant with seconds since epoch
Provide a constant U_BOOT_EPOCH with the number of seconds since
1970-01-01. This constant can be used to initialize a software
real time clock until it is updated via the 'sntp' command.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-10-27 21:13:15 +01:00
Heinrich Schuchardt
920157678b test: log: test message continuation
Provide a unit test checking that a continuation message will use the same
log level and log category as the previous message.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-10-27 13:50:53 -04:00
Heinrich Schuchardt
d094a0734c log: allow for message continuation
Some drivers use macro pr_cont() for continuing a message sent via printk.
Hence if we want to convert printk messaging to using the logging system,
we must support continuation of log messages too.

As pr_cont() does not provide a message level we need a means of
remembering the last log level.

With the patch a pseudo log level LOGL_CONT as well as a pseudo log
category LOGC_CONT are introduced. Using these results in the application
of the same log level and category as in the previous log message.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-10-27 13:50:53 -04:00
Heinrich Schuchardt
993a06b614 log: move processing_msg to global data
Replace the static variable processing_msg by a field in the global data.
Make the field bool at it can only be true or false.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-10-27 13:50:53 -04:00
Anatolij Gustschin
986c980c82 nokia_rx51: re-enable CONSOLE_MUX and SYS_CONSOLE_IS_IN_ENV
With disabled legacy VIDEO option CONSOLE_MUX is not auto-selected
any more, re-enable it.

Fixes: 9dec5a0ea1 ("nokia_rx51: disable obsolete VIDEO config")
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Pali Rohár <pali@kernel.org>
2020-10-27 10:48:08 -04:00
Ashok Reddy Soma
2e819a77b9 mmc: zynq_sdhci: Add clock phase delays for Versal
Define default values for input and output clock phase delays for
Versal. Also define functions for setting tapdelays based on these
clock phase delays.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2020-10-27 08:13:34 +01:00
Ashok Reddy Soma
f4b297bbfd mmc: zynq_sdhci: Set tapdelays based on clk phase delays
Define and use functions for setting input and output tapdelays
based on clk phase delays.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2020-10-27 08:13:34 +01:00
Michal Simek
80355ae40d mmc: zynq_sdhci: Read clock phase delays from dt
Define input and output clock phase delays with pre-defined values.

Define arasan_sdhci_clk_data type structure and add it to priv
structure and store these clock phase delays in it.

Read input and output clock phase delays from dt. If these values are
not passed through dt, use pre-defined values.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2020-10-27 08:13:33 +01:00
Michal Simek
9851f50d3d mmc: zynq_sdhci: Move macro to the top
Just group macros below headers. Other patches will be using this location
too.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2020-10-27 08:13:33 +01:00
Ashok Reddy Soma
17a42abb40 mmc: Define timing macro's
Define timing macro's for all the available speeds of mmc. This is
done similar to linux. Replace speed macro's used with these new timing
macro's wherever applicable.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-10-27 08:13:33 +01:00
Ashok Reddy Soma
7a49a16ec5 Revert "mmc: zynq: parse dt when probing"
This reverts commit 942b5fc032.

This is partial revert of the above commit.

mmc_of_parse() is reading no-1-8-v from device tree and if set,
it is clearing the UHS speed capabilities of cfg->host_caps.
cfg->host_caps &= ~(UHS_CAPS | MMC_MODE_HS200 |
		    MMC_MODE_HS400 | MMC_MODE_HS400_ES);

This is still missing to clear UHS speeds like SDHCI_SUPPORT_SDR104,
SDHCI_SUPPORT_SDR50 and SDHCI_SUPPORT_DDR50.

Even if we clear the flags SDHCI_SUPPORT_XXX in mmc_of_parse(),
these speed flags are getting set again in cfg->host_caps in
sdhci_setup_cfg().

The reason for this is, SDHCI_SUPPORT_XXX flags are cleared
only if controller is not capable of supporting MMC_VDD_165_195 volts.

if (caps & SDHCI_CAN_VDD_180)
	cfg->voltages |= MMC_VDD_165_195;

if (!(cfg->voltages & MMC_VDD_165_195))
	caps_1 &= ~(SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 |
		    SDHCI_SUPPORT_DDR50);

It means "no-1-8-v", which is read from DT is not coming in to effect.
So it is better we keep the host quirks(SDHCI_QUIRK_NO_1_8_V) to
clear UHS speeds based on no-1-8-v from device tree.

Hence revert the functionality related to no-1-8-v only, rest is fine
in the patch.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-10-27 08:13:33 +01:00
Ashok Reddy Soma
17fbb598f6 spi: zynq_qspi: Add function description
Add function description for zynq_qspi_init_hw and zynq_qspi_chipselect.
Fix zqspi to priv in function descriptions.
Change the description of priv as pointer to zynq_qspi_priv structure.
Fix other function descriptions to kernel-doc style.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27 08:13:33 +01:00
Michal Simek
89b7f1010f mtd: spi: Fix incorrect indentation
Use tabs to be aligned with the rest of the code.

Fixes: 658df8bd94 ("mtd: spi-nor-core: Add octal mode support")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27 08:13:33 +01:00
Michal Simek
262bcedf10 microblaze: Enable board_late_init()
In board_late_init() several variables are setup to match the current
configuration.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27 08:13:33 +01:00
Michal Simek
1230582150 microblaze: Wire generic xilinx board_late_init_xilinx()
Call generic board_late_init_xilinx() to be aligned with the rest of xilinx
platforms. Also getting rid of initrd_high/fdt_high and use
bootm_low/boot_size instead.

Reported-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27 08:13:33 +01:00
Michal Simek
92dc921063 xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM
There is no reason not to use commong Kconfig by Microblaze too.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27 08:13:33 +01:00
Michal Simek
f2b0376010 xilinx: Remove additional newline in config files
Trivial fix.

Fixes: e519f03a18 ("cmd: mem: Remove CONFIG_SYS_MEMTEST_SCRATCH mapping")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27 08:13:33 +01:00