Commit graph

69356 commits

Author SHA1 Message Date
Jaehoon Chung
014b9f9676 configs: meson64: relocate config_distro_bootcmmd header
Relocate a config_distro_bootcmd header before defined
CONFIG_EXTRA_ENV_SETTINGS. Otherwise it can't change to specific
environment.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-11-05 16:27:31 +01:00
Neil Armstrong
72f2283973 doc: board: vim3: Fix build instructions
The build instructions were buggy and changed a little since they
were written.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-11-05 16:26:02 +01:00
Neil Armstrong
82aec2e53c doc: board: amlogic: Update support matrix
Update the matrix table with new supported features and
new SoC features to support.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-11-05 16:26:02 +01:00
Simon Glass
f36e4c7d80 x86: Use if instead of #ifdef in write_tables()
Use if() to remove the extra build path in this code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-05 14:58:45 +08:00
Simon Glass
cac9c6a38f x86: Add SMBIOS info for Coral
This is required by Chrome OS so that the audio and other unibuild
features work correctly. Add it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-05 14:58:45 +08:00
Simon Glass
726310166b x86: coral: Drop the duplicate PCIe settings
These settings are included twice. The second lot are correct, so drop the
others.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-05 14:58:45 +08:00
Simon Glass
dc0791d415 x86: Don't bother clearing global NVS
The bloblist guarantees that blobs are zeroed so there is no need to do
an additional memset(). Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-05 14:58:45 +08:00
Simon Glass
5019e201cc x86: acpi: Store the ACPI context in global_data
At present we create the ACPI context but then drop it after generation of
tables is complete. This is annoying because we have to then search for
tables later.

To fix this, allocate the context and store it in global_data.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-05 14:58:45 +08:00
Simon Glass
38e498c3a2 x86: Allow writing tables to fail
At present write_tables() can fail but does not report this problem to its
caller. Fix this by changing the return type.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-05 14:58:45 +08:00
Simon Glass
653554b40a x86: Add support for private files
Some boards need to include binary data into the image for use during the
boot process. Add a node for these.

An example is the audio-codec configuration used by some audio drivers on
Intel platforms. If no private files are provided, they will be omitted.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-05 14:58:45 +08:00
Simon Glass
dac7778d74 x86: Add a layout for Chrome OS verified boot
Add definitions for part of the vboot context used with verified boot.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-05 14:58:45 +08:00
Simon Glass
6571d87315 x86: apl: Add core init for the SoC
Set up MSRs required for Apollo Lake. This enables Linux to use the
timers correctly. Also write the fixed MSRs for this platform.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-05 14:58:45 +08:00
Simon Glass
1779b8a96a Add an assembly guard around linux/bitops.h
This file can be included by any header but it includes C code. Guard it
to avoid errors when compiling ASL, etc.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-05 14:58:45 +08:00
Christian Gmeiner
43a218b653 coreboot: make use of smbios parser
If u-boot gets used as coreboot payload it might be nice to get
vendor, model and bios version from smbios. I am not sure about
the output of all the read information.

With qemu target for coreboot this could look this:

CBFS: Found @ offset 14f40 size 3b188
Checking segment from ROM address 0xffc15178
Checking segment from ROM address 0xffc15194
Loading segment from ROM address 0xffc15178
  code (compression=1)
  New segment dstaddr 0x01110000 memsize 0x889ef srcaddr 0xffc151b0 filesize 0x3b150
Loading Segment: addr: 0x01110000 memsz: 0x00000000000889ef filesz: 0x000000000003b150
using LZMA
Loading segment from ROM address 0xffc15194
  Entry Point 0x01110000
BS: BS_PAYLOAD_LOAD run times (exec / console): 77 / 1 ms
Jumping to boot code at 0x01110000(0x07fa7000)

U-Boot 2020.10-00536-g5dcf7cc590-dirty (Oct 07 2020 - 14:21:51 +0200)

CPU: x86_64, vendor AMD, device 663h
DRAM:  127.1 MiB
MMC:
Video: No video mode configured in coreboot!
Video: No video mode configured in coreboot!
Vendor: QEMU
Model: Standard PC (i440FX + PIIX, 1996)
Bios Version: 4.12-3152-g326a499f6f-dirty
Net:   e1000: 52:54:00:12:34:56
       eth0: e1000#0
No working controllers found
Finalizing coreboot
Hit any key to stop autoboot:  0

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-05 14:58:45 +08:00
Christian Gmeiner
415eab0655 smbios: add parsing API
Add a very simple API to be able to access SMBIOS strings
like vendor, model and bios version.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-05 14:58:45 +08:00
Simon Glass
9d20db0483 x86: Fix up driver names to avoid dtoc warnings
At present there are a lot of dtoc warnings reported when building
chromebook_coral, of the form:

   WARNING: the driver intel_apl_lpc was not found in the driver list

Correct these by using driver names that matches their compatible string.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-05 14:58:45 +08:00
Simon Glass
ed0f868d50 cros_ec: Fix up driver names to avoid dtoc warnings
Fix the dtoc warning in these file by using a driver name that matches the
compatible string.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-05 14:58:45 +08:00
Sebastian Reichel
b431970e7f board: ge: b1x5v2: Add MAINTAINERS
Introduce maintainers file for the GE B1x5 board.

Cc: Huan 'Kitty' Wang <HuanWang@ge.com>
Cc: Ian Ray <ian.ray@ge.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2020-11-04 19:47:30 +01:00
Sebastian Reichel
3bbc763de6 board: ge: ppd: Update MAINTAINERS
This updates the PPD MAINTAINERS file doing a couple of changes:

 * Replace Martyn with myself, since he no longer has the hardware
   available and add Ian Ray as maintainer
 * Fix the board directory path, which was still listing freescale/
   instead of ge/
 * Order the list of files alphabetically
 * Add board specific device tree files to the file list

Cc: Martyn Welch <martyn.welch@collabora.com>
Cc: Ian Ray <ian.ray@ge.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2020-11-04 19:47:14 +01:00
Sebastian Reichel
dc438fb6e6 board: ge: bx50v3: Update MAINTAINERS
This updates the Bx50v3 MAINTAINERS file, so that it also catches
changes to the related device tree files. Additionally the list of
files has been sorted alphabetically and I added myself as maintainer.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2020-11-04 19:47:01 +01:00
Michal Simek
35b7ca768f arch: Move NEEDS_MANUAL_RELOC symbol to Kconfig
CONFIG_NEEDS_MANUAL_RELOC macro was out of Kconfig. Move it there to be
able to use compile-time checks to reduce the number of build paths.

Fixes: f9a882438966 ("dm: core: Convert #ifdef to if() in root.c") for Microblaze
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-11-04 10:13:44 -05:00
Heiko Schocher
46ce9e777c env: sf: fix init function behaviour
Michael wrote:
commit 92765f45bb ("env: Access Environment in SPI flashes before
relocation") at least breaks the Kontron sl28 board. I guess it also
breaks others which use a (late) SPI environment.

reason is, that env_init() sets the init bit, if there
is no init function defined in an environment driver,
and use default return value -ENOENT in this case
later for setting the default environment.

Change:
Environment driver can now implement an init
function and return, if this function does nothing,
simply -ENOENT.

env_init() now handles -ENOENT correct by setting the
inited bit for the environment driver. And if there
is no other environment driver whose init function
returns 0, load than the default environment.

This prevents that each environment driver needs to set the
default environment.

Fixes: 92765f45bb ("env: Access Environment in SPI flashes before relocation")
Reported-by: Michael Walle <michael@walle.cc>
Tested-by: Michael Walle <michael@walle.cc> [For the SF environment]
Signed-off-by: Heiko Schocher <hs@denx.de>
2020-11-03 10:04:25 -05:00
Tom Rini
7a8ac9df5d First set of u-boot-atmel fixes for 2021.01 cycle
-----BEGIN PGP SIGNATURE-----
 
 iQFQBAABCgA6FiEEqxhEmNJ6d7ZdeFLIHrMeAg6sL8gFAl+frmwcHGV1Z2VuLmhy
 aXN0ZXZAbWljcm9jaGlwLmNvbQAKCRAesx4CDqwvyP/tCACuq3aixxpR1qzb/Tk6
 MnE/Io9ehtq8WfY2M8ks5RK+K5Ezaukh9Edg7YW8j0mvoBZUQ35at8UXanr8XkEx
 vk51AkwmTJeckjZ7I8D9m/AIyAU4lVCB/HJp3KRcTdu39bSy+beudg7uinlmvoHP
 GSqmGArU58pbHrHi1xVgf8PIbCd52mVPvDu+ghxjKOTPl87WlRCjxelPuMxjLEQ2
 8KUuxuXad82S7oRFQz/TDkokf+d8AZVAbOXWqxAnHWNml+qXLWn/oohSQ5+QsYRY
 3K2cJFvI3cmAcr9usOX268u0wGd9kDYnQtfym2M8ul70S3pesqUsoiSET9vXq3zL
 yu8a
 =QSvy
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-atmel-fixes-2021.01-a' of https://gitlab.denx.de/u-boot/custodians/u-boot-atmel

First set of u-boot-atmel fixes for 2021.01 cycle:

This specific feature set includes the patches for DT required to fix
the warnings for newer DTC version (1.6.0+), i2c and spi bus unit
address.
2020-11-02 09:01:28 -05:00
Eugen Hristev
ef8f34aea5 ARM: dts: at91: sama5d3xmb_cmp: fix SPI bus unit address
w+arch/arm/dts/.at91sam9260ek.dtb.pre.tmp:119.21-123.7: Warning (spi_bus_reg): /ahb/apb/spi@fffc8000/mtd_dataflash@0: SPI bus unit address format error, expected "1"

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2020-11-02 08:58:38 +02:00
Eugen Hristev
2733e6fe5d ARM: dts: at91: sam9260ek: fix SPI bus unit address
w+arch/arm/dts/.at91sam9260ek.dtb.pre.tmp:119.21-123.7: Warning (spi_bus_reg): /ahb/apb/spi@fffc8000/mtd_dataflash@0: SPI bus unit address format error, expected "1"

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2020-11-02 08:58:38 +02:00
Eugen Hristev
9f37458b30 ARM: dts: at91: sama5d3xmb: fix I2C bus unit address
w+arch/arm/dts/sama5d3xmb.dtsi:64.25-83.7: Warning (i2c_bus_reg): /ahb/apb/i2c@f0018000/camera@0x30: I2C bus unit address format error, expected "30"

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2020-11-02 08:58:38 +02:00
Eugen Hristev
e0df9e846c ARM: dts: at91: gurnard: fix SPI bus unit address
w+arch/arm/dts/.at91sam9g45-gurnard.dtb.pre.tmp:118.21-122.7: Warning (spi_bus_reg): /ahb/apb/spi@fffa4000/mtd_dataflash@0: SPI bus unit address format error, expected "1"

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2020-11-02 08:58:38 +02:00
Eugen Hristev
397a28604c ARM: dts: at91: at91sam9g25ek: fix I2C bus unit address
w+arch/arm/dts/.at91sam9g25ek.dtb.pre.tmp:28.25-47.7: Warning (i2c_bus_reg): /ahb/apb/i2c@f8010000/camera@0x30: I2C bus unit address format error, expected "30"

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2020-11-02 08:58:38 +02:00
Eugen Hristev
6f668d2756 ARM: dts: at91: at91sam9g20ek_common: fix SPI bus unit address
w+arch/arm/dts/at91sam9g20ek_common.dtsi:100.21-104.7: Warning (spi_bus_reg): /ahb/apb/spi@fffc8000/mtd_dataflash@0: SPI bus unit address format error, expected "1"

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2020-11-02 08:58:37 +02:00
Eugen Hristev
f56a0ca685 ARM: dts: at91: at91sam9g20-taurus: fix SPI bus unit address
w+arch/arm/dts/.at91sam9g20-taurus.dtb.pre.tmp:79.18-83.4: Warning (spi_bus_reg): /ahb/apb/spi@fffc8000/mtd_dataflash@0: SPI bus unit address format error, expected "1"

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2020-11-02 08:58:37 +02:00
Eugen Hristev
a013df93e1 ARM: dts: at91: at91sam9261ek: fix SPI unit address warning
w+arch/arm/dts/.at91sam9261ek.dtb.pre.tmp:124.15-144.7: Warning (spi_bus_reg): /ahb/apb/spi@fffc8000/tsc2046@0: SPI bus unit address format error, expected "2"

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2020-11-02 08:58:37 +02:00
Eugen Hristev
7d0cad03d5 ARM: dts: at91: vinco: fix I2C warning bus unit address
w+arch/arm/dts/.at91-vinco.dtb.pre.tmp:131.18-134.7: Warning (i2c_bus_reg): /ahb/apb/i2c@f8024000/rtc@64: I2C bus unit address format error, expected "32"

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2020-11-02 08:58:37 +02:00
Tom Rini
41cab8edbc Pull request for UEFI sub-system for efi-2021-01-rc2 (2)
The series contains the following enhancements
 
 * preparatory patches for UEFI capsule updates
 * initialization of the emulated RTC using an environment variable
 
 and a bug fix
 
 * If DisconnectController() is called for a child controller that is the
   only child of the driver, the driver must be disconnected.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEEbcT5xx8ppvoGt20zxIHbvCwFGsQFAl+e1WUACgkQxIHbvCwF
 GsRHhQ//X/hQiow1/3YwskyZkC89QPLE+TDeGcRHdy7W2rjfJlOBJtsI1tzvsTWw
 8etgIuoh1MKebJZZQk/ZxKdWOaN3RWP7wL/9c6PHpkkML+WzyLWShf5UgLMWeo3w
 a7t0LW4kfxbzmhg/f4x0Gi3qUh0SiS6T8Q5X/SlJOX091IvCmCOTkGUT6dBogm78
 WnISQvgP3uApOt2s66hVVtFaH4zbXDYwDnQhhUoonRF1AfuE3jTyr39IoNsCdPOx
 vEbTqNKQQnt4yIIaPJlV+KX//jtCCnyLBPrZA1tI2QPyBjADmNcau2OjlBZyJpr0
 1awgSueXgBtMCAp6bHMl9p3eSKYv2f0BvPGljgKrs9dfIZk+XN0w62VuSYwRi7TU
 ZEppINMisM1hC9+7jKNGn0nE9y3UldBSNThWxk8ykpWL+Btv5KeArHK4+916nadQ
 a7t+6Ow7hiVI1Y/3TWaLvCi7xfqsU87QH6dx0nozgBUotuujIqa5lAeSGR9Rc6N2
 PSblEGf8AA8+oGAdBhNvDncHiRLWkUoBqFsaaAk4EiaHQk60InZ9CpQdeMqHErcx
 uLL9JcOCZeStcWF+vWmyU2L49O88HRHvboM7zA+gqLIUilwgKxmlOocoq+0jtA4l
 Bg72F3cI7+g+aTidskEOGo2v2cj0dh32ub5CqRHLdt3PUzP6qhs=
 =mCEL
 -----END PGP SIGNATURE-----

Merge tag 'efi-2020-01-rc2-2' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi

Pull request for UEFI sub-system for efi-2021-01-rc2 (2)

The series contains the following enhancements

* preparatory patches for UEFI capsule updates
* initialization of the emulated RTC using an environment variable

and a bug fix

* If DisconnectController() is called for a child controller that is the
  only child of the driver, the driver must be disconnected.
2020-11-01 10:56:37 -05:00
Sebastian Reichel
64272efdaf board: ge: b1x5v2: Add GE B1x5v2 and B1x5Pv2
GE B1x5v2 patient monitor series is similar to the CARESCAPE Monitor
series (GE Bx50). It consists of a carrier PCB used in combination
with a Congatec QMX6 SoM. This adds U-Boot support using device model
everywhere and SPL for memory initialization.

Proper configuration is provided as 'ge_b1x5v2_defconfig' and the
combined image u-boot-with-spi.imx can be flashed directly to 1024
byte offset to /dev/mtdblock0. Alternatively SPL and u-boot.imx can
be loaded separately via USB-OTG using e.g. imx_usb.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-11-01 16:01:40 +01:00
Sebastian Reichel
def6f53d21 board: ge: common: vpd: separate I2C specific code
This separates the I2C specific code from the generic
GE vital product data code, so that the generic parts
can be used on hardware with VPD stored in SPI flash
memory.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2020-11-01 15:58:47 +01:00
Sebastian Reichel
987b8f614c board: ge: common: add config option for RTC and VPD feature
While this code is being used by all GE platforms its useful
to have it behind a config option for hardware bringup of
new platforms.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2020-11-01 15:58:47 +01:00
Sebastian Reichel
36e3e7deb2 board: ge: common: rename ge_common.c to ge_rtc.c
The file only contains RTC related code, so let's name
it accordingly.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2020-11-01 15:58:47 +01:00
Sebastian Reichel
8ccc6bffaa sysreset: Add poweroff-gpio driver
Add GPIO poweroff driver, which is based on the Linux
driver and uses the same DT binding.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2020-11-01 15:58:47 +01:00
Sebastian Reichel
436ba4e0c7 imx6: allow usage of disable_ldb_di_clock_sources for CONFIG_MX6QDL
Allow using disable_ldb_di_clock_sources with just the combined
CONFIG_MX6QDL being enabled.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2020-11-01 15:58:47 +01:00
Sebastian Reichel
9bbe210512 rtc: m41t62: add oscillator fail bit reset support
In case of empty battery or glitches the oscillator fail
bit might be set. This will reset the bit in the reset
routine.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2020-11-01 15:58:47 +01:00
Sebastian Reichel
8691198d1b rtc: m41t62: reset SQW in m41t62_rtc_reset
This takes care of resetting the 32kHz square wave, which is
used by some boards as clock source for the SoC.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2020-11-01 15:58:47 +01:00
Sebastian Reichel
cfe8949677 bootcount: add a DM SPI flash backing store for bootcount
This driver allows to use SPI flash as backing store for
boot counter values with DM enabled.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2020-11-01 15:58:47 +01:00
Teresa Remmet
0cc2a07879 board: phytec: imx8mm: Add PHYTEC phyCORE-i.MX8MM support
Add support PHYTEC phyCORE-i.MX8MM SOM.

Supported features:
 - 2GB LPDDR4 RAM
 - 1x 1Gbit Ethernet
 - eMMC
 - external SD
 - debug UART3
 - watchdog
 - i2c eeprom

Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
2020-11-01 15:58:19 +01:00
Marek Vasut
08945cceff ARM: imx: Add support for the primary/secondary bmode to MX53
Implement the 'getprisec' subcommand of 'bmode' command for i.MX53 and
also the primary/secondary bootmode switching.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2020-11-01 15:57:48 +01:00
Michael Walle
95b3d6a419 watchdog: Hide WATCHDOG_RESET_DISABLE
This option is only supported by the IMX watchdog and seems to be
similar to CONFIG_WATCHDOG.

Move it below the IMX watchdog and make it dependent on IMX_WATCHDOG.

Signed-off-by: Michael Walle <michael@walle.cc>
2020-11-01 15:57:35 +01:00
Lukasz Majewski
e98d834713 defconfig: Enable CONFIG_SHOW_BOOT_PROGRESS for imx53's HSC and DDC devices
This option allows using show_boot_progress to visualize the state of
boot process.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2020-11-01 15:56:55 +01:00
Lukasz Majewski
8a8ec73ebd dts: Provide LED DTS description for HSC and DDC imx53 devices
Those two LEDs are used to indicate U-Boot's boot stage.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2020-11-01 15:53:51 +01:00
Lukasz Majewski
9c1f71060b arm: Implement show_boot_progress() for imx53's HSC and DDC devices
This patch provides information regarding the boot stage with using LEDs.
On the very beginning of U-Boot execution the GREEN LED is turned on.
When the execution is passed to Linux kernel the GREEN LED is off and
RED one is ON.

Afterwards, when Linux takes over the execution, the "heartbeat" driver
provides indication if the board is still alive.

Please also note that this patch uses {set|clr}bits_le32 macros as turning
ON GREEN LED is performed in a _very_ early stage of U-Boot execution
before DM_GPIOs are initialized.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2020-11-01 15:53:40 +01:00
Fabio Estevam
fc4e69f63f mx7ulp: clock: Align the PLL_USB frequency
The command 'clocks' shows the following output:

=> clocks
PLL_A7_SPLL         528 MHz
PLL_A7_APLL         529 MHz
PLL_USB           0 MHz

Add some extra spaces so that the PLL_USB information gets aligned with
the previous reported frequencies.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2020-11-01 15:53:29 +01:00
Fabio Estevam
538723e012 mx7ulp: clock: Remove unuseful information
The command 'clocks' shows the following output:

=> clocks
PLL_A7_SPLL         528 MHz
PLL_A7_APLL         529 MHz
PLL_USB           0 MHz

....

[do_mx7_showclocks] addr = 0x9FFB61F1

The last line is not useful at all, so just remove it.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2020-11-01 15:53:17 +01:00