Commit graph

2 commits

Author SHA1 Message Date
York Sun
316f0d0f8f powerpc: mpc85xx: Fix static TLB table for SDRAM
Most predefined TLB tables don't have memory coherence bit set for
SDRAM. This wasn't an issue before invalidate_dcache_range() function
was enabled. Without the coherence bit, dcache invalidation doesn't
automatically flush the cache. The coherence bit is already set when
dynamic TLB table is used. For some boards with different SPL boot
method, or with legacy fixed setting, this bit needs to be set in
TLB files.

Signed-off-by: York Sun <york.sun@nxp.com>
2017-12-06 14:54:12 -08:00
Oleksandr G Zhadan
8b0044ff59 powerpc/mpc85xx: Add board support for ucp1020
New QorIQ p1020 based board support from Arcturus Networks Inc.
http://www.arcturusnetworks.com/products/ucp1020/

Signed-off-by: Michael Durrant <mdurrant@arcturusnetworks.com>
Signed-off-by: Oleksandr G Zhadan <oleks@arcturusnetworks.com>
[York Sun: remove patman tags from commit message]
Reviewed-by: York Sun <yorksun@freescale.com>
2015-05-04 09:26:26 -07:00