Commit graph

4 commits

Author SHA1 Message Date
Stephen Warren
019bc6259d ARM: tegra: enable PCI support of p2371-2180
p2371-2180 has two PCI ports; a regular x4 slot and a x1 M.2 slot. This
patch adds the relevant DT to enable the PCI controller and configure
the XUSB padctl pin muxing, and code to turn on the PCI power and enable
PCI features in U-Boot. I have only tested the x4 slot.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-11-12 09:21:06 -07:00
Stephen Warren
b9f269f60f ARM: tegra: replace V_PROMPT define with kconfig
Commit 181bd9dc61 "kconfig: add config option for shell prompt" replaced
define V_PROMPT with Kconfig option SYS_PROMPT. This crossed with patches
adding Tegra T210 boards. Migrate the boards to the new scheme.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-09-16 16:10:22 -07:00
Stephen Warren
bfac084723 ARM: tegra: fix COUNTER_FREQUENCY for T210
While T210 boards all have 38.4MHz crystals, per the TRM, the only
supported configuration is to divide the crystal frequency by 2 to
generate clk_m, which is what feeds the ARM generic timers amongst other
things. Fix the value of COUNTER_FREQUENCY to reflect this divide-by-2.

When I queried the 19.2 value in Tom's original T210 patches, I wasn't
aware of this extra divide-by-2, and didn't notice any effect from the
incorrect value, since its only used if U-Boot is booted in EL3, whereas
I'm booting it in EL2.

Reported-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-09-16 16:10:22 -07:00
Stephen Warren
2573428140 ARM: tegra: Add p2371-2180 board
P2371-2180 is a P2180 CPU board married to a P2597 I/O board. The
combination contains SoC, DRAM, eMMC, SD card slot, HDMI, USB
micro-B port, Ethernet via USB3, USB3 host port, SATA, PCIe, and
two GPIO expansion headers.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-09-16 16:10:22 -07:00