Commit graph

803 commits

Author SHA1 Message Date
Prabhakar Kushwaha
7d436078fe powerpc/t1040qds: Add T1040QDS board
T1040QDS is a high-performance computing evaluation, development and
test platform supporting the T1040 QorIQ Power Architecture™ processor.

 T1040QDS board Overview
 -----------------------
 - Four e5500 cores, each with a private 256 KB L2 cache
 - 256 KB shared L3 CoreNet platform cache (CPC)
 - Interconnect CoreNet platform
 - 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and interleaving
   support
 - Data Path Acceleration Architecture (DPAA) incorporating acceleration
 for the following functions:
    -  Packet parsing, classification, and distribution
    -  Queue management for scheduling, packet sequencing, and congestion
    	management
    -  Cryptography Acceleration
    - RegEx Pattern Matching Acceleration
    - IEEE Std 1588 support
    - Hardware buffer management for buffer allocation and deallocation
 - Ethernet interfaces
    - Integrated 8-port Gigabit Ethernet switch
    - Four 1 Gbps Ethernet controllers
 - SERDES Connections, 8 lanes supporting:
      — PCI Express: supporting Gen 1 and Gen 2;
      — SGMII
      — QSGMII
      — SATA 2.0
      — Aurora debug with dedicated connectors
 - DDR Controller 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and
   Interleaving
 -IFC/Local Bus
     - NAND flash: 8-bit, async, up to 2GB.
     - NOR: 8-bit or 16-bit, non-multiplexed, up to 512MB
     - GASIC: Simple (minimal) target within Qixis FPGA
     - PromJET rapid memory download support
 - Ethernet
     - Two on-board RGMII 10/100/1G ethernet ports.
     - PHY #0 remains powered up during deep-sleep
 - QIXIS System Logic FPGA
 - Clocks
     - System and DDR clock (SYSCLK, “DDRCLK”)
     - SERDES clocks
 - Power Supplies
 - Video
     - DIU supports video at up to 1280x1024x32bpp
 - USB
     - Supports two USB 2.0 ports with integrated PHYs
     — Two type A ports with 5V@1.5A per port.
     — Second port can be converted to OTG mini-AB
 - SDHC
     - SDHC port connects directly to an adapter card slot, featuring:
     - Supporting SD slots for: SD, SDHC (1x, 4x, 8x) and/or MMC
     — Supporting eMMC memory devices
 - SPI
    -  On-board support of 3 different devices and sizes
 - Other IO
    - Two Serial ports
    - ProfiBus port
    - Four I2C ports

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
[York Sun: fix conflict in boards.cfg]
Acked-by-by: York Sun <yorksun@freescale.com>
2013-10-16 16:15:16 -07:00
Zhao Qiang
ffee1dde3c SGMII:fix PHY addresses for QSGMII Riser Card working in SGMII mode
Fix PHY addresses for QSGMII Riser Card working in
SGMII mode on board P3041/P5020/P4080/P5040/B4860.

QSGMII Riser Card can work in SGMII mode, but
having the different PHY addresses.
So the following steps should be done:
	1. Confirm whether QSGMII Riser Card is used.
	2. If yes, set the proper PHY address.
Generally, the function is_qsgmii_riser_card() is
for step 1, and set_sgmii_phy() for step 2.

However, there are still some special situations,
take P5040 and B4860 as examples, the PHY addresses
need to be changed when serdes protocol is changed,
so it is necessary to confirm the protocol before
setting PHY addresses.

Signed-off-by: Zhao Qiang <B45475@freescale.com>
2013-10-16 16:13:11 -07:00
Wolfgang Denk
93e1459641 Coding Style cleanup: replace leading SPACEs by TABs
Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Drop changes for PEP 4 following python tools]
Signed-off-by: Tom Rini <trini@ti.com>
2013-10-14 16:06:54 -04:00
Wolfgang Denk
3765b3e7bd Coding Style cleanup: remove trailing white space
Signed-off-by: Wolfgang Denk <wd@denx.de>
2013-10-14 16:06:53 -04:00
Tom Rini
6297872cd5 Merge branch 'master' of git://git.denx.de/u-boot-arm 2013-10-02 11:45:22 -04:00
Albert ARIBAUD
f04c537629 Merge branch 'u-boot-imx/master' into 'u-boot-arm/master' 2013-10-02 14:53:27 +02:00
Heiko Schocher
93ff255298 net, phy, cpsw: fix NULL pointer deference
if phy_connect() did not find a phy, phydev is NULL and
following code in cpsw_phy_init() crashes. Fix this.

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Tom Rini <trini@ti.com>
Acked-by: Mugunthan V N <mugunthanvnm@ti.com>
2013-09-20 16:57:40 -04:00
Fabio Estevam
fd37f195ca net: fec_mxc: Fix timeouts during tftp transfer
Performing tftp transfers on mx28 results in random timeouts.

Hector Palacios and Robert Hodaszi analyzed the root cause being related to the
wrong alignment of the 'buff' buffer inside fec_recv().

Benoît Thébaudeau provided an excellent analysis of the alignment bug that is
present on older versions, such as GCC 4.5.4:

http://marc.info/?l=u-boot&m=137942904906131&w=2

Use ALLOC_CACHE_ALIGN_BUFFER() to avoid alignment issues from older GCC
versions.

Reported-by: Hector Palacios <hector.palacios@digi.com>
Tested-by: Oliver Metz <oliver@freetz.org>
Tested-by: Hector Palacios <hector.palacios@digi.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
Tested-by: Marek Vasut <marex@denx.de>
2013-09-20 17:55:37 +02:00
Fabio Estevam
7df51fd8be net: fec_mxc: Add support for mx6 solo-lite
Similarly as mx25 and mx53, mx6solo-lite needs to setup the MII gasket for RMII
mode.

Add support for mx6solo-lite.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2013-09-20 17:55:36 +02:00
Wolfgang Denk
1b387ef55c SPDX: fix IBM-pibs license identifier
The SPDX License List version 1.19 now contains an official entry for
the IBM-pibs license.  However, instead of our suggestion "ibm-pibs",
the SPDX License List uses "IBM-pibs", with the following rationale:
"The reason being that all other SPDX License List short identifiers
tend towards using capital letters unless spelling a word.  I'd prefer
to be consistent to this end".

Change the license IDs to use the official name.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2013-09-20 10:30:54 -04:00
Robert P. J. Day
1bce2aeb6f Cosmetic: Fix a number of typos, no functional changes.
Fix various misspellings of things like "environment", "kernel",
"default" and "volatile", and throw in a couple grammar fixes.

Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
2013-09-20 10:30:54 -04:00
Albert ARIBAUD
19d829fa60 Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
Conflicts:
	drivers/serial/serial.c

The conflict above was a trivial case of adding one init
function in each branch, and manually resolved in merge.
2013-09-05 11:15:26 +02:00
Albert ARIBAUD
4eef93da26 Merge branch 'u-boot-atmel/master' into 'u-boot-arm/master' 2013-09-04 11:50:25 +02:00
Bo Shen
8314ccd8d4 net: macb: fix the following building warning
fix the following building warning
---8>---
macb.c: In function 'macb_init':
macb.c:400:14: warning: 'phydev' may be used uninitialized in this function
macb.c:377:21: note: 'phydev' was declared here
---<8---

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2013-08-22 16:49:29 +02:00
Eric Nelson
ddb636bd66 fec_mxc: set ethaddr if fuses burned and not previously set
Without this change, the following message is generated:
	Warning: FEC using MAC address from net device

See doc/README.enetaddr for details.

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2013-08-21 19:20:28 +02:00
Shaohui Xie
1c68d01eea powerpc/t4240: add QSGMII interface support
Also some fix for QSGMII.
1. fix QSGMII configure of Serdes2.
2. fix PHY address of QSGMII MAC9 & MAC10 for each FMAN.
3. fix dtb for QSGMII interface.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
2013-08-20 10:46:48 -07:00
Wolfgang Denk
cb3761ea99 SPDX-License-Identifier: convert BSD-3-Clause files
Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini Don't remove some copyrights by accident]
Signed-off-by: Tom Rini <trini@ti.com>
2013-08-19 15:45:35 -04:00
Wolfgang Denk
46263f2de4 SPDX-License-Identifier: convert PIBS licensed files
This commit adapts the files that were derived from PIBS (PowerPC
Initialization and Boot Software) codeto using SPDX License
Identifiers.

So far, SPDX has not assigned an official License ID for the PIBS
license yet, so this should be considered preliminary.

Note that the following files contained incorrect license information:

	arch/powerpc/cpu/ppc4xx/4xx_uart.c
	arch/powerpc/cpu/ppc4xx/start.S
	arch/powerpc/include/asm/ppc440.h

These files included, in addition to the GPL-2.0 / ibm-pibs dual
license as inherited from PIBS, a GPL-2.0+ license header which was
obviously incorrect.  This has been removed.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Wolfgang Denk <wd@denx.de>

Conflicts:
	Licenses/README
Acked-by: Stefan Roese <sr@denx.de>
2013-08-19 15:34:14 -04:00
Kuo-Jung Su
0628cb2659 net: ftmac110: Update tx/rx descriptor format
1. Reformat tx/rx descriptor as an uniform struct.
2. Replace uint32_t[2] with uint64_t for descriptor control.

Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com>
CC: Joe Hershberger <joe.hershberger@gmail.com>
2013-08-19 12:34:21 -05:00
Kuo-Jung Su
4b7be19920 net: ftmac110: struct ftmac110_regs __iomem * -> struct ftmac110_regs *
Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com>
CC: Joe Hershberger <joe.hershberger@gmail.com>
2013-08-19 12:34:21 -05:00
Kuo-Jung Su
102a8cd3ed net: ftmac110: Update license statement
Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com>
CC: Joe Hershberger <joe.hershberger@gmail.com>
2013-08-19 12:34:20 -05:00
Bhupesh Sharma
c624d168bf net: phy/realtek: Add support for RTL8211DN and RTL8211E phy modules
This patch adds support for Realtek PHY modules RTL8211DN and
RTL8211E (variants: RTL8211E-VB-CG, RTL8211E-VL-CG, RTL8211EG-VB-CG),
which can be found on Freescale's T1040RDB boards.

To make the driver more generic across 8211 family, a generic name 8211x
is added for macros and function names.

Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
2013-08-19 12:34:19 -05:00
Axel Lin
a62cd29c98 net: Use ARRAY_SIZE at appropriate places
Use ARRAY_SIZE instead of having similar implementation in each drivers.
The NUMELEMS defined in drivers/net/npe/include/IxOsalTypes.h is not used
at all, so this patch removes it instead of converting it to use ARRAY_SIZE.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Ben Warren <biggerbadderben@gmail.com>
Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: York Sun <yorksun@freescale.com>
2013-08-19 12:34:18 -05:00
Fabio Estevam
25634210af phy: smsc: LAN8710/8720 are not Gbit PHYs
LAN8710/8720 are 10/100 Mbps PHYs, so fix the '.features' field.

Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2013-08-19 12:34:18 -05:00
Tom Rini
e20cc2ca15 Merge branch 'master' of git://88.191.163.10/u-boot-arm
Fixup an easy conflict over adding the clk_get prototype and USB_OTG
defines for am33xx having moved.

Conflicts:
	arch/arm/include/asm/arch-am33xx/hardware.h

Signed-off-by: Tom Rini <trini@ti.com>
2013-08-18 14:14:34 -04:00
York Sun
7adefb55ad drivers/fm: Fix compiling error if FW location is not defined
FMAN firmware can be in NOR flash, NAND flash, SPI flash, MMC or even
remote. In case none of them is defined, set it to null.

Signed-off-by: York Sun <yorksun@freescale.com>
2013-08-09 12:41:38 -07:00
Heiko Schocher
f6d1f6e4a5 net, phy, cpsw: fix gigabit register access
accessing a lan9303 switch with the cpsw driver results in wrong
speed detection, as the switch sets the BMSR_ERCAP in BMSR
register, and follow read of the MII_STAT1000 register fails, as
the switch does not support it. Current code did not check,
if a phy_read() fails ... fix this.

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Acked-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
2013-07-30 09:21:42 -04:00
Mugunthan V N
454ac63525 drivers: net: cpsw: Enable statistics for all port
Enable hardware statistics for all ports, enabling only to host port is useless

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
2013-07-26 16:39:11 -04:00
Mugunthan V N
2bf36ac638 drivers: net: cpsw: remove hard coding bd ram for cpsw
BD ram address may vary in various SOC, so removing the hardcoding and
passing the same information through platform data

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
2013-07-26 16:39:11 -04:00
Albert ARIBAUD
8b485ba12b Merge branch 'u-boot/master' into u-boot-arm/master 2013-07-25 17:57:46 +02:00
Rob Herring
393ee7f342 net: calxedaxgmac: enable rx cut-thru
There is no reason to wait for the entire frame to start DMA on receive,
so enable rx cut-thru for better performance.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
2013-07-25 08:14:44 +02:00
Gabor Juhos
54fbcb0c04 net: pcnet: use pci_virt_to_mem to obtain buffer addresses
The pcnet driver uses the pci_phys_to_mem function
to get the memory address of the DMA buffers. This
This assumes an 1:1 mapping between the PCI and
physical memory which is not true on all platforms.

On MIPS platform U-Boot is running within a mapped
memory region, and the pci_phys_to_mem macro can't
be used to obtain the memory address of the buffers.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2013-07-24 09:51:03 -04:00
Wolfgang Denk
1a4596601f Add GPL-2.0+ SPDX-License-Identifier to source files
Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini <trini@ti.com>
2013-07-24 09:44:38 -04:00
Fabio Estevam
9a5dad2393 net: phy: Set SUPPORTED_1000baseX_Half flag in ESTATUS_1000_XHALF case
Commit de1d786e (add support for Xilinx 1000BASE-X phy (GTX)) introduced the
checking for ESTATUS_1000_XHALF, but it incorrectly sets the
SUPPORTED_1000baseX_Full flag in this case.

Set the SUPPORTED_1000baseX_Half flag instead.

Acked-by: Charles Coldwell <coldwell@gmail.com>
Reviewed-By: Sascha Silbe <t-uboot@infra-silbe.de>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2013-07-19 17:12:20 -04:00
Sascha Silbe
9ba30f6bc2 phy: fix 10/100Mbps operation on 1Gbps-capable links
de1d786 [add support for Xilinx 1000BASE-X phy (GTX)] introduced a
check for the extended status register in order to support
1Gbps-capable PHYs that don't have the 1000BASE-T registers. Since
Extended Status only indicates what the PHY (i.e. the local side) is
capable of, this broke communication with non-1Gbps peers.

Only check the extended status if the 1000BASE-T registers are
actually missing so we don't end up setting speed to 1Gbps even though
the previous test (for the combination of local and peer support for
1Gbps) already indicated we can't do 1Gbps with the current peer.

Signed-off-by: Sascha Silbe <t-uboot@infra-silbe.de>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2013-07-19 17:12:16 -04:00
Tom Rini
fbbbc86e8e Merge branch 'master' of git://git.denx.de/u-boot-arm
Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and
serial.

Conflicts:
	arch/arm/dts/exynos5250.dtsi

Signed-off-by: Tom Rini <trini@ti.com>
2013-07-12 10:36:48 -04:00
Albert ARIBAUD
efc284e325 Merge branch 'u-boot-imx/master' into 'u-boot-arm/master' 2013-07-12 13:20:35 +02:00
Marek Vasut
ab94cd491f net: fec: Avoid MX28 bus sync issue
The MX28 multi-layer AHB bus can be too slow and trigger the
FEC DMA too early, before all the data hit the DRAM. This patch
ensures the data are written in the RAM before the DMA starts.
Please see the comment in the patch for full details.

This patch was produced with an amazing help from Albert Aribaud,
who pointed out it can possibly be such a bus synchronisation
issue.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
2013-07-12 09:29:32 +02:00
Marek Vasut
3104ce1f6f net: fec: Remove bogus flush_dcache_range() call
Remove incorrectly called and duplicate flush_dcache_range() call
from fec_mxc driver. The call is not needed, since the caches are
already flushed in fec_tbd_init(), moreover the second argument should
be the ending address, not size.

Signed-off-by: Marek Vasut <marex@denx.de>
Reported-by: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tom Rini <trini@ti.com>
2013-07-12 09:26:08 +02:00
Heiko Schocher
433a2c5325 phylib: add atheros ar803x phy
add atheros ar803x phy, used on the upcoming siemens boards.

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Andy Fleming <afleming@freescale.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
2013-06-24 19:11:17 -05:00
Heiko Schocher
96d0b9e100 phylib: add natsemi dp83630 phy
add natsemi dp83630 phy, used on the upcoming siemens boards.

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Andy Fleming <afleming@freescale.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
2013-06-24 19:11:17 -05:00
Kuo-Jung Su
a8f9cd1893 net: update FTGMAC100 for MMU/D-cache support
Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com>
CC: Joe Hershberger <joe.hershberger@gmail.com>
CC: Tom Rini <trini@ti.com>
2013-06-24 19:11:17 -05:00
Kuo-Jung Su
c4775476d2 net: add Faraday FTMAC110 10/100Mbps ethernet support
Faraday FTMAC110 10/100Mbps supports half-word data transfer for Linux.
However it has a weird DMA alignment issue:

(1) Tx DMA Buffer Address:
    1 bytes aligned: Invalid
    2 bytes aligned: O.K
    4 bytes aligned: O.K

(2) Rx DMA Buffer Address:
    1 bytes aligned: Invalid
    2 bytes aligned: O.K
    4 bytes aligned: Invalid!!!

Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Cc: Tom Rini <trini@ti.com>
2013-06-24 19:11:16 -05:00
SARTRE Leo
42a7cb50a9 net: phy: supplement support for Micrel's KSZ9031
Add function ksz9031_phy_extended_write and ksz9031_phy_extended_read

Signed-off-by: Leo Sartre <lsartre@adeneo-embedded.com>
2013-06-24 19:11:16 -05:00
Bo Shen
d256be29f8 net: macb: add support for gigabit MAC
Add gigabit MAC support in macb driver
  - using IP version to distinguish whether MAC is GMAC

Signed-off-by: Bo Shen <voice.shen@atmel.com>
2013-06-24 19:11:16 -05:00
Bo Shen
b1a0006eba net: macb: using phylib to configure phy device
using phylib to configure phy device in macb driver

Signed-off-by: Bo Shen <voice.shen@atmel.com>
2013-06-24 19:11:15 -05:00
Bo Shen
d8f64b4441 net: macb: using AT91FAMILY replace #ifdeferry
Using CONFIG_AT91FAMILY replace #ifdeferry for atmel SoC

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>
2013-06-24 19:11:15 -05:00
Roberto Cerati
45a1693a31 net: ks8851_mll: add ethernet support
The device interface is 16 bits wide.
All the available packets are read from the incoming fifo.

Signed-off-by: Roberto Cerati <roberto.cerati@bticino.it>
Signed-off-by: Raffaele Recalcati <raffaele.recalcati@bticino.it>
[voice.shen@atmel.com: address comments from review results]
[voice.shen@atmel.com: clean up for submit]
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Tested-by: Raffaele Recalcati <raffaele.recalcati@bticino.it>
2013-06-24 19:11:14 -05:00
Xie Xiaobo
6027384a69 phylib: Add Atheros AR8035 GETH PHY support
Signed-off-by: Xie Xiaobo <X.Xie@freescale.com>
2013-06-24 19:11:14 -05:00
Charles Coldwell
de1d786edf add support for Xilinx 1000BASE-X phy (GTX)
commit 39695029bc15041c809df3db4ba19bd729c447fa
Author: Charles Coldwell <coldwell@ll.mit.edu>
Date:   Tue Feb 19 08:27:33 2013 -0500

    Changes to support the Xilinx 1000BASE-X phy (GTX/MGT)

Signed-off-by: Charles Coldwell <coldwell@ll.mit.edu>
2013-06-24 19:11:13 -05:00