Commit graph

56960 commits

Author SHA1 Message Date
Simon Glass
6c456516e2 x86: Support PCI VGA ROM when TPL is used
When TPL is in use, U-Boot proper should support initing the VGA ROM even
though the 32-bit init portion is in SPL. Update the condition to handle
this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-08 13:02:16 +08:00
Simon Glass
bf4d8beb12 x86: Don't generate a bootstage report in SPL
This report is normally generated by U-Boot proper. Correct the condition
here so that it respects the Kconfig options for bootstage.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-08 13:02:16 +08:00
Simon Glass
665cb18ea6 x86: Don't set up MTRRs in SPL
The MTRRs are normally set up in U-Boot proper, so avoid setting them up
in SPL as well.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-08 13:02:16 +08:00
Simon Glass
9fa31fc51d x86: Support TPL in Intel common code
Update the Makefie rules to ensure that the correct files are built when
TPL is being used.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-08 13:02:16 +08:00
Simon Glass
f77ab00e89 x86: sysreset: Implement the get_last() method
Add a default implementation of this method which always indicates that
the last reset was a power-on reset. This is the most likely type of reset
and without a PCH-specific driver we cannot determine any other type.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-08 13:02:16 +08:00
Simon Glass
d6b1ba2fb9 x86: sysreset: Implement power-off if available
On modern x86 devices we can power the system off using the power-
management features of the PCH. Add an implementation for this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-08 13:02:15 +08:00
Simon Glass
40476f4afc x86: sysreset: Separate out the EFI code
The EFI implementation of reset sits inside the driver and is called
directly from outside the driver, breaking the normal driver-model
conventions. Worse, it passed NULL as the device pointer, hoping that
the called function won't use it, which breaks as soon as code is added
to use it.

Separate out the implementation to improve the situation enough to allow
a future patch to add new sysreset features.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-08 13:02:15 +08:00
Simon Glass
2b36eabd8a x86: broadwell: Implement PCH_REQ_PMBASE_INFO
Implement this ioctl() to support power off.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-08 13:02:15 +08:00
Simon Glass
9ffe7cd5c4 x86: ivybridge: Implement PCH_REQ_PMBASE_INFO
Implement this ioctl() to support power off.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-08 13:02:15 +08:00
Simon Glass
b69b603bcd x86: pch: Add an ioctl to read power-management info
Add a new ioctl() request to read information about the power-management
system. This can be used to power off the device.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-08 13:02:14 +08:00
Simon Glass
079b38ba04 x86: mrccache: Add more debugging
When the MRC cache fails to save it is useful to have some debugging info
to indicate what when wrong. Add some more debug() calls.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-08 13:02:14 +08:00
Simon Glass
9a67994e01 x86: Support saving MRC data from SPL
When SPL is used to set up the memory controller we want to save the MRC
data in SPL to avoid needing to pass it up to U-Boot proper to save. Add a
function to handle that.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-08 13:02:14 +08:00
Simon Glass
17903c06e8 x86: Add common Intel code for SPL
Add an implementation of arch_cpu_init_f() so that the x86 SPL code builds
and identifies the CPU.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-08 13:02:14 +08:00
Simon Glass
c0052b6efd x86: broadwell: Select refcode and CPU code for SPL
Allow broadwell to build for SPL and include the reference code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-08 13:02:14 +08:00
Simon Glass
43294e67d6 x86: broadwell: Allow booting from SPL
At present broadwell only supports booting straight into U-Boot proper.
Add a separate init file to boot from SPL into U-Boot proper, and select
it when SPL is in use.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-08 13:02:13 +08:00
Simon Glass
d68574a72d x86: Allow 16-bit init to be in TPL
At present we support having 16-bit init be in SPL or U-Boot proper, but
not TPL. Add support for this so that TPL can boot.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-08 13:02:13 +08:00
Simon Glass
051c31b7a4 x86: Add support for starting from SPL/TPL
When a previous phase of U-Boot has run we need to adjust the init of
subsequent states to avoid messing up the CPU state.

Add a new version of the start logic for SPL, when it boots from TPL
(start_from tpl.c) and a new version for U-Boot when it boots from SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-08 13:02:13 +08:00
Simon Glass
9231206b73 x86: broadwell: Split CPU init
Split the CPU init into two parts - the 'full' init which happens in the
first U-Boot phase, and the rest of the init that happens on subsequent
stages.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-08 13:02:13 +08:00
Simon Glass
6b83b29578 x86: broadwell: Move init of debug UART to cpu.c
At present the debug UART is set up in sdram.c which is not the best place
since it has nothing in particular to do with SDRAM. Since we want to
support initing this in SPL too, move it to a common file.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: added 'broadwell' tag in the commit title]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-08 13:02:12 +08:00
Simon Glass
4eabf1e54b x86: broadwell: Allow SDRAM init from SPL
At present, for broadwell, SDRAM is always set up in U-Boot proper since
the 64-bit mode (which uses SDRAM init in SPL) is not supported.

Update the code to allow SDRAM init in SPL instead so that U-Boot proper
can be loaded into SDRAM and run from there. This allows U-Boot to be
compressed to reduce space, since it is not necessary to run it directly
from flash. It could later allow us to support 64-bit U-Boot on broadwell.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-08 13:02:12 +08:00
Simon Glass
9f6486bff4 x86: broadwell: Improve SDRAM debugging output
Add debugging during SDRAM init so that problems are easier to
diagnose.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-08 13:02:12 +08:00
Simon Glass
62be5dd885 x86: Add a handoff header file
Add an arch-specific handoff header so that we can use the HANDOFF feature
on x86 devices.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-08 13:02:12 +08:00
Simon Glass
7c2ca877fe x86: Support booting with TPL
Some boards want to use TPL as the first phase of U-Boot. This allows
selection of A or B SPL phases, thus allowing the memory init to be
upgraded in the field.

Add a new Kconfig option for this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-08 13:02:12 +08:00
Simon Glass
9898790247 x86: Support SPL and TPL
At present only chromebook_link64 supports SPL. It is useful to eb able to
support both TPL and SPL to implement verified boot on x86.

Enable the options for both along with some suitable default options
needed to boot through these phases.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-08 13:02:11 +08:00
Simon Glass
20d97f33f0 x86: dts: Add device-tree labels for rtc and reset
Add labels for these nodes so that board DT files can reference them.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-08 13:02:11 +08:00
Simon Glass
c0069e9a8a x86: Add a way to reinit the cpu
We cannot init the CPU fully both than once during a boot. Add a new
function which can be called to figure out the CPU identity, but which
does not change anything. For x86_64, this is empty for now.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-08 13:02:11 +08:00
Simon Glass
7b14023880 x86: mp_init: Use proper error numbers
At present many of the functions in this file return -1 as an error
number. which is -EPERM. Update the code to use real error numbers.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-08 13:02:11 +08:00
Simon Glass
11b7cc37f1 x86: Update a stale comment about ifdtool
We use binman to build the x86 image now. Update a comment which still
refers to ifdtool.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-08 13:02:10 +08:00
Simon Glass
4a5fc6a069 x86: start64: Fix copyright message
There is a typo in this header. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-08 13:02:10 +08:00
Simon Glass
62c72995e3 Revert "pci: Scale MAX_PCI_REGIONS based on CONFIG_NR_DRAM_BANKS"
This reverts commit aec4298ccb.

Unfortunately this has a dramatic impact on the pre-relocation memory
used on x86 platforms (increasing it by 2KB) since it increases the
overhead for each PCI device from 220 bytes to 412 bytes.

The offending line is in UCLASS_DRIVER(pci):

	.per_device_auto_alloc_size = sizeof(struct pci_controller),

This means that all PCI devices have the controller struct associated
with them. The solution is to move the regions[] member out of the array,
makes its size dynamic, or split UCLASS_PCI into controllers and
non-controllers, as the comment suggests.

For now, revert the commit to get things running again.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-08 13:02:10 +08:00
Simon Glass
16f4d05164 cros_ec: Use a hyphen in the uclass name
Device-tree rules require that aliases use a hyphen rather than a
underscore. Update the uclass name to fit with this.

This allows device-tree aliases to be used to refer to cros-ec devices,
for example:

	aliases {
	    cros-ec0 = &ec;
	    cros-ec1 = &pd;
	};

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-08 12:44:07 +08:00
Simon Glass
4fc2365ccb spl: Allow sandbox to build a device-tree file
At present only OF_SEPARATE is considered valid for building a device-tree
file in SPL. However sandbox uses OF_HOSTFILE instead. Update the logic to
handle this and make it easier to understand.

Note that the new logic is not quite the same as the old logic. It was
previously assumed that checking for:

   $(CONFIG_$(SPL_TPL_)OF_CONTROL)
   $(CONFIG_OF_SEPARATE)
   $(CONFIG_$(SPL_TPL_)OF_PLATDATA)

producing 'yy' meant that the first two were 'y' and the last was empty.
Strictly speaking it would be possible for any two of the three to be 'y'
and still yield the same result. However, that was not the intention of
the new logic, since OF_PLATDATA always ensures that no device-tree file
is included. So in effect the new logic is the same, with the addition of
OF_HOSTFILE as an option for OP_SEPARATE.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-08 12:44:07 +08:00
Simon Glass
003331827a dm: core: Fix translate condition in ofnode_get_addr_size()
Update the condition to translate only if this is enabled for SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-08 12:44:07 +08:00
Simon Glass
9481c80f55 binman: Allow sections to have an offset
At present sections are always placed automatically. Even if an 'offset'
property is provided it is ignored. Update the logic to support an offset
for sections.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-08 12:44:07 +08:00
Simon Glass
0b96f6ecbe binman: Add a missing comment in Entry_vblock
An important property is missing. Update the entry comment to include
this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-08 12:44:07 +08:00
Simon Glass
eb833d871d binman: Don't show image-skip message by default
This message is not very important since it is simply indicating that the
user's instructions are being followed. Only show it when the verbosity
level is above the default.

Also drop the unnecessary extra newline on this message, which causes two
line breaks.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-08 12:44:07 +08:00
Simon Glass
5203258c6e binman: Don't generate an error in 'text' entry constructor
It is not good practice to raise an exception in a constructor. In this
case the 'text' entry may not actually be used, if -i is used to filter
out the images that get built.

Move the exception to where the data is actually used.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-05-08 12:44:07 +08:00
Carlo Caione
d47cfdbd31 net: phy: realtek: Introduce quirk to mark RXC not stoppable
When EEE is supported by the PHY and the driver allows it, libphy in the
kernel is configuring the PHY to stop receiving the xMII clock while it
is signaling LPI. While this (usually) works fine in the kernel this is
causing issues in U-Boot when rebooting from the linux kernel with this
bit set (without having the possibility to reset the PHY) where the PHY
suddenly stops working.

A new quirk is introduced to unconditionally reset this bit. If the
quirk is not enabled using the proper configuration symbol, the PHY state
is not changed.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-05-07 14:51:55 -05:00
Carlo Caione
e55047ec51 cmd: mdio: Switch to generic helpers when accessing the registers
Switch to use the generic helpers to access the MMD registers so that we
can used the same command also for C45 PHYs, C22 PHYs with direct and
indirect access and PHYs implementing a custom way to access the
registers.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-05-07 14:51:55 -05:00
Carlo Caione
4c29dc1863 net: phy: ti: use generic helpers to access MMD registers
Now that generic helpers are available, use those instead of relying on
ti specific functions.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-05-07 14:51:55 -05:00
Carlo Caione
4f6746dc7f net: phy: Add generic helpers to access MMD PHY registers
Two new helper functions (phy_read_mmd() and phy_write_mmd()) are added
to allow access to the MMD PHY registers.

The MMD PHY registers can be accessed by several means:

1. Using two new MMD access function hooks in the PHY driver. These
functions can be implemented when the PHY driver does not support the
standard IEEE Compatible clause 45 access mechanism described in clause
22 or if the PHY uses its own non-standard access mechanism.

2. Direct access for C45 PHYs and C22 PHYs when accessing the reachable
DEVADs.

3. The standard clause 45 access extensions to the MMD registers through
the indirection registers (clause 22) in all the other cases.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-05-07 14:51:55 -05:00
Heinrich Schuchardt
b015ab57bf efi_loader: signature of ExitBootServices()
Consistently use efi_uintn_t as type of memory keys.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Alexander Graf <graf@amazon.com>
2019-05-07 21:10:04 +02:00
Heinrich Schuchardt
470dfa50da efi_loader: LoadImage() check source size
If the size of the source buffer is 0, return EFI_LOAD_ERROR.
(UEFI SCT II 2017: 3.4.1 LoadImage() - 5.1.4.1.6)

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-05-07 21:10:04 +02:00
Heinrich Schuchardt
84a918e8ce efi_loader: LoadImage() check parent image
If the parent image handle does not refer to a loaded image return
EFI_INVALID_PARAMETER.
(UEFI SCT II 2017: 3.4.1 LoadImage() - 5.1.4.1.1)

Mark our root node as a loaded image to avoid an error when using it as
parent image.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-05-07 21:10:04 +02:00
Heinrich Schuchardt
e7c3cd6b67 efi_loader: HandleProtocol parameter checks
HandleProtocol() and OpenProtocol() have to return EFI_UNSUPPORTED if the
protocol is not installed on the handle.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-05-07 21:10:04 +02:00
Heinrich Schuchardt
529886a097 efi_loader: use EFI_PRINT instead of debug
For correct indentation of messages in the UEFI API implementation use
EFI_PRINT() instead of debug().

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-05-07 21:10:04 +02:00
Heinrich Schuchardt
ec163faa1b efi_loader: CloseProtocol() requires valid agent handle
Return EFI_INVALID_PARAMETER from CloseProtcol() if the agent handle is not
valid.

Return EFI_INVALID_PARAMETER if the optional controller handle is not
valid.

Return immediately from efi_search_obj if the handle is NULL.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-05-07 21:10:04 +02:00
Heinrich Schuchardt
24f6be7ada efi_selftest: unit test for RegisterProtocolNotify()
Provide a unit test for the RegisterProtocolNotify() boot service.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-05-07 21:10:04 +02:00
Heinrich Schuchardt
ab15d4149e efi_loader: implement RegisterProtocolNotify()
The RegisterProtocolNotify() boot service registers an event to be
notified upon the installation of a protocol interface with the
specified GUID.

Add the missing implementation.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-05-07 21:10:04 +02:00
Heinrich Schuchardt
3626e53990 efi_loader: EVT_NOTIFY_SIGNAL events
The notification function of events of type EVT_NOTIFY_SIGNAL should always
be queued when SignalEvent() is called.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-05-07 21:10:04 +02:00