Commit graph

203 commits

Author SHA1 Message Date
Tom Rini
bc0b99bd8b Xilinx changes for v2021.04
arm64:
 - DT updates
 
 microblaze:
 - Add support for NOR device support
 
 spi:
 - Fix unaligned data write issue
 
 nand:
 - Minor code change
 
 xilinx:
 - Fru fix in limit calculation
 - Fill git repo link for all Xilinx boards
 
 video:
 - Add support for seps525 spi display
 
 tools:
 - Minor Vitis file support
 
 cmd/common
 - Minor code indentation fixes
 
 serial:
 - Uartlite debug uart initialization fix
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Merge tag 'xilinx-for-v2021.04' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into next

Xilinx changes for v2021.04

arm64:
- DT updates

microblaze:
- Add support for NOR device support

spi:
- Fix unaligned data write issue

nand:
- Minor code change

xilinx:
- Fru fix in limit calculation
- Fill git repo link for all Xilinx boards

video:
- Add support for seps525 spi display

tools:
- Minor Vitis file support

cmd/common
- Minor code indentation fixes

serial:
- Uartlite debug uart initialization fix
2021-01-06 07:57:33 -05:00
Michal Simek
0109db1cd1 xilinx: Fill git repository for Xilinx boards
All Xilinx SoCs have repository location filled already but boards are
covered by different fragment which is missing this link.
The patch is extending description with adding proper link to the same
repository.

Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-01-05 11:54:53 +01:00
Simon Glass
8b85dfc675 dm: Avoid accessing seq directly
At present various drivers etc. access the device's 'seq' member directly.
This makes it harder to change the meaning of that member. Change access
to go through a function instead.

The drivers/i2c/lpc32xx_i2c.c file is left unchanged for now.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-18 20:32:21 -07:00
Ashok Reddy Soma
728d21b8c7 mmc: zynq_sdhci: Add common function to set input/output tapdelays
Remove setting tapdelays for different speeds separately. Instead use
the ITAP and OTAP delay values which are read from the device tree.
If the DT does not contain tap delay values, the predefined values
will be used for the same.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-10-29 08:55:43 +01:00
Ashok Reddy Soma
17a42abb40 mmc: Define timing macro's
Define timing macro's for all the available speeds of mmc. This is
done similar to linux. Replace speed macro's used with these new timing
macro's wherever applicable.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-10-27 08:13:33 +01:00
Michal Simek
2fbdbee732 xilinx: zynqmp: Use tab for macro indentation
Trivial fix.

Fixes: fa793165da ("xilinx: zynqmp: refactor silicon name function")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27 08:13:33 +01:00
Michal Simek
07499daf50 xilinx: zynqmp: Do not check 0 as invalid return from snprintf
U-Boot SPL on ZynqMP is using CONFIG_SPL_USE_TINY_PRINTF which doesn't
return any return value and all the time returns 0. That's why
even correct snprintf was returning in SPL chip ID as "unknown".
Change checking condition and allow snprintf to return 0 which is according
manual patch successful return.
"If an output error is encountered, a negative value is returned."

Fixes: 43a138956f7e ("arm64: zynqmp: Get rid of simple_itoa and replace it by snprintf")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27 08:13:33 +01:00
Michal Simek
16df2f1edb xilinx: zynqmp: Fix debug message in zynqmp_get_silicon_idcode_name()
Fix hex format from 0x%0X to 0x%0x to show correct numbers.

Fixes: fa793165da ("xilinx: zynqmp: refactor silicon name function")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27 08:13:33 +01:00
Michal Simek
d026aa1de3 xilinx: zynqmp: Check return value from xilinx_pm_request()
xilinx_pm_request() can failed that's why also check return value.

Fixes: 050f10f103 ("xilinx: zynqmp: remove chip_id function")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27 08:13:32 +01:00
Siva Durga Prasad Paladugu
f1b97b5f18 xilinx: cmd: Add support for FRU commands
This patch adds support for fru commands "fru capture" and "fru display".
The fru capture parses the FRU table present at an address and stores in a
structure for later use. The fru display prints the content of captured
structured in a readable format.

As of now, it supports only common header and board area of FRU. Also, it
supports only English language code and ASCII8/BINARY formats.

fru_data variable is placed to data section because fru parser can be
called very early before bss is initialized. And also information needs to
be shared that's why it is exported via header.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27 08:13:32 +01:00
Michal Simek
3e315f31cc xilinx: common: Add Makefile to common folder
There is no need to reference files in common folder back. Simply adding
Makefile to this folder does the job because this "common" location is
already wired in main Makefile.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27 08:13:32 +01:00
Michal Simek
d61728c8e8 xilinx: board: Read the whole eeprom not just offset
Starts to use new way how eeproms should be referenced.
Reference is done via nvmem alias nodes. When this new way is specified
code itself read the eeprom and decode xilinx legacy format and fill struct
xilinx_board_description. Then based on information present there board_*
variables are setup.
If variables are saved and content can't be changed information is just
shown on console.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27 08:13:32 +01:00
Michal Simek
768622b1d7 arm64: zynqmp: Add support for saving sha3 key to different address
By default 48B sha3 hash value is written to srcaddr which is not the best
solution in case of that you want to use data for other operations. That's
why add key_addr optional parameters which enables to write 48B sha3 hash
value to specified address.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Tested-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
2020-10-27 08:13:32 +01:00
T Karthik Reddy
0af9de9a90 arm64: zynqmp: Add support for SHA3 command
This patch adds support for SHA3 command. It takes data blob
as input and generates 48 bytes sha3 hash value.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27 08:13:31 +01:00
T Karthik Reddy
650d02ae77 arm64: zynqmp: Add support for RSA command
This patch adds support for RSA command, performs RSA encrypt &
RSA decrypt on data blob of key size.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27 08:13:31 +01:00
Siva Durga Prasad Paladugu
8e4e914652 arm64: zynqmp: Add support for encryption and decryption on data blob
This patch adds support for encryption and decryption on a given data
blob using different key sources such as userkey(KUP), device key and
PUF key. Inorder to support this a new zynqmp command(zynqmp aes) has
been introduced.

Command:
zynqmp aes srcaddr ivaddr len aesop keysrc dstaddr [keyaddr]\n"
	Encrypts or decrypts blob of data at src address and puts it\n"
	back to dstaddr using key and iv at keyaddr and ivaddr\n"
	respectively. keysrc values specifies from which source key\n"
	has to be used, it can be User/Device/PUF key. A value of 0\n"
	for KUP(user key),1 for DeviceKey and 2 for PUF key. The\n"
	aesop value would specify the operationwhich can be 0 for\n"
	decrypt and 1 for encrypt(1) operation\n";

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27 08:13:31 +01:00
Michal Simek
0d76b71d93 arm64: zynqmp: Get rid of simple_itoa and replace it by snprintf
simple_itoa() is implemented only for !CONFIG_USE_TINY_PRINTF. Tiny printf
is normally used by SPL that's code which uses simple_itoa() has missing
reference. That's why refactor code by using on snprintf() instead of
strncpy()/strncat() combination. This change also descrease code size by
saving 24B based on buildman.

aarch64: (for 1/1 boards) all -22.0 rodata +2.0 text -24.0
         xilinx_zynqmp_virt: all -22 rodata +2 text -24
            u-boot: add: 0/0, grow: 0/-1 bytes: 0/-24 (-24)
              function                                   old     new   delta
              board_init                                 520     496     -24

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27 08:13:31 +01:00
Michal Simek
bbe086a950 arm64: zynqmp: Add missing support for 9cg version
9cg version was supported before code refactoring. The patch is adding it
back.

Fixes: fa793165da ("xilinx: zynqmp: refactor silicon name function")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27 08:01:36 +01:00
Tom Rini
67ece26d8b Xilinx changes for v2021.01
arm64:
 - Support for bigger U-Boot images compiled with PIE
 
 microblaze:
 - Extend support for LE/BE systems
 
 zynqmp:
 - Refactor silicon ID detection code with using firmware interface
 - Add support for saving variables based on bootmode
 
 zynqmp-r5:
 - Fix MPU mapping and defconfig setting.
 
 xilinx:
 - Minor driver changes: names alignment
 - Enable UBIFS
 - Minor DT and macros fixes
 - Fix boot with appended DT
 - Fix distro boot
 
 cmd:
 - pxe: Add fixing for platforms with manual relocation support
 
 clk:
 - fixed_rate: Add DM flag to support early boot on r5
 
 fpga:
 - zynqmppl: Use only firmware interface and enable SPL build
 
 serial:
 - uartlite: Enable for ARM systems and support endians
 
 mmc:
 - zynq: Fix indentation
 
 net:
 - gem: Support for multiple phys
 - emac: Fix 64bit support and enable it for arm64
 
 kconfig:
 - Setup default values for Xilinx platforms
 - Fix dependecies for Xilinx drivers
 - Source board Kconfig only when platform is enabled
 - Fix FPGA Kconfig entry with SPL
 - Change some defconfig values
 
 bindings:
 - Add binding doc for vsc8531
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Merge tag 'xilinx-for-v2021.01' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into next

Xilinx changes for v2021.01

arm64:
- Support for bigger U-Boot images compiled with PIE

microblaze:
- Extend support for LE/BE systems

zynqmp:
- Refactor silicon ID detection code with using firmware interface
- Add support for saving variables based on bootmode

zynqmp-r5:
- Fix MPU mapping and defconfig setting.

xilinx:
- Minor driver changes: names alignment
- Enable UBIFS
- Minor DT and macros fixes
- Fix boot with appended DT
- Fix distro boot

cmd:
- pxe: Add fixing for platforms with manual relocation support

clk:
- fixed_rate: Add DM flag to support early boot on r5

fpga:
- zynqmppl: Use only firmware interface and enable SPL build

serial:
- uartlite: Enable for ARM systems and support endians

mmc:
- zynq: Fix indentation

net:
- gem: Support for multiple phys
- emac: Fix 64bit support and enable it for arm64

kconfig:
- Setup default values for Xilinx platforms
- Fix dependecies for Xilinx drivers
- Source board Kconfig only when platform is enabled
- Fix FPGA Kconfig entry with SPL
- Change some defconfig values

bindings:
- Add binding doc for vsc8531
2020-09-24 08:33:47 -04:00
Michal Simek
29bd8ada52 fpga: kconfig: Rename SPL_FPGA_SUPPORT to SPL_FPGA
The patch does sed 's/SPL_FPGA_SUPPORT/SPL_FPGA/g' but also fixing Makefile
and zynqmp.c to simplify if/endif logic in zynqmp.c.

This change is mostly done to be able to use CONFIG_IS_ENABLED macro and
obj-$(CONFIG_$(SPL_)FPGA) in Makefile. For them symbols need to be in sync.

And removing one line from Topic Miami boards which is not needed because
symbol is not enabled via Kconfig.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-09-23 10:31:41 +02:00
Michal Simek
1025bd098a xilinx: zynqmp: Add support for saving variables
Enabling saving variables to MMC(FAT), NAND, SPI based on primary bootmode.
Maybe that logic can be tuned for more complicated use cases and better
tested for different bootmodes.

Tested on zcu104 to SD(FAT) and JTAG(NOWHERE).

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-09-23 10:31:40 +02:00
Michal Simek
4d9bc795ae xilinx: zynqmp: Get zynqmp_get_bootmode() out of CONFIG_BOARD_LATE_INIT
This function will be also used by different code.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-09-23 10:31:40 +02:00
Michal Simek
ced4d46626 xilinx: zynqmp: Remove one static variable
There is no reason to have name variable saved in BSS section when it
doesn't need to be really used. That's why remove static from variable
definition and use strdup() to duplicate string with exact size from malloc
area instead.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-09-23 10:31:40 +02:00
Michal Simek
e17c5ec8e1 xilinx: zynqmp: Add missing 43/46/47dr ID codes
Add support for 43/46/47dr devices.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-09-23 10:31:40 +02:00
Ibai Erkiaga
fa793165da xilinx: zynqmp: refactor silicon name function
Current algorithm used to get the silicon name is bit complicated and
hard to follow. Updated to use more straightforward mechanism based on
the Device ID code table (Table 1-2). The full IDCODE register is used
(except device revision bits [31:28]) to get the device name and IDCODE2
value is used for identifying the variant.

Additionally to make the algorithm bit more clear it also save some space
as the devices table is slightly bit smaller.

Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-09-23 10:31:40 +02:00
Stefan Roese
dfaf6a5797 CONFIG_NR_DRAM_BANKS: Remove unreferenced code as its always defined
Since commit 86cf1c8285 ("configs: Migrate CONFIG_NR_DRAM_BANKS") &
commit 999a772d9f ("Kconfig: Migrate CONFIG_NR_DRAM_BANKS"),
CONFIG_NR_DRAM_BANKS is always defined with a value (4 is default).
It makes no sense to still carry code that is guarded with
"#ifndef CONFIG_NR_DRAM_BANKS" (and similar). This patch removes
all these unreferenced code paths.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-08-26 09:19:16 +02:00
Michal Simek
62b96262b6 xilinx: Add support for ENV_VARS_UBOOT_RUNTIME_CONFIG
Start to use ENV_VARS_UBOOT_RUNTIME_CONFIG to enable/disable updating
variables with run time information.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:49:20 +02:00
Ibai Erkiaga
050f10f103 xilinx: zynqmp: remove chip_id function
Remove chip_id function and integrate the firmware call in the
zynqmp_get_silicon_idcode_name function. The change avoids querying the
firmware twice and makes the code bit more clear.

Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:49:20 +02:00
Ibai Erkiaga
4b2ad7b111 xilinx: zynqmp: get chip ID at EL3
Modify the board init function to allow getting the chip ID when U-Boot
proper is executed at EL3.

Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:49:20 +02:00
Ibai Erkiaga
21c2fc7c6a xilinx: zynqmp: get chip ID using firmware driver
Current implementation for getting chip ID uses either raw access on EL3
or a SMC call to get the silicon information. Following change
simplifies the code using always the firmware driver.

Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:49:20 +02:00
Igor Lantsman
1b208d59ba arm64: zynqmp: Fix set_fdtfile() not to break u-boots DTB
Origin function was calling strsep which replaced delimiter ',' by a null
byte ('\0'). Operation was done directly on FDT which ends up with the
following behavior:

ZynqMP>  printenv fdtfile
fdtfile=xilinx/zynqmp.dtb
ZynqMP> fdt addr $fdtcontroladdr
ZynqMP> fdt print / compatible
compatible = "xlnx", "zynqmp"

As is visible fdtfile was correctly composed but a null byte caused that
xlnx was separated from zynqmp.
This hasn't been spotted because in all Xilinx DTs there are at least 3
compatible string and only the first one was affected by this issue.
But for systems which only had one compatible string "xlnx,zynqmp" it was
causing an issue when U-Boot's DT was used by Linux kernel.

The patch removes strsep calling and strchr is called instead which just
locate the first char after deliminator ',' (variable called "name").
And using this pointer in fdtfile composing.

Fixes: 91d7e0c47f ("arm64: zynqmp: Create fdtfile from compatible string")
Reported-by: Igor Lantsman <igor.lantsman@opsys-tech.com>
Signed-off-by: Igor Lantsman <igor.lantsman@opsys-tech.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-08-20 09:49:20 +02:00
Michal Simek
e20d88bffa xilinx: zynqmp: Enable pmufw config reloading
PMU FW has functionality to accept and reload configuration object at run
time. The patch is adding support for doing it via u-boot prompt.

For example:
tftpboot 100000 pmu_obj.bin
zynqmp pmufw 100000 $filesize

The most of pmufw configurations don't allow config reloading.
Also official Xilinx PMUFW doens't support this feature properly but the
patch should open a way to call PMUFW with this request.

Here is example of PMUFW config fragment which enables config reloading.

/* SET CONFIG SECTION */
PM_CONFIG_SET_CONFIG_SECTION_ID,        /* Section ID */
PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK |
PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* Permissions to set config */

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-25 10:08:04 +02:00
Michal Simek
3ccea69fc4 arm64: zynqmp: Print multiboot reg in decimal
It is better to print multiboot value in decimal because boot images are
also composed in decimal not in hex.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-25 10:08:04 +02:00
Mike Looijmans
39c5cf0e70 topic: zynqmp: Add support for zynqmp-xilinx-xdp platform
XDP - Xilinx Drone Platform is a board for drones or other UAV.

Pinmux the SD card by default, and if the SD card detect line is high
(inactive) then pinmux the SD1 interface to EMIO instead. SD is placed on
extension card and shares connection with on board wife. That means that
when SD card is present in the board wifi can't be used.

There seems to be an issue with DDR access from PL at 2400MT/s, after
updating the PMU and ATF firmware this is causing extremely slow DDR
access. Reducing the DDR speed from 2400 to 2133 appears to solve that
issue, even though the hardware has proven to be 2400 capable.

Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:11:08 +02:00
Mike Looijmans
dfbe492ede board: zynqmp: Fix for wrong AMS setting by ROM
A bug in the ZynqMP bootrom sets the PS_SYSMON_ANALOG_BUS register
at 0xFFA50914 to the wrong value 0x3201. This causes the AMS to
exchange the PS supply voltages 0 and 1. On Xilinx boards this is
not noticeable since these are tied together, it's only really
noticeable if banks 500 and 501 have different supplies. Xilinx' tech
support reported this undocumented register to be the cause, and
this patch applies a fix for all boards by programming the correct
value.

Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-06-24 13:11:08 +02:00
Simon Glass
cd93d625fd common: Drop linux/bitops.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:23 -04:00
Simon Glass
c05ed00afb common: Drop linux/delay.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:23 -04:00
Simon Glass
25a5818ff8 common: Drop asm/ptrace.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:23 -04:00
Simon Glass
f7ae49fc4f common: Drop log.h from common header
Move this header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:18 -04:00
Simon Glass
0914011310 command: Remove the cmd_tbl_t typedef
We should not use typedefs in U-Boot. They cannot be used as forward
declarations which means that header files must include the full header to
access them.

Drop the typedef and rename the struct to remove the _s suffix which is
now not useful.

This requires quite a few header-file additions.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 18:36:55 -04:00
Simon Glass
90526e9fba common: Drop net.h from common header
Move this header out of the common header. Network support is used in
quite a few places but it still does not warrant blanket inclusion.

Note that this net.h header itself has quite a lot in it. It could be
split into the driver-mode support, functions, structures, checksumming,
etc.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 17:33:31 -04:00
Michal Simek
51f6c52e6b xilinx: Move bootmode detection to separate function
Create special function for reading bootmode on Versal and ZynqMP.
Zynq is using specific function (without mask) already.
Future patches will be calling this function from different location too.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-27 13:57:18 +02:00
Michal Simek
a29511eeca xilinx: Move initrd_high setup to common location
Moving to common location initrd_high is also setup for Zynq which hasn't
done in run time code.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-27 13:57:18 +02:00
Michal Simek
dec206a09b xilinx: zynqmp: Fix MIO 18 configuration on zcu104 revC
Without this change QSPI is not detected on zcu104 revC.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-27 13:57:17 +02:00
Michal Simek
80fdef12b2 xilinx: Introduce board_late_init_xilinx()
This function should keep common shared late configurations for Xilinx
SoCs.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-27 13:57:17 +02:00
Michal Simek
3d03752475 arm64: zynqmp: Reorder parameters for zynqmp_mmio_write()
Parameter order is not correct based on zynqmp_mmio_write() declaration.

Fixes: be52372ff1 ("arm64: zynqmp: Use zynqmp_mmio_read/write functions")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:52:45 +02:00
Michal Simek
f8451f144e arm64: zynqmp: Move timeout for clock propagation below psu_init
Delay required for clock propagation is tighly coupled with initialization
done in psu_init(). That's why call it also for u-boot proper with
CONFIG_ZYNQMP_PSU_INIT_ENABLED enabled.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:52:45 +02:00
Michal Simek
c0adba5721 arm64: zynqmp: Add support for debug uart also for U-Boot proper
board_early_init_f() is the right location where debug uart can be
configurated (after MIO initialization).
The patch is taking this call from SPL to also make it available for U-Boot
proper.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:52:45 +02:00
Michal Simek
387121c173 arm64: zynqmp Add support for zcu111 revA
Add low level configuration for zcu111 for easier SPL run.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:52:45 +02:00
Michal Simek
47cc45a91c arm64: zynqmp Add support for zcu102 rev1.1
rev1.1 has different DDR sodimm module that's why it requires different DDR
configuration.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:52:45 +02:00