Commit graph

21638 commits

Author SHA1 Message Date
Tom Rini
59c51fa4ab Merge https://source.denx.de/u-boot/custodians/u-boot-riscv 2022-09-06 09:01:39 -04:00
Tom Rini
166d2693dd Merge tag 'fsl-qoriq-2022-9-6' of https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq
Reset fixes for p1_p2_rdb_pc
Fix use after free issue fix in fsl_enetc.c
Fix for fsl ddr: make bank_addr_bits reflect actual bits
sl28 board update
2022-09-06 08:59:51 -04:00
Heinrich Schuchardt
4a98207b23 RISC-V: enable CONFIG_SYSRESET_SBI by default
System reset via the SRST extension in the SBI should be the default.
The driver checks if the extension is available when probing.
So there is no risk in enabling it.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2022-09-06 13:00:58 +08:00
Icenowy Zheng
d13cd77068 dt-bindings: clock: sifive: sync FU740 PRCI clock binding header
This commit sychronizes the header file for FU740 PRCI clocks with the
one from Linux 5.19.

The constant values are the same, but all constant names are changed
(most are just prefixed with FU740_).

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2022-09-06 13:00:15 +08:00
Siarhei Yasinski
5025224fad net: enetc: Fix use after free issue in fsl_enetc.c
If ethernet connected to SFP, like this:

&enetc_port0 {
            phy-connection-type = "sgmii";
            sfp = <&sfp0>;
            managed = "in-band-status";
            status = "okay";
};

Then enetc_config_phy returns -ENODEV and the memory containing the mdio interface is freed.
It's better to unregister and free mdio resources.

Signed-off-by: Siarhei Yasinski <siarhei.yasinski@sintecs.eu>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-09-06 09:28:47 +08:00
Sean Anderson
6f6fbb334c ddr: fsl: Make bank_addr_bits reflect actual bits
In both the Freescale DDR controller and the SPD spec, bank address bits
are stored as the number of bank address bits minus 2. For example, if a
chip had 8 banks (3 total bank address bits), the value of
bank_addr_bits would be 1. This is rather surprising for users
configuring their memory manually, since they can't set bank_addr_bits
to the actual number of bank address bits. Rectify this.

There is at least one example of this kind of mistake already, in
board/freescale/t102xrdb/ddr.c. The documented MT40A512M8HX has two bank
address bits, but bank_addr_bits was set to 2, implying 4 bank address
bits. Such a value is reserved in BA_BITS_CS, but I suspect the
controller simply ignores the top bit, making this kind of mistake
harmless, if misleading.

Fixes: e8a7f1c32b ("powerpc/t1023rdb: Add T1023 RDB board support")
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-09-06 09:28:46 +08:00
Sean Anderson
96624d7b47 ddr: fsl: Reduce the size of interactive options
The interactive mode uses large several tables of options which can be
configured. However, much of the contents of these tables are
repetetive. For example, no struct is larger than half a kilobyte, so
the offset only takes up 9 bits. Similarly, the size is only ever 4 or
8, and printhex is a boolean. Reduce the size of these fields. This
reduces the size of the options tables by around 10 KiB. However, the
largest contributor to the size of the options tables is the use of a
pointer for the strings. A better approach would be to use a separate
array of strings, and store an integer index in the options tables.
However, this would require a large re-architecting of this file.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-09-06 09:28:45 +08:00
Tom Rini
05f135ab3e Merge tag 'u-boot-rockchip-20220905' of https://source.denx.de/u-boot/custodians/u-boot-rockchip
- migrate to use binman for U-Boot image generate on rockchip platform;
- Some fixes for rk3399 and rk3308;
2022-09-04 22:35:40 -04:00
Michal Suchanek
f103c11266 clk: rockchip: rk3399: Fix Unknown clock 77 on mmc@fe310000
Adding some debug prints I can see:

MMC:   mmc@fe320000: Got clock clock-controller@ff760000 76
mmc@fe310000: Got clock clock-controller@ff760000 77
Unknown clock 77
rockchip_dwmmc_get_mmc_clk: err=-2
mmc@fe310000: 3, mmc@fe320000: 1, mmc@fe330000: 0

According to kernel code the SDIO clock is identical to SDMMC clock
except for the con 16->15 change.

Add support for the clock to avoid the error.

Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-09-04 20:00:39 +08:00
Lee Jones
337e92e79c ram: rk3399: Conduct memory training at 400MHz
Currently the default initialisation frequency is 50MHz.  Although
this does appear to be suitable for some LPDDR4 RAM chips, training at
this low frequency has been seen to cause Column errors, leading to
Capacity check errors on others.

Here we force RAM initialisation to happen at 400MHz before ramping up
to the final value running value of 800MHz after everything has been
successfully configured.

Link: https://lore.kernel.org/u-boot/Yo4v3jUeHXTovjOH@google.com/
Suggested-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Lee Jones <lee@kernel.org>
Tested-by: Xavier Drudis Ferran <xdrudis@tinet.cat>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Michal Suchánek <msuchanek@suse.de>
2022-09-04 20:00:38 +08:00
Lee Jones
daef678cff ram: rk3399: Fix faulty frequency change reports
Frequency changes to 400MHz are presently reported as:

  lpddr4_set_rate_0: change freq to 400000000 mhz 0, 1

This is obviously wrong by 6 orders of magnitude.

Ensure frequency changes are reported accurately.

Signed-off-by: Lee Jones <lee@kernel.org>
Tested-by: Xavier Drudis Ferran <xdrudis@tinet.cat>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-09-04 20:00:38 +08:00
Lee Jones
7b561e2ab8 ram: rk3399: Fix .set_rate_index() error handling
Functions pointed to by this op pointer can return non-zero values
indicating an error.  Ensure any error value is propagated back up the
call-chain.

Signed-off-by: Lee Jones <lee@kernel.org>
Tested-by: Xavier Drudis Ferran <xdrudis@tinet.cat>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-09-04 20:00:38 +08:00
Han Pengfei
fc1526f651 drivers: ram: rockchip: Fix dram channels calculation for rk3399
Only add the dram channel when we finally setup it successfully at the
last step.

Signed-off-by: Han Pengfei <pengphei@foxmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-09-04 20:00:38 +08:00
Tom Rini
427aa3c9b7 TPM fixes and state reporting
-----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEgWII69YpahbL5iK5gS8AYozs+qIFAmMTcr0ACgkQgS8AYozs
 +qJXaA/8DeQlC30LtlYGiZ567Xp5QST+z8sqHblfHGSCVwzHwq7Sgbs6lqw39eF0
 caiaQfUx2fhT668tB1cR0d3vw3Mz/yrLm4Fj4Rozr4d9EEB4LFJ162OVlnDUHP2t
 +x6dJfKrOe/yXzjHu33OCoggWkZSA4t14ZCqLIqnFRQBhc0IaxHY8llx3FWFhT21
 lwx2zEbOQ+hYAQ8T925RWUdwHPj2zkR0dl06GyLAzak7RiWRJxUieV2Cn925sr0b
 VOAqugzCp+W+or+z1zHK7VHbbB9HVueN5KbvhyK8kHOKu+afgp9eGZIxlxhrgqol
 5zi9FuJkeUZBNzXJzwH5JpwaRIGiCtr5+3wOgTlIzMAsaaSOyTkoh+5UpijaGnmC
 RBwSVMAqQTOqVLLWuJxEl/qIulWGjsBQU0qst1NrH2zSXbALOz+U/VkdrFouBp4u
 /Go7ttyq6HxgJSs8evy7iH27at5U+m5MM/s+n08Vs5eEMwF+YFZs1cjGEmMgA+zb
 JrwLFjOr1lOiWM8W+jYJ7gdZuCjB4A1q6/wmeHB9t9ii2N4IlY0sxwf3MWczUQCj
 0i0M7zBJlRVdM5xQu2KkE1u7JM+fcRl2XpZ3/RWgMfIJz+zDiCKtWicUm1M33IKZ
 IxovEs/QjDV5411d8dDYUVG+/GoodV2x6lO0lmxny+iM5uAZ8Ho=
 =c18c
 -----END PGP SIGNATURE-----

Merge tag 'tpm-03092022' of https://source.denx.de/u-boot/custodians/u-boot-tpm

TPM fixes and state reporting
2022-09-03 14:55:37 -04:00
Tom Rini
bc5d11316b Merge https://source.denx.de/u-boot/custodians/u-boot-sh 2022-09-03 14:55:24 -04:00
Simon Glass
4c57ec76b7 tpm: Implement state command for Cr50
Add a vendor-specific TPM2 command for this and implement it for Cr50.
Note: This is not part of the TPM spec, but is a Cr50 extension.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2022-09-03 16:59:05 +03:00
Simon Glass
3bb4db4c38 tpm: Allow reporting the internal state
It is useful to read information about the current TPM state, where
supported, e.g. for debugging purposes when verified boot fails.

Add support for this to the TPM interface as well as Cr50. Add a simple
sandbox test.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2022-09-03 16:59:05 +03:00
Simon Glass
6694c997b2 tpm: sandbox: Allow init of TPM in a different phase
At present the emulator assumes that the TPM is inited in the same phase
where it is used. But in fact SPL may init the TPM, so we don't want to
complain when U-Boot proper later uses it. Remove this check.

It might be best to save this information into the device state for the
TPM, so that we can make sure the TPM was inited at some point. For now,
this seems good enough.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2022-09-03 16:58:56 +03:00
qianfan Zhao
2522bd3ea6 drivers: usb: fastboot: Fix full-speed usb descriptor
The host will report such error message if the fastboot device work in
full-speed mode: "Duplicate descriptor for config 1 interface 0
altsetting 0, skipping"

Fastboot device ack both full and high speed interface descriptors when
work in full-speed mode, that's will cause this issue.

Fix it.

Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
Reviewed-by: John Keeping <john@metanate.com>
2022-09-02 13:26:58 +02:00
Geert Uytterhoeven
68083b897b renesas: Fix RPC-IF compatible values
The compatible values used for device nodes representing Renesas Reduced
Pin Count Interfaces were based on preliminary versions of the Device
Tree Bindings.

Correct them in both DTSi files and drivers, to match the final DT
Bindings.

Note that there are no DT bindings for RPC-IF on RZ/A1 yet, hence the
most logical SoC-specific value is used, without specifying a
family-specific value.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-09-02 13:25:01 +02:00
Oleksandr Suvorov
6eea9408ac spl: ahci: Fix dependency for SPL_AHCI_PCI
The option SPL_SATA_SUPPORT is renamed to SPL_SATA. Fix the option
name.

Fixes: 73059529b2 ("ata: ahci-pci: Add new option CONFIG_SPL_AHCI_PCI")
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Acked-by: Pali Rohár <pali@kernel.org>
2022-08-31 12:16:01 -04:00
Hector Martin
e9ac3a939d nvme: Do a clean NVMe shutdown
The brute-force controller disable method can end up racing controller
initialization and causing a crash when we shut down Apple ANS2 NVMe
controllers. Do a proper controlled shutdown, which does block until
things are quiesced properly. This is nicer in general for all
controllers.

Signed-off-by: Hector Martin <marcan@marcan.st>
Tested-by: Mark Kettenis <kettenis@openbsd.org> (firefly-rk3399)
2022-08-26 15:00:05 -04:00
Pali Rohár
d9f554b624 pci: Add checks to prevent config space overflow
PCIe config space has address range 0-4095. So do not allow reading from
addresses outside of this range. Lot of U-Boot drivers do not expect that
passed value is not in this range. PCI DM read function is extended to
fill read value to all ones or zeros when it fails as U-Boot callers
ignores return value.

Calling U-Boot command 'pci display.b 0.0.0 0 0x2000' now stops printing
config space at the end (before 0x1000 address).

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-26 14:59:21 -04:00
Michael Walle
1b34339c50 button: gpio: add DM_GPIO dependency
The gpio-button driver depends on DM_GPIO, add it to Kconfig to avoid
build errors.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-23 12:39:06 +02:00
Michael Walle
e9e73d78a8 timer: add orion-timer support
Add timer support for Kirkwood and MVEBU devices.

Cc: Pali Rohár <pali@kernel.org>
Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-23 12:39:00 +02:00
Holger Brunck
845102cbe9 powerpc: remove support for kmtergr1 and MPC8309
The kmtegr1 board is out of maintenance and can be removed. As it is the
only board in the tree using MPC8309 the support for this CPU is dropped
completely.

Signed-off-by: Holger Brunck <holger.brunck@hitachienergy.com>
2022-08-20 22:45:00 -04:00
Tom Rini
94633c36f9 net: Make DM_ETH be selected by NETDEVICE
The deadline for DM_ETH migration passed 2 years ago.  Now that
platforms which cannot be migrated have been either removed or had
drivers disabled, and platforms that needed minor help to migrate have
been forcefully migrated, we can complete the migration.

This entails select'ing DM_ETH under NETDEVICES, and then removing now
extraneous depends on lines.  In a few places, we can now either remove
options or just simplify later dependencies.

Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Ramon Fried <rfried.dev@gmail.com>
2022-08-20 21:18:15 -04:00
Tom Rini
a2504a1bd2 net: ks8851_mll: Remove legacy non-DM_ETH code and callers
As this driver has been converted to DM_ETH and the migration deadline
is 2 years passed, remove the legacy code and callers.

Cc: Eugen Hristev <eugen.hristev@microchip.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Ramon Fried <rfried.dev@gmail.com>
2022-08-20 21:18:15 -04:00
Tom Rini
adae2ed62d fsl-mc: Update dependencies for DM_ETH
When using DM_ETH, which should be the default now, we need to always
have DM_MDIO and FSL_LS_MDIO enabled, so select them.

Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Cc: Wasim Khan <wasim.khan@nxp.com>
Cc: Udit Agarwal <udit.agarwal@nxp.com>
Cc: Ashish Kumar <Ashish.Kumar@nxp.com>
Cc: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Manish Tomar <Manish.Tomar@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-20 21:18:15 -04:00
Tom Rini
9d7add8ac9 net: lpc32xx_eth.c ethernet driver
This driver has not been converted to DM_ETH.  The migration
deadline passed 2 years ago.

Cc: Trevor Woerner <twoerner@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Ramon Fried <rfried.dev@gmail.com>
2022-08-20 21:18:15 -04:00
Tom Rini
ecf1d2741d net: Remove smc91111 ethernet driver
This driver has not been converted to DM_ETH.  The migration deadline
passed 2 years ago.

Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: David Feng <fenghua@phytium.com.cn>
Cc: Liviu Dudau <liviu.dudau@foss.arm.com>
Cc: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Ramon Fried <rfried.dev@gmail.com>
2022-08-12 16:10:50 -04:00
Tom Rini
ff4e87c030 Convert CONFIG_SYS_FSL_QMAN_V3 et al to Kconfig
This converts the following to Kconfig:
   CONFIG_FSL_NGPIXIS
   CONFIG_SYS_FSL_QMAN_V3
   CONFIG_SYS_FSL_RAID_ENGINE
   CONFIG_SYS_FSL_RMU
   CONFIG_SYS_FSL_SINGLE_SOURCE_CLK
   CONFIG_SYS_FSL_SRIO_LIODN
   CONFIG_SYS_FSL_TBCLK_DIV
   CONFIG_SYS_FSL_USB1_PHY_ENABLE
   CONFIG_SYS_FSL_USB2_PHY_ENABLE
   CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE
   CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-12 16:10:49 -04:00
Tom Rini
c6eec0182a Convert CONFIG_SYS_FSL_MAX_NUM_OF_SEC to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_FSL_MAX_NUM_OF_SEC

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-12 16:10:49 -04:00
Tom Rini
7ae1e6a3a3 Convert CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-12 16:10:49 -04:00
Tom Rini
d0748898d8 Convert CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS
   CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS

And we remove the entries from the README for a number of already
converted items.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-12 16:10:49 -04:00
Simon Glass
55f7990bfe dm: core: Add support for writing u32 with ofnode
Add a new function to write an integer to an ofnode (live tree or
flat tree).

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-12 08:14:24 -04:00
Simon Glass
39e42be12b dm: core: Allow writing to a flat tree with ofnode
In generally it is not permitted to implement an ofnode function only for
flat tree or live tree. Both must be supported. Also the code for
live tree access should be in of_access.c rather than ofnode.c which is
really just for holding the API-conversion code.

Update ofnode_write_prop() accordingly and fix the test so it can work
with flat tree too.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-12 08:14:24 -04:00
Simon Glass
be0789a8ee dm: core: Swap parameters of ofnode_write_prop()
It is normal for the length to come after the value in libfdt. Follow this
same convention with ofnode.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-12 08:14:24 -04:00
Simon Glass
331048471d dm: core: Introduce support for multiple trees
At present ofnode only works with a single device tree, for the most part.
This is the control FDT used by U-Boot.

When booting an OS we may obtain a different device tree and want to
modify it. Add some initial support for this into the ofnode API.

Note that we don't permit aliases in this other device tree, since the
of_access implementation maintains a list of aliases collected at
start-up. Also, we don't need aliases to do fixups in the other FDT. So
make sure that flat tree and live tree processing are consistent in this
area.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-12 08:14:23 -04:00
Simon Glass
da62e1e861 video: Rename structs and functions to avoid VBE
Rename these to VESA, itself an abbreviation, to avoid a conflict with
Verified Boot for Embedded.

Rename this to avoid referencing VBE.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-12 08:14:23 -04:00
Simon Glass
cafe8712e8 video: Renname vbe.h to vesa.h
We want to use VBE to mean Verfiied Boot for Embedded in U-Boot. Rename
the existing VBE (Vesa BIOS extensions) to allow this.

Verified Boot for Embedded is documented doc/develop/vbe.rst

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-12 08:14:23 -04:00
Simon Glass
4e4bf9449b common: Drop display_options.h from common header
Move this out of the common header and include it only where needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-10 13:46:55 -04:00
Michal Simek
99699a7707 power: regulator: Remove i2c header from gpio regulator
i2c is not used that's why header is not needed.

Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-08-10 13:38:30 -04:00
Marek Vasut
2349ecffec mmc: Do not send status of send_status is false
Commit 44645f87de ("mmc: Fix mmc_switch excessive timeout") introduced
a side effect where CMD13 SEND_STATUS is issued in case mmc_wait_dat0()
does not return -ENOSYS and $send_status is not set. This happens on all
hardware which does implement .mmc_wait_dat0 callback, e.g. i.MX8M .

This leads to lengthy timeout before booting OS in case of eMMC in one
of the HS200/HS400 modes, since the card cannot respond to CMD13 while
downgrading from HS200/HS400 to regular HS mode.

Fix this by adding the missing conditional.

Fixes: 44645f87de ("mmc: Fix mmc_switch excessive timeout")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Kirill Kapranov <kirill.kapranov@compulab.co.il>
Cc: Marek Behún <marek.behun@nic.cz>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Ye Li <ye.li@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-08-10 13:38:29 -04:00
Pali Rohár
ca514d0267 misc: atsha204a: Don't check for error when waking up the device
The device ignores any levels or transitions on the SCL pin when the device
is idle, asleep or during waking up.

Linux kernel driver for atsha204a (atmel-sha204a.ko) also ignores return
value from i2c wakeup send command, see:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/crypto/atmel-i2c.c?h=v5.19#n174

And also userspace Turris libatsha204 library ignores return value from
wakeup send command, see:
https://gitlab.nic.cz/turris/libatsha204/-/blob/v29.2/src/libatsha204/layer_ni2c.c#L75-76

U-Boot driver should do same thing.

Fixes waking up ATSHA204 on Turris 1.x boards.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Paweł Anikiel <pan@semihalf.com>
Reviewed-by: Marek Behún <kabel@kernel.org>
2022-08-09 10:01:31 +02:00
Pali Rohár
ca3756c86b pci: pci_mvebu: Add support for reset-gpios
Release PERST# signal via GPIO when "reset-gpios" is defined in device tree.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-09 08:58:27 +02:00
Pali Rohár
019090647c arm64: a37xx: pinctrl: Improve description for pinmux command
In more cases group name consist of function name followed by function
number. So if function name is just prefix of group name, show group name.

So in 'pinmux status -a' command output would be visible also extended
function number, which is useful for debugging.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-09 08:58:27 +02:00
Pali Rohár
361cf5c7e1 arm64: a37xx: pinctrl: Remove unused macro PIN_GRP()
Macro PIN_GRP() is not used, remove it.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-09 08:58:27 +02:00
Pali Rohár
7a1c071173 arm64: a37xx: pinctrl: Fix definitions for MPP pins 20-22
All 3 MPP pins (20, 21 and 22) can be configured individually and also can
be configured to GPIO functions. Fix definitions for these MPP pins in
existing pin groups. After this change GPIO function can be enabled just
for one of these 3 pins.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-09 08:58:27 +02:00
Chris Packham
65b3b24eba gpio: Remove mvgpio driver
The last user of this driver was removed in commit dee08b1999 ("arm:
Remove gplugd board"). Remove the unused driver.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Acked-by: Pali Rohár <pali@kernel.org>
2022-08-09 08:58:27 +02:00