3 commits

Author	SHA1	Message	Date
Simon Glass	a572041807	tpl: Enable CONFIG_TPL_SYS_MALLOC_F where needed ... Enable CONFIG_TPL_SYS_MALLOC_F for boards which have a non-zero value for CONFIG_TPL_SYS_MALLOC_F_LEN Note that the default is yes in most cases, so no changes are needed to board defconfig options. Signed-off-by: Simon Glass <sjg@chromium.org>	2023-10-06 14:38:12 -04:00
Jagan Teki	b8f1ca9540	board: rockchip: Add Edgeble Neu2 IO Board ... Neural Compute Module 2(Neu2) IO board is an industrial form factor IO board from Edgeble AI. General features: - microSD slot - MIPI DSI connector - 2x USB Host - 1x USB OTG - Ethernet - mini PCIe - Onboard PoE - RS485, RS232, CAN - Micro Phone array - Speaker - RTC battery slot - 40-pin expansion Neu2 needs to mount on top of this IO board in order to create complete Edgeble Neural Compute Module 2(Neu2) IO platform. Add support for it. Signed-off-by: Jagan Teki <jagan@edgeble.ai>	2023-01-16 18:01:11 +08:00
Jagan Teki	ffb191e458	arm: rockchip: Add RV1126 arch core support ... Rockchip RV1126 is a high-performance vision processor SoC for IPC/CVR, especially for AI related application. Add arch core support for it. Signed-off-by: Jagan Teki <jagan@edgeble.ai> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Change-Id: I22fde40ec375e3c6aba39808abf252edc45d4b04	2023-01-16 18:01:11 +08:00