Commit graph

6 commits

Author SHA1 Message Date
Andre Przywara
beeace9ba1 sunxi: refactor serial base addresses to avoid asm/arch/cpu.h
At the moment we have each SoC's memory map defined in its own cpu.h,
which is included in include/configs/sunxi_common.h. This will be a
problem with the introduction of Allwinner RISC-V support.

Remove the inclusion of that header file from the common config header,
instead move the required serial base addresses (for the SPL) into a
separate header file. Then include the original cpu.h file only where
we really need it, which is only under arch/arm now.

This disentangles the architecture specific header files from the
generic code.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2023-10-22 23:41:52 +01:00
Andre Przywara
1da48c99de pinctrl: sunxi: move PIO_BASE into sunxi_gpio.h
On the Allwinner platform we were describing a quite comprehensive
memory map in a per-SoC header unser arch/arm.
In the old days that was used by every driver, but nowadays it should
only be needed by SPL drivers (not using the DT). Many addresses in
there were never used, and some are not needed anymore.

To avoid a dependency on CPU specific headers in an arch specific
directory, move the definition of the pinctroller MMIO base address into
the sunxi_gpio.h header, because the SPL routines for GPIO should be the
only one needing this address.
This is a first step towards getting rid of cpu_sun[x]i.h completely,
and allows to remove the inclusion of that file from the sunxi_gpio.h
header.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2023-10-22 23:40:57 +01:00
Jernej Skrabec
8ec293e063 sunxi: Add support for H616 SoC
H616 is very similar to H6 so most of the infrastructure can be reused.
However, two big differences are that it doesn't have functional SRAM A2
which is usually used for TF-A and it doesn't have ARISC co-processor.
It also needs bigger SPL size - 48 KiB.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-25 21:52:01 +00:00
Clément Péron
26f8e0d7f2 arm: sunxi: h6: fix reset using r_wdog
Some H6 boards have a watchdog which didn't make the SoC
reboot properly.

Reason is still unknown but several people have test it.
Chen-Yu Tsai :
Pine H64 = H6 V200-AWIN H6448BA 7782 => OK
OrangePi Lite 2 = H6 V200-AWIN H8068BA 61C2 => KO

Martin Ayotte :
Pine H64 = H8069BA 6892 => OK
OrangePi 3 = HA047BA 69W2 => KO
OrangePi One Plus = H7310BA 6842 => KO
OrangePi Lite2 = H6448BA 6662 => KO

Clément Péron:
Beelink GS1 = H6 V200-AWIN H7309BA 6842 => KO

After the series of result, Icenowy try to reach Allwinner about this
issue but they seems not interested to investigate it.

As we don't have the ARIS coproc to do power management and watchdogis
the only solution to reset the board.

So, Change from watchdog to R_watchdog to allow a reboot on all H6
boards.

Signed-off-by: Clément Péron <peron.clem@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-05-20 22:24:47 +05:30
Icenowy Zheng
7ac5f33483 sunxi: fix sid base address macro name for H6
In the current H6 CPU memory space code, the SUNXI in the macro name of
the SID address base is wrongly spelled as SNUXI, which leads to SID
readout not working.

Fix this macro name.

Fixes: 55f6b1c351c9 ("sunxi: add basic memory map definitions of H6 SoC")
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2018-08-20 17:22:59 +05:30
Icenowy Zheng
e77b7496c6 sunxi: add basic memory map definitions of H6 SoC
The Allwinner H6 SoC come with a totally new memory map.

Add basical definition of the new memory map into a header file, and let
the cpu.h header include it in the situation of H6.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2018-07-31 11:38:13 +05:30