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25641 commits

Author SHA1 Message Date
Rajeshwari Shinde
120af1572a spi: exynos: Minimise access to SPI FIFO level
Accessing SPI registers is slow, but access to the FIFO level register
in particular seems to be extraordinarily expensive (I measure up to
600ns). Perhaps it is required to synchronise with the SPI byte output
logic which might run at 1/8th of the 40MHz SPI speed (just a guess).

Reduce access to this register by filling up and emptying FIFOs
more completely, rather than just one word each time around the inner
loop.

Since the rxfifo value will now likely be much greater that what we read
before we fill the txfifo, we only fill the txfifo halfway. This is
because if the txfifo is empty, but the rxfifo has data in it, then writing
too much data to the txfifo may overflow the rxfifo as data arrives.

This speeds up SPI flash reading from about 1MB/s to about 2MB/s on snow.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2013-10-08 18:18:11 +05:30
Rajeshwari Shinde
8d203afdd3 spi: exynos: Support a delay after deactivate
For devices that need some time to react after a spi transaction
finishes, add the ability to set a delay.

Implement this as a delay on the first/next transaction to avoid
any delay in the fairly common case where a SPI transaction is
followed by other processing.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2013-10-08 18:18:11 +05:30
Rajeshwari Shinde
fc9ae1bac4 exynos: Export timer_get_us() to get microsecond timer
This function, if implemented by the board, provides a microsecond
timer. The granularity may be larger than 1us if hardware does not
support this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2013-10-08 18:18:10 +05:30
Wolfgang Denk
b770e88a6c Fix number base handling of "load" command
As documented, almost all U-Boot commands expect numbers to be entered
in hexadecimal input format. (Exception: for historical reasons, the
"sleep" command takes its argument in decimal input format.)

This rule was broken for the "load" command; for details please see
especially commits 045fa1e "fs: add filesystem switch libary,
implement ls and fsload commands" and 3f83c87 "fs: fix number base
behaviour change in fatload/ext*load".  In the result, the load
command would always require an explicit "0x" prefix for regular
(i. e. base 16 formatted) input.

Change this to use the standard notation of base 16 input format.
While strictly speaking this is a change of the user interface, we
hope that it will not cause trouble.  Stephen Warren comments (see
[1]):

        I suppose you can change the behaviour if you want; anyone
        writing "0x..." for their values presumably won't be
        affected, and if people really do assume all values in U-Boot
        are in hex, presumably nobody currently relies upon using
        non-prefixed values with the generic load command, since it
        doesn't work like that right now.

[1] http://article.gmane.org/gmane.comp.boot-loaders.u-boot/171172

Acked-by: Tom Rini <trini@ti.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
2013-10-07 15:54:18 -04:00
Chin Liang See
572886af59 socfpga: Adding pin mux handoff files
Adding the generated pin mux configuration by Preloader
Generator tool

Signed-off-by: Chin Liang See <clsee@altera.com>
Reviewed-by: Pavel Machek <pavel@denx.de>
Acked-by: Dinh Nguyen <dinguyen@altera.com>
Cc: Wolfgang Denk <wd@denx.de>
CC: Pavel Machek <pavel@denx.de>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Tom Rini <trini@ti.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
2013-10-07 19:32:30 +02:00
Chin Liang See
5d649d2b08 socfpga: Adding System Manager driver
Adding System Manager driver which will configure the
pin mux for real hardware Cyclone V development kit
(not Virtual Platform)

Signed-off-by: Chin Liang See <clsee@altera.com>
Reviewed-by: Pavel Machek <pavel@denx.de>
Acked-by: Dinh Nguyen <dinguyen@altera.com>
Cc: Wolfgang Denk <wd@denx.de>
CC: Pavel Machek <pavel@denx.de>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Tom Rini <trini@ti.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
2013-10-07 19:32:21 +02:00
Albert ARIBAUD
0610a16cf2 omap1510inn: arm925t: remove support
omap1510inn is orphan and has been for years now.
Reove it and, as it was the only arm925t target,
also remove arm925t support.
Update doc/README.scrapyard accordingly.

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
2013-10-07 19:25:19 +02:00
Jagannadha Sutradharudu Teki
3cfcf774c2 doc: SPI: Update SPI status track
Updated SPI/status.txt, with memory_map and TODO.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 19:35:10 +05:30
Jagannadha Sutradharudu Teki
adbb5860e5 sf: ramtron: Remove page_size print
There is no page_size for ramtron flashes,
so just print the detected flash and it's size.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 19:35:09 +05:30
Jagannadha Sutradharudu Teki
ce22b922dd sf: Minor cleanups
- Add spaces, tabs
- Commenting.
- Rearrange code.
- Add static qualifier for missing func.
- Remove memory_map from ramtron.c
- Ramtron: spi_flash_internal.h -> sf_internal.h

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 19:34:56 +05:30
Poddar, Sourav
2f24223ae1 README: qspi usecase and testing documentation.
Contains documentation and testing details for qspi flash
interface.

Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2013-10-07 17:55:52 +05:30
Matt Porter
247cdf0413 dra7xx_evm: add SPL API, QSPI, and serial flash support
Enables support for SPI SPL, QSPI and Spansion serial flash device
on the EVM. Configures pin muxes for QSPI mode.

Signed-off-by: Matt Porter <matt.porter@linaro.org>
Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2013-10-07 17:55:52 +05:30
Matt Porter
1d0933eaf9 spi: add TI QSPI driver
Adds a SPI master driver for the TI QSPI peripheral.
- Added quad read support.
- Added memory mapped support.

Signed-off-by: Matt Porter <matt.porter@linaro.org>
Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 17:55:51 +05:30
Poddar, Sourav
004f15b600 sf: Add memory mapped read support
Qspi controller can have a memory mapped port which can be used for
data read. Added support to enable memory mapped port read.

This patch enables the following:
- It enables exchange of memory map address between mtd and qspi
through the introduction of "memory_map" flag.
- Add support to communicate to the driver that memory mapped
 transfer is to be started through introduction of new flags like
"SPI_XFER_MEM_MAP" and "SPI_XFER_MEM_MAP_END".

This will enable the spi controller to do memory mapped configurations
if required.

Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2013-10-07 17:55:51 +05:30
Poddar, Sourav
62d206dc31 armv7: hw_data: change clock divider setting.
Clock requirement for qspi clk is 192 Mhz.
According to the below formulae,

f dpll = f ref * 2 * m /(n + 1)
clockoutx2_Hmn = f dpll / (hmn+ 1)

fref = 20 Mhz, m = 96, n = 4 gives f dpll = 768 Mhz
For clockoutx2_Hmn to be 768, hmn + 1 should be 4.

Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2013-10-07 17:55:51 +05:30
Matt Porter
c97a9b3275 omap5: add qspi support
Add QSPI definitions and clock configuration support.

Signed-off-by: Matt Porter <matt.porter@linaro.org>
Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2013-10-07 17:55:50 +05:30
Priyanka Jain
0ab449beec sf: probe: Add support for EN25S64
Add support for EON EN25S64 SPI flash.

Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 17:55:50 +05:30
Jagannadha Sutradharudu Teki
364995499c doc: SPI: Add status.txt for tracking SPI subsys status
doc/SPI/status.txt added to track the u-boot SPI subsystem status.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 17:55:50 +05:30
Jagannadha Sutradharudu Teki
898e76c938 sf: Rename spi_flash files
Renamed:
spi_flash.c -> sf.c
spi_flash_internal.h -> sf_internal.h
spi_flash_ops.c -> sf_ops.c
spi_flash_probe.c -> sf_probe.c

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 17:55:50 +05:30
Jagannadha Sutradharudu Teki
1b1bd9a7b3 spi: spi cleanups
- Rearranged multi-line comment style.
- Add tabs.
- Add spaces.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 17:55:49 +05:30
Jagannadha Sutradharudu Teki
a5e8199a13 sf: spi_flash cleanups
More cleanups on spi_flash side:
- Removed unneeded comments.
- Rearranged macros in proper location.
- Rearranged func declerations
- Renamed few function names.
- Added License headers.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 17:55:49 +05:30
Jagannadha Sutradharudu Teki
30b0ca6318 sf: Remove spi_flash_do_alloc references
Added a support for common probe, hence removed removed
spi_flash_do_alloc reference.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 17:55:49 +05:30
Jagannadha Sutradharudu Teki
9719695b24 sf: probe: Add support for MX25L51235F
Add support for Macronix MX25L51235F SPI flash.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 17:55:48 +05:30
Jagannadha Sutradharudu Teki
0665538632 sf: probe: Add support for MX25L25635F
Add support for Macronix MX25L25635F SPI flash.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 17:55:48 +05:30
Jagannadha Sutradharudu Teki
532f2f111c sf: ops: Add static qualifier to spi_flash_cmd_bankaddr_write
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 17:55:48 +05:30
Jagannadha Sutradharudu Teki
3ea708f0d3 sf: probe: Print erase_size while printing flash details
Included erase_size while printing probed flash details.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 17:55:48 +05:30
Jagannadha Sutradharudu Teki
567901c8e0 sf: probe: Use print_size arg as page_size
Use flash->page_size arg in print_size() instead of
flash->sector_size while printing detected flas part details.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 17:55:47 +05:30
Jagannadha Sutradharudu Teki
af878522b5 sf: probe: Add support for S25FL512S_256K
Add support for Spansion S25FL512S_256K SPI flash.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 17:55:47 +05:30
Jagannadha Sutradharudu Teki
f0be6ded71 sf: probe: Add support for S25FL256S_256K
Add support for Spansion S25FL256S_256K SPI flash.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 17:55:46 +05:30
Jagannadha Sutradharudu Teki
fda41259b8 sf: probe: Add support for EN25Q64
Add support for EON EN25Q64 SPI flash.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 17:55:46 +05:30
Jagannadha Sutradharudu Teki
6af8dc3ebc sf: Remove unneeded flash drivers files
Now the common probing is handled in spi_flash_probe.c
hence removed the unneeded flash drivers.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 17:55:46 +05:30
Jagannadha Sutradharudu Teki
af1679bc30 sf: ramtron: Add support for separate flash driver
Compared to other spi flashes, ramtron has a different
probing and implementation on flash ops, hence moved
ramtron probe code into ramtron driver.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 17:55:46 +05:30
Jagannadha Sutradharudu Teki
7ab35d922d sf: Add proper comment style on spi_flash structure
Added proper comment style on spi_flash structure to make
more readable.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 17:55:46 +05:30
Jagannadha Sutradharudu Teki
32ebd1a7d5 sf: probe: Simply the BAR configuration logic
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 17:55:45 +05:30
Jagannadha Sutradharudu Teki
0f6232801c sf: probe: Add support for flag status polling
From Micron, 512MB onwards, flash requires to poll flag status
instead of read status- hence added E_FSR flag on spectific
flash parts.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 17:55:45 +05:30
Jagannadha Sutradharudu Teki
f4f51a8ff8 sf: probe: Add support for erase sector selection flag
SECT_4K, SECT_32K and SECT_64K opeartions are performed to
to specific flash by adding a SECT* flag on respective
spi_flash_params.flag param.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 17:55:45 +05:30
Jagannadha Sutradharudu Teki
54024c1566 sf: probe: Add support to clear flash BP# bits
Few of the flashes(Atmel, Macronix and SST) require to
clear BP# bits in flash power ups.

So clear these BP# bits at probe time, so-that the flash
is ready for user operations.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 17:55:44 +05:30
Jagannadha Sutradharudu Teki
10ca45d005 sf: probe: Add support for SST_WP
Most of the SST flashes needs to write up using SST_WP, AAI
Word Program, so added a flag param on spi_flash_params table.

SST flashes, which supports SST_WP need to use a WP write
sst_write_wp instead of common flash write.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 17:55:44 +05:30
Jagannadha Sutradharudu Teki
b7797422e3 sf: probe: Give proper spacing on flash table params
Given proper spacing between flash table params.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 17:55:44 +05:30
Jagannadha Sutradharudu Teki
a74db0a4f3 sf: probe: Add support for AT45DB* flash parts
Added AT45DB* parts are which are avilable in spi_flash_probe_legacy.c.

Updated the sector_size attributes as per the flash parts.
Looks fine for with this sector_size for computing the size
of flash.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 17:55:44 +05:30
Jagannadha Sutradharudu Teki
26dcc5415b sf: probe: Add support for SST25* flash parts
Added SST25* parts are which are avilable in spi_flash_probe_legacy.c.

Updated the sector_size attributes as per the flash parts.
Looks fine for with this sector_size for computing the size
of flash.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Tested-by: Eric Nelson <eric.nelson@boundarydevices.com>
2013-10-07 17:55:43 +05:30
Jagannadha Sutradharudu Teki
74bec16eb5 sf: probe: Add support for S25FL* flash parts
Added S25FL* parts are which are avilable in spi_flash_probe_legacy.c.

Updated the sector_size attributes as per the flash parts.
Looks fine for with this sector_size for computing the size
of flash.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 17:55:43 +05:30
Jagannadha Sutradharudu Teki
80701e54d3 sf: probe: Add support for W25* flash parts
Added W25* parts are which are avilable in spi_flash_probe_legacy.c.

Updated the sector_size attributes as per the flash parts.
Looks fine for with this sector_size for computing the size
of flash.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 17:55:43 +05:30
Jagannadha Sutradharudu Teki
db7e258412 sf: probe: Add support for MX25L* flash parts
Added MX25L* parts are which are avilable in spi_flash_probe_legacy.c.

Updated the sector_size attributes as per the flash parts.
Looks fine for with this sector_size for computing the size
of flash.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 17:55:42 +05:30
Jagannadha Sutradharudu Teki
18500e26ce sf: probe: Add support for GD25* flash parts
Added GD25* parts are which are avilable in spi_flash_probe_legacy.c.

Updated the sector_size attributes as per the flash parts.
Looks fine for with this sector_size for computing the size
of flash.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 17:55:42 +05:30
Jagannadha Sutradharudu Teki
0d7663fe7d sf: probe: Add support for EN25Q* flash parts
Added EN25Q* parts are which are avilable in spi_flash_probe_legacy.c.

Updated the sector_size attributes as per the flash parts.
Looks fine for with this sector_size for computing the size
of flash.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 17:55:42 +05:30
Jagannadha Sutradharudu Teki
53752c90e0 sf: probe: Add support for M25P* flash parts
Added M25P* parts are which are avilable in spi_flash_probe_legacy.c.

Updated the sector_size attributes as per the flash parts.
Looks fine for with this sector_size for computing the size of flash.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 17:55:42 +05:30
Jagannadha Sutradharudu Teki
4d4ec9927f sf: probe: Add new spi_flash_probe support
Added new spi_flash_probe support, currently added N25Q*
flash part attributes support.

Updated the sector_size attributes as per the flash parts.
Looks fine for with this sector_size for computing the size
of flash.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 17:55:41 +05:30
Jagannadha Sutradharudu Teki
4d5e29a680 sf: Divide spi_flash into multiple parts
Divided the spi_flash framework into mutiple parts for
- spi_flash.c:
        spi flash core file, interaction for spi/qspi driver to
        spi_flash framework.
- spi_flash_ops.c
        spi flash preffered operations, erase,write and read.
- spi_flash_probe.c
        spi flash probing, easy to extend probing functionality.

This change will support to extend the functionality in a
proper manner.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 17:55:41 +05:30
Thierry Reding
010c480bbf pci: Properly configure prefetchable memory region
Forcibly set hose->pci_prefetch to NULL to make sure it will be setup.
This will help if for any reason callers didn't make sure themselves to
NULL the field.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-07 08:21:23 -04:00