Commit graph

9664 commits

Author SHA1 Message Date
Nobuhiro Iwamatsu
798dc6be7f ARM: rmobile: r8a7795: Add MMU layout
This add MMU layout for R8A7795 of Renesas ARM64 SoC.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2016-08-17 10:25:36 +09:00
masakazu.mochizuki.wd@hitachi.com
6f107e4cf6 arm: rmobile: Add BLANCHE board support
BLANCHE is development board based on R-Car V2H SoC (R8A7792)

This commit supports the following periherals:
- SCIF, Ethernet, QSPI, MMC

Signed-off-by: Masakazu Mochizuki <masakazu.mochizuki.wd@hitachi.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2016-08-17 10:25:35 +09:00
Nobuhiro Iwamatsu
e525d34b47 ARM: rmobile: Add support salvator-x board
Salvator-x is an entry level development board based on
R-Car H3 SoC (R8A7795). This commit supports SCIF only.

Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2016-08-17 10:25:35 +09:00
Nobuhiro Iwamatsu
ee8f0cb3b0 ARM: rmobile: Add support R8A7795
Renesas R8A7795 is CPU with Cortex-a57.
This supports the basic register definition and GPIO and
framework of PFC.

Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2016-08-17 10:25:35 +09:00
Nobuhiro Iwamatsu
581183def6 ARM: rmobile: Add support R-Car Generation 3
This adds supporting R-Car Generation 3 (Gen3) as Renesas ARM64 SoC.

Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2016-08-17 10:25:35 +09:00
Nobuhiro Iwamatsu
7a500a7a78 ARM: rmobile: Create R-Car 32bit (Gen1 and Gen2) for Kconfig
This creates Kconfig of R-Car 32bit for Kconfig of R-Car 64bit (Gen3).

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2016-08-17 10:25:34 +09:00
Nobuhiro Iwamatsu
1cc95f6e1b ARM: Rmobile: Rename CONFIG_RMOBILE to CONFIG_ARCH_RMOBILE
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2016-08-17 10:25:34 +09:00
Nobuhiro Iwamatsu
7a7d246d97 ARM: rmobile: Move SoC headers to mach-rmobile/include/mach
Move form arch/arm/include/asm/arch-rmobile/ to arch/arm/mach-rmobile/include/mach/.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2016-08-17 10:25:34 +09:00
Nobuhiro Iwamatsu
badbb63c2c ARM: rmobile: Move SoC sources to mach-rmobile
Move from arch/arm/cpu/armv7/rmobile/ to arch/arm/mach-rmobile/.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2016-08-17 10:25:28 +09:00
Tom Rini
abbaa23f65 Merge branch 'master' of git://git.denx.de/u-boot-usb 2016-07-07 09:58:41 -04:00
Simon Glass
ec5507707a video: tegra: Move to using simple-panel and pwm-backlight
We have standard drivers for panels and backlights which can do most of the
work for us. Move the tegra20 LCD driver over to use those instead of custom
code.

This patch includes device tree changes for the nvidia boards. I have only
been able to test seaboard. If this patch is applied, these boards will
also need to be synced with the kernel, and updated to use display-timings:

   - colibri
   - medcom-wide
   - paz00
   - tec

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-07-05 13:19:08 -07:00
Simon Glass
ce02a71c23 tegra: dts: Sync tegra20 device tree files with Linux
Sync everything except the display panel, which will come in a future patch.
One USB port is left disabled since we don't want to support it in U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2016-07-05 13:19:08 -07:00
Marek Vasut
12c67d7522 powerpc: mpc85xx: Do not build errata command in SPL
The errata command is useless in SPL, so don't build it. This fixes
multiple build failures on PowerPC.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: York Sun <york.sun@nxp.com>
Fixes: 92623672f9 ("fsl: usb: make errata function common for PPC and ARM")
2016-07-05 17:40:28 +02:00
Tom Rini
e8009beff6 Merge git://git.denx.de/u-boot-arc 2016-07-04 11:46:21 -04:00
Alexey Brodkin
c7dea6e259 arc: make global_data.h usable in assembly files
Currently on attempt to use global_data.h in an assembly file following
will happen:
-------------------->8-----------------
./arch/arc/include/asm/global_data.h: Assembler messages:
./arch/arc/include/asm/global_data.h:11: Error: bad instruction 'struct arch_global_data{'
./arch/arc/include/asm/global_data.h:12: Error: junk at end of line, first unrecognized character is `}'
scripts/Makefile.build:316: recipe for target 'arch/arc/lib/start.o' failed
-------------------->8-----------------

In this change we disable struct arch_global_data in ASM which fixes
the issue above.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2016-07-04 11:43:41 +03:00
Alexey Brodkin
7a54f5177a arc: Use "-mcpu=archs" instead of deprecated "-marchs" for ARC HS
Newer ARC toolchains don't support "-marchs" option any longer.
Instead "-mcpu=archs" should be used. What's also important older
toiolchains that support ARC HS cores will also happily accept
"-mcpu=archs" so that's a very safe move.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2016-07-04 11:43:40 +03:00
Quentin Schulz
d2a6af0528 sunxi: Add defconfig and DTS file for Allwinner R16 EVB (Parrot)
The Parrot Board is an evaluation board with an Allwinner R16 (assumed
to be close to an Allwinner A33), 4GB of eMMC, 512MB of RAM, USB host
and OTG, a WiFi/Bluetooth combo chip, a micro SD Card reader, 2
controllable buttons, an LVDS port with separated backlight and
capacitive touch panel ports, an audio/microphone jack, a camera CSI
port, 2 sets of 22 GPIOs and an accelerometer.

The DTS file is identical to the one submitted to the upstream kernel.

Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-07-02 13:53:15 +02:00
Olliver Schinagl
9acebe8a18 sunxi: Add missing boot_media fields in the SPL header
Commit b19236fd1 ("sunxi: Increase SPL header size to 64 bytes to avoid
code corruption") Added defines for MMC0 and SPI as boot identification.
After verifying on an OLinuXino Lime2 with NAND and eMMC, the expected
values have been confirmed and added to spl.h

Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-07-02 13:53:03 +02:00
Masahiro Yamada
e64a6b1141 ARM: uniphier: add external IRQ setup code
I will carry this work-around until it is cared in the kernel.
This looks up the AIDET node and sets up a register to handle
active low interrupt signals.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-07-02 05:44:30 +09:00
Masahiro Yamada
1013aef330 ARM: dts: uniphier: add AIDET nodes
The AIDET (ARM Interrupt Detector Add-on Circuit) is a kind of
syscon block related with the interrupt controller.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-07-02 05:44:30 +09:00
Masahiro Yamada
c4adc50ea6 ARM: dts: uniphier: sync Device Trees with upstream Linux
I periodically sync Device Trees for better maintainability.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-07-02 05:44:29 +09:00
Masahiro Yamada
4cb9399e9b ARM: uniphier: fix typo "talbe"
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-06-30 23:49:26 +09:00
Bin Meng
ff6e156966 x86: coreboot: Remove the dummy pch driver
There is a dummy pch driver in the coreboot directory. This causes
drivers of its children fail to function due to empty ops. Remove
the whole file since it is no longer needed.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-06-29 10:08:15 +08:00
Tom Rini
44faff24f5 Merge git://git.denx.de/u-boot-fsl-qoriq 2016-06-28 15:59:05 -04:00
Abhimanyu Saini
dee01e426b armv8: dts: fsl: Remove cpu nodes from Layerscape DTSIs
Currently layescape SoCs are not using cpu nodes. So removing
them in favour of compatibly with  similar SoCs that
have different cores like LS2080A and LS2088A.

This has been tested on LS2080AQDS, LS1043ARDB, LS1012ARDB.

Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-06-28 12:08:54 -07:00
Prabhakar Kushwaha
49cdce1635 armv8: fsl-layerscape: Append "A" in SoC name for ARM based SoCs
Freescale ARMv8 SoC name ends with "A" to represent ARM SoCs.
like LS2080A, LS1043A, LS1012A.

So append "A" to SoC names.

Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-06-28 12:08:53 -07:00
Heiko Schocher
8e6e8221c7 arm: at91: taurus/axm: add DM and DTS support
add DM and DTS support for the at91 based siemens
boards.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
[rebased on current ToT]
Signed-off-by: Andreas Bießmann <andreas@biessmann.org>
2016-06-26 20:17:22 +02:00
Heiko Schocher
13ee789074 arm: at91: smartweb: add DM and DTS support
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
[rebased on current ToT]
Signed-off-by: Andreas Bießmann <andreas@biessmann.org>
2016-06-26 20:17:22 +02:00
Heiko Schocher
ae21e964d8 arm: at91: dts: Bring in dts files for AT91SAM9G20 and SAM9260
Add this files from Linux v4.6-rc5

66b8a424d: [workqueue: fix ghost PENDING flag while doing MQ IO]

Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Andreas Bießmann <andreas@biessmann.org>
2016-06-26 20:17:22 +02:00
Heiko Schocher
289f979cc9 corvus DTS / DM support
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
[rebase on current ToT, don't delete gurnard DTB creation]
Signed-off-by: Andreas Bießmann <andreas@biessmann.org>
2016-06-26 20:17:22 +02:00
Heiko Schocher
ce9844ce17 arm: at91: add CONFIG_AT91SAM9M10G45
add support for CONFIG_AT91SAM9M10G45.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
2016-06-26 20:17:22 +02:00
Marek Vasut
968ebdf1ef ARM: at91: Don't invoke spl_boot_device() twice
Since the spl_boot_mode() is now passed the boot device to boot from,
make use of it instead of inquiring for the boot device again. This
allows board_boot_order() to function correctly.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Andreas Bießmann <andreas.devel@googlemail.com>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
2016-06-26 20:17:22 +02:00
Marek Vasut
2b1cdafa9f common: Pass the boot device into spl_boot_mode()
The SPL code already knows which boot device it calls the spl_boot_mode()
on, so pass that information into the function. This allows the code of
spl_boot_mode() avoid invoking spl_boot_device() again, but it also lets
board_boot_order() correctly alter the behavior of the boot process.

The later one is important, since in certain cases, it is desired that
spl_boot_device() return value be overriden using board_boot_order().

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
[add newly introduced zynq variant]
Signed-aff-by: Andreas Bießmann <andreas@biessmann.org>
2016-06-26 20:17:22 +02:00
Hannes Schmelzer
a4d799939f board/BuR: rename kwb board to brxre1
Rename B&R kwb board to brxre1

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-06-24 17:24:40 -04:00
Hannes Schmelzer
2290fe0642 board/BuR: rename tseries board to brppt1
Rename B&R tseries board to brppt1

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-06-24 17:24:39 -04:00
Steve Rae
8ada4e0ee6 arm: bcm235xx: update clock framework
The handling of the "usage counter" is incorrect, and the clock should
only be disabled when transitioning from 1 to 0.

Reported-by: Chris Brand <chris.brand@broadcom.com>
Signed-off-by: Steve Rae <srae@broadcom.com>
2016-06-24 17:24:38 -04:00
Chris Brand
77a1a677a6 arm: bcm235xx: fix kps ccu
The Kona Peripheral Slave CCU has 4 policy mask registers, not 8.

Signed-off-by: Chris Brand <chris.brand@broadcom.com>
Signed-off-by: Steve Rae <srae@broadcom.com>
2016-06-24 17:24:37 -04:00
Steve Rae
9d7f416ced arm: bcm235xx: implement the boot0 hook code
Choose the Kconfig boot0 hook option and implement the required code.

Signed-off-by: Steve Rae <srae@broadcom.com>
2016-06-24 17:24:37 -04:00
Masahiro Yamada
ec048369e2 ARM: armv7: refactor Makefile slightly
Use Kbuild standard style where possible.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-06-24 17:24:34 -04:00
Masahiro Yamada
6441e3deb4 ARM: move #ifdef to match the error handling code
Match the #ifdef ... #endif and the code,

   ret = do_something();
   if (ret)
           return ret;

This will make it easier to add more #ifdef'ed code.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-06-24 17:23:13 -04:00
Masahiro Yamada
afedf5488d arm64: optimize smp_kick_all_cpus
gic_kick_secondary_cpus can directly return to the caller of
smp_kick_all_cpus.  We do not have to use x29 register here.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-06-24 17:23:12 -04:00
Carlo Caione
1e23737df8 board: amlogic: Rename folder for Amlogic boards
s/hardkernel/amlogic/ to have a single place for all the amlogic-based
boards.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Carlo Caione <carlo@endlessm.com>
Acked-by: Beniamino Galvani <b.galvani@gmail.com>
2016-06-24 17:23:09 -04:00
Daniel Gorsulowski
85a2f772c2 omap3: bugfix in timer on rollover
Signed-off-by: Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
2016-06-24 17:21:55 -04:00
Hou Zhiqiang
f3acaf438d armv8/fsl_lsch2: Correct the cores frequency initialization
The register CLKCNCSR controls the frequency of all cores in the same
cluster.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-06-24 08:33:08 -07:00
Hans de Goede
9f823615af Kconfig: Add a new DISTRO_DEFAULTS Kconfig option
DISTRO_DEFAULTS is intended to mirror / replace
include/config_distro_defaults.h.

The intend is for boards which include this file to select this from
their Kconfig files and when moving setting to Kconfig which are #define-ed
in config_distro_defaults.h to select this from DISTRO_DEFAULTS so that
boards which have selected DISTRO_DEFAULTS will keep the same configuration
as before without needing any defconfig file changes.

The initial list of selected things matches all settings recently removed
from config_distro_defaults.h because they have been converted to Kconfig,
with the exception of CMD_ELF and CMD_NET, which have a default of y, if
the default of these ever changes they should be selected by DISTRO_DEFAULTS
too.

For testing and example purposes this commit also converts ARCH_SUNXI
to use DISTRO_DEFAULT instead of selecting everything it needs itself.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-06-20 21:30:13 -04:00
Chen-Yu Tsai
4257f5f8f6 sunxi: Add PSCI implementation in C
To make the PSCI backend more maintainable and easier to port to newer
SoCs, rewrite the current PSCI implementation in C.

Some inline assembly bits are required to access coprocessor registers.
PSCI stack setup is the only part left completely in assembly. In theory
this part could be split out of psci_arch_init into a separate common
function, and psci_arch_init could be completely in C.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-06-20 22:44:00 +02:00
Chen-Yu Tsai
3424c3f299 sunxi: Add base address for GIC
Instead of hardcoding the GIC addresses in the PSCI implementation,
provide a base address in the cpu header.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-06-20 22:44:00 +02:00
Chen-Yu Tsai
7579a3ec8c sunxi: Add CPUCFG debug lock and sun7i cpu power controls
CPUCFG has an unlisted debug control register, which is used to disable
external debug access.

Also, sun7i secondary core power controls are in CPUCFG, as there's no
separate PRCM block.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-06-20 22:44:00 +02:00
Chen-Yu Tsai
20e3d05370 sunxi: Group cpu core related controls together
Instead of listing individual registers for controls to each processor
core, list them as an array of registers. This makes accessing controls
by core index easier.

Also rename "cpucfg_sun6i.h" (which was unused anyway) to the more generic
"cpucfg.h", and add packed attribute to struct sunxi_cpucfg.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-06-20 22:44:00 +02:00
Chen-Yu Tsai
57c2a25572 sunxi: Add missing linux/types.h header for cpucfg_sun6i.h
cpucfg_sun6i.h includes a register definition for the CPUCFG register
block. The types used are u32 and u8, which are defined in linux/types.h.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2016-06-20 22:44:00 +02:00