The existing code assumes the SDRAM row refresh period should always
be 15.6 us. This is not always true, and indeed on the ATNGW100, the
refresh rate should really be 7.81 us.
Add a refresh_period member to struct sdram_info and initialize it
properly for both ATSTK1000 and ATNGW100. Out-of-tree boards will
panic() until the refresh_period member is updated properly.
Big thanks to Gerhard Berghofer for pointing out this issue.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
As reported by Gerhard Berghofer:
in "gpio_enable_usart3" the correct pins for USART 3 are PB17 and PB18
instead of PB18 and PB19.
which is obviously correct. There's currently no code that uses
USART3, but custom boards may run into problems.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Add a chip-features file providing definitions of the form
AT32AP700x_CHIP_HAS_<peripheral>
to indicate the availability of the given peripheral on the currently
selected chip.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
The SoC-specific code for all the AT32AP700x CPUs is practically
identical; the only difference is that some chips have less features
than others. By doing this rename, we can add support for the AP7000
derivatives simply by making some features conditional.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Calculate the data timeout based on values from the CSD instead of
just using a hardcoded DTOR value. This is a backport of a similar fix
in BSP 2.0, with one additional fix: the DTOCYC value is rounded up
instead of down.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
include/asm-avr32/div64.h was recently moved to include/div64.h, but
cpu/at32ap/interrupts.c wasn't properly updated (an earlier version of
the patch was merged perhaps?)
This patch updates cpu/at32ap/interrupts.c so that the avr32 port
compiles again.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Instead of always using the largest blocksize the card supports, check
if it can support smaller block sizes and use 512 bytes if possible.
Most cards do support this, and other parts of u-boot seem to have
trouble with block sizes different from 512 bytes.
Also enable underrun/overrun protection.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Acked-by: Hans-Christian Egtvedt <hcegtvedt@atmel.com>
Driver for the Atmel MCI controller (MMC interface) for AT32AP CPUs.
The AT91 ARM-based CPUs use basically the same hardware, so it should
be possible to share this driver, but no effort has been made so far.
Hardware documentation can be found in the AT32AP7000 data sheet,
which can be downloaded from
http://www.atmel.com/dyn/products/datasheets.asp?family_id=682
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Implement functions for configuring the mmci pins, as well as
functions for getting the clock rate of the mmci controller.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Implement functions for configuring the macb0 and macb1 pins, as
well as functions for getting the clock rate of the various
busses the macb ethernet controllers are connected to.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Relocate the u-boot image into SDRAM like everyone else does. This
means that we can handle much larger .data and .bss than we used to.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Rewrite the resource management code (i.e. I/O memory, clock gating,
gpio) so it doesn't depend on any global state. This is necessary
because this code is heavily used before relocation to RAM, so we
can't write to any global variables.
As an added bonus, this makes u-boot's memory footprint a bit smaller,
although some functionality has been left out; all clocks are enabled
all the time, and there's no checking for gpio line conflicts.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Split the avr32 initialization code into a function to run before
relocation, board_init_f and a function to run after relocation,
board_init_r. For now, board_init_f simply calls board_init_r
at the end.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Patch by Haavard Skinnemoen, 06 Sep 2006
This patch adds support for the AT32AP CPU family and the AT32AP7000
chip, which is the first chip implementing the AVR32 architecture.
The AT32AP CPU core is a high-performance implementation featuring a
7-stage pipeline, separate instruction- and data caches, and a MMU.
For more information, please see the "AVR32 AP Technical Reference":
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
In addition to this, the AT32AP7000 chip comes with a large set of
integrated peripherals, many of which are shared with the AT91 series
of ARM-based microcontrollers from Atmel. Full data sheet is
available here:
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
