Commit graph

32 commits

Author SHA1 Message Date
Tom Warren
601795462a Tegra: T30: Beaver board support.
Beaver is a Tegra30 board that is nearly 100% compatible w/Cardhu.
Add a Beaver build so it can begin to be differentiated, if need be.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-04-15 16:13:51 -07:00
Tom Warren
e9cd20654c Tegra114: fdt: Add SDMMC (sdhci) nodes for T114 boards (Dalmore for now)
Took these values directly from the kernel dts files.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-03-25 09:56:07 -07:00
Allen Martin
af77fdb2ce tegra114: dalmore: fdt: enable dalmore SPI controller
Dalmore has a SPI flash part attached to controller 4, so enable
controller 4 and set to 25MHz.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-03-25 09:56:07 -07:00
Tom Warren
5647c03431 Tegra114: fdt: Move aliases from dtsi to dts file as per other Tegras
All other Tegra boards have their alias nodes in the .dts file

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-03-14 11:49:07 -07:00
Tom Warren
1baa4e72c6 Tegra30: fdt: Add SDMMC (sdhci) nodes for T30 boards (Cardhu for now)
Took these values directly from the kernel dts files.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-03-14 11:06:44 -07:00
Tom Warren
527519ae69 Tegra30: fdt: Sync DT nodes with kernel DT files (I2C, SPI, GPIO, clock)
Minor edits to clock, apbdma and SPI, make I2C match kernel DT, and add gpio

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-03-14 11:06:43 -07:00
Tom Warren
73bb244394 Tegra: fdt: Remove memreserve line from Cardhu/Seaboard DT files
Not used, and wrong in Cardhu's case

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-03-14 11:06:42 -07:00
Tom Warren
126685ad44 Tegra: fdt: Add/enhance sdhci (mmc) nodes for all T20 DT files
Linux dts files were used for those boards that didn't already
have sdhci info populated. Tamonten has their own dtsi file with
common sdhci nodes (sourced from Linux).

Signed-off-by: Tom Warren <twarren@nvidia.com>
Tested-by: Thierry Reding <thierry.reding@avionic-design.de>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-03-14 11:06:42 -07:00
Tom Warren
6c5be646b4 Tegra: fdt: Change /include/ to #include for C preprocessor
dts Makefile has the arch & board include paths added to DTS_CPPFLAGS.
This allows the use of '#include "xyz"' in the dts/dtsi file which
helps the C preprocessor find common dtsi include files.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-03-14 11:06:42 -07:00
Tom Warren
b77c3547e8 Tegra114: fdt: Update DT files with I2C info for T114/Dalmore
T114, like T30, does not have a separate/different DVC (power I2C)
controller like T20 - all 5 I2C controllers are identical, but
I2C5 is used to designate the controller intended for power
control (PWR_I2C in the schematics). PWR_I2C is set to 400KHz.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-03-14 11:06:41 -07:00
Tom Warren
8aff009585 Tegra114: Dalmore: Add DT files
These are stripped down for bringup, They'll be filled out later
to match-up with the kernel DT contents, and/or as devices are
brought up (mmc, usb, spi, etc.).

Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-02-11 10:35:25 -07:00
Allen Martin
23e3158f34 tegra30: fdt: add SPI SLINK nodes
Add tegra30 SPI SLINK nodes to fdt.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-02-11 10:35:24 -07:00
Allen Martin
36068ae75e tegra: fdt: add back missing host1x node
Add back host1x node to seaboard dts file.  This got dropped during
the tegra fdt sort.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-02-11 10:35:23 -07:00
Allen Martin
b7723f3f30 tegra: fdt: sort dts files
Sort nodes in dts files according the the following rules:

1) Any nodes that already exist in any /include/d file, in the order
they appear in the /include/d file.

2) Any nodes with a reg property, in order of their address.

3) Any nodes without a reg property, alphabetically by node name.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-01-17 09:07:34 -07:00
Allen Martin
d3f8752ed6 tegra: fdt: remove clocks nodes
These nodes are unused.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-01-17 09:07:23 -07:00
Tom Warren
083bbbbe77 Tegra30: fdt: Update DT files with I2C info for T30/Cardhu
Note that T30 does not have a separate/different DVC (power I2C)
controller like T20 - all 5 I2C controllers are identical, but
DVC_I2C is still used to designate the controller intended for
power control (PWR_I2C in the schematics). On Cardhu, it's used
to access the PMU and EEPROM, as well as the audio codec, temp
sensor, and fuel gauge devices from the OS.

Signed-off-by: Tom Warren <twarren@nvidia.com>
2013-01-16 13:40:08 -07:00
Tom Warren
79ce91bade Tegra30: Cardhu: Add DT files
These are stripped down for bringup, They'll be filled out later
to match-up with the kernel DT contents, and/or as devices are
brought up (mmc, usb, spi, etc.).

Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2013-01-16 13:40:08 -07:00
Simon Glass
77139f5170 tegra: fdt: Add LCD definitions for Seaboard
The Seaboard has a 1366x768 16bpp LCD. The backlight is controlled
by one of the PWMs.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-11-19 08:15:39 -07:00
Stephen Warren
56f42f85f5 ARM: tegra: Whistler: remove unused USB alias
Port USB1 on Whistler is intended as a device port for USB recovery.
Whistler's DT currently contains an alias for this USB port, even though
Whistler's config doesn't enable multiple USB controllers, so the alias
is unused. Remove the unused alias for consistency for now. Similar,
explicitly disable the port in the device tree too.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-10-29 09:07:05 -07:00
Stephen Warren
699c40e878 ARM: tegra: Harmony: enable ULPI USB port
The ULPI port is routed onto pins on the mini PCI Express connector. A
standard breakout board may be used to access the port.

* Add required DT entries to configure the ULPI port.
* Setup up the ULPI pinmux in the board code.
* Enable multiple USB controller and ULPI support in the board config.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-10-29 09:07:04 -07:00
Stephen Warren
9614a1e963 tegra: enable NAND on Harmony
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-09-07 13:54:31 -07:00
Simon Glass
7cedd1811a tegra: fdt: Add NAND definitions to fdt
Add a flash node to handle the NAND, including memory timings and
page / block size information.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-09-07 13:54:30 -07:00
Allen Martin
00a2749d7b tegra20: rename tegra2 -> tegra20
This is make naming consistent with the kernel and devicetree and in
preparation of pulling out the common tegra20 code.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-09-01 14:58:21 +02:00
Stephen Warren
b1b9e4ce3a tegra: ventana: add own device tree, enable USB
Add a device tree for Ventana; the Seaboard file no longer represents
the HW present on Ventana.

Enable USB on Ventana.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-07-07 14:07:19 +02:00
Stephen Warren
f3d93309c1 tegra: harmony: add device tree support
... to enable USB host support, which enables Ethernet support.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-07-07 14:07:19 +02:00
Stephen Warren
d5ebc937c9 tegra: Whistler board support
Whistler is a highly configurable Tegra evaluation and development board.
This change adds support for the following specific configuration:

E1120 motherboard
E1108 CPU board
E1116 PMU board

The motherboard configuration switches are set as follows:
SW1=0 SW2=0 SW3=5
S1/S2/S3/S4 all on, except S3 7/8 are off.

Other combinations of daugher boards may work to varying degrees, but will
likely require some SW adjustment.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-07-07 14:07:17 +02:00
Anton Staff
c3ab91f064 tegra: fdt: Add keyboard definitions for Seaboard
Seaboard uses a QUERTY keyboard. We add key codes for this to
enable key scanning to work.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-05-15 08:31:40 +02:00
Simon Glass
d376e8d228 tegra: fdt: Add EMC data for Tegra2 Seaboard
This adds timings for T20 and T25 Seaboards, using the bindings found here:

http://patchwork.ozlabs.org/patch/132928/

We supply both full speed options for normal running, and half speed options
for testing / development.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-05-15 08:31:39 +02:00
Simon Glass
3682cc3d2c tegra: i2c: Select I2C ordering for Seaboard
Select the port ordering for I2C on Seaboard.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-03-29 08:12:50 +02:00
Simon Glass
1920172ec8 tegra: usb: fdt: Add USB definitions for Tegra2 Seaboard
We set up two USB ports, one of which can be host or device.
For some reason the kernel version does enable both ports.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-03-29 08:12:48 +02:00
Simon Glass
cd474cbae6 tegra: fdt: Add clock bindings for Tegra2 Seaboard
Add the definition of the oscillator clock frequency and the 32KHz clock.
The latter is provided by a PMIC on I2C which we don't actually use at
present, but we expect this definition to be used in the kernel and want
to keep our .dts the same.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-03-29 08:12:48 +02:00
Simon Glass
6710b5b5fd tegra: fdt: Add device tree file for Tegra2 Seaboard from kernel
This was taken from commit b48c54e2 at:
git://git.kernel.org/pub/scm/linux/kernel/git/olof/tegra.git

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-03-29 08:12:47 +02:00