3 commits

Author	SHA1	Message	Date
Bin Meng	31a2dc6955	x86: pci: Assign pci irqs to all functions ... We need walk through all functions within a PCI device and assign their IRQs accordingly. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>	2015-07-28 10:36:22 -06:00
Bin Meng	283a08e52a	x86: Check PIRQ routing table sanity in the F segment ... Previously the PIRQ routing table sanity check was performed against the original table provided by the platform codes. Now we switch to check its sanity on the final table in the F segment as this one is the one seen by the OS. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>	2015-04-29 18:51:50 -06:00
Bin Meng	b5b6b01960	x86: Support platform PIRQ routing ... On x86 boards, platform chipset receives up to four different interrupt signals from PCI devices (INTA/B/C/D), which in turn will be routed to chipset internal PIRQ lines then routed to 8259 PIC finally if configuring the whole system to work under the so-called PIC mode (in contrast to symmetric IO mode which uses IOAPIC). We add two major APIs to aid this, one for routing PIRQ and the other one for generating a PIRQ routing table. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>	2015-04-29 18:51:49 -06:00