Commit graph

466 commits

Author SHA1 Message Date
Ashish Kumar
9454fee460 mtd: spi: Add micron mt35xu512aba and mt35xu02g flash ID
mt35xu512aba and mt35xu02g suports Single I/O and OCTAL I/O
also enable use of SPI_NOR_4B_OPCODES.

These flashes are tested on LX2160ARDB and LS1028ARDB respectively

Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
[jagan: suffix 'ba' on part name and update commit message]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-07-22 16:57:23 +05:30
Ashish Kumar
8385520f29 mtd: spi: Add flash property for Micron mt25qu512a
mt25qu512a is rebranded after its spinoff from STM, so it is
different only in term of extended jedec ID, initial JEDEC id
is same as that of n25q512a.In order to avoid any confussion
with respect to name new entry is added.

This flash is tested for Single I/O mode on LS1046FRWY although
it also support QUAD I/O.

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-07-18 17:11:16 +05:30
Weijie Gao
60e2bf4678 mtd: spi-nor: fix page program issue when using spi-mem driver
Some SPI controllers can't write nor->page_size bytes in a single step
because their TX FIFO is too small, but when that happens we should
make sure a WRITE_EN command before each write access and READ_SR command
after each write access is issued.

We should allow nor->write() to return a size that is smaller than the
requested write size to gracefully handle this case.

Also, the spi_nor_write_data() should return the actual number of bytes
that were written during the spi_mem_exec_op() operation.

This patch is a combination of two commits backported from kernel:

  commit 630d6bd8a3b4 ("mtd: spi-nor: Support controllers with limit ...")
  commit 3baa8ec88c2f ("mtd: devices: m25p80: Make sure WRITE_EN is ...")

Cc: Vignesh R <vigneshr@ti.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Acked-by: Vignesh R <vigneshr@ti.com>
Tested-by: Shyam Saini <shyam.saini@amarulasolutions.com> # microzed
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2019-05-03 15:26:12 +05:30
Neil Armstrong
30b9a28a3f mtd: spi-nor-ids: Add Gigadevice gd25lq128 ID
This adds support for the Gigadevice gd25lq128 ID needed on the
upcoming libretech-ac board.

SPI_NOR_QUAD_READ is not set since it has not been tested in Quad
mode.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-12 18:41:33 +05:30
Patrick Delaunay
b0cc1b846f dm: spi: Read default speed and mode values from DT
This patch update the behavior introduced by
commit 96907c0fe5 ("dm: spi: Read default speed and mode values from DT")

In case of DT boot, don't read default speed and mode for SPI from
CONFIG_* but instead read from DT node. This will make sure that boards
with multiple SPI/QSPI controllers can be probed at different
bus frequencies and SPI modes.

Remove also use in boards of the value speed=0 (no more supported)
for ENV in SPI by using CONFIG_ENV_SPI_MAX_HZ=0.

DT values will be always used when available (full DM support of
SPI slave with available DT node) even if speed and mode are requested;
for example in splash screen support (in splash_sf_read_raw)
or in SPL boot (in spl_spi_load_image).
The caller of spi_get_bus_and_cs() no more need to force speed=0.

But the current behavior don't change if the SPI slave is not
present (device with generic driver is created automatically)
or if platdata is used (CONFIG_OF_PLATDATA).

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-12 11:54:50 +05:30
Marek Vasut
f909ddb3e1 mtd: spi: Replace ad-hoc default implementation with spi_mem_op
Replace the ad-hoc erase operation implementation with a simple spi_mem_op
implementation of the same functionality. This is a minor optimization and
removal of the ad-hoc code.

This however also changes the behavior of the execution of the erase
opcode from two separate transfer requests to the SPI NOR driver to
one transfer request to the SPI NOR driver. The former was how U-Boot
behaved before the SPI NOR framework was imported and the later was
introduced by the SPI NOR framework. The former is more optimal, so
keep that.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Horatiu Vultur <horatiu.vultur@microchip.com>
Cc: Jagan Teki <jagan@openedev.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Vignesh R <vigneshr@ti.com>
Tested-by: Ashish Kumar <Ashish.kumar@nxp.com>
2019-04-12 11:42:48 +05:30
Marek Vasut
3d2f12c4a1 mtd: spi: Add Macronix MX66U2G45F device
Add Macronix MX66U2G45F flash device description.
This is a 256 MiB part.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Vignesh R <vigneshr@ti.com>
[jagan: use 'g' instead of 'f' in flash name]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-12 10:56:25 +05:30
Neil Armstrong
cd35365762 mtd: sf_probe: remove spi-flash compatible
Now the "spi-flash" compatible has been removed in the DTS files,
remove this compatible from sf_probe to finally use the Linux "jedec,spi-nor"
compatible.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2019-04-12 10:54:27 +05:30
Heiko Schocher
a2dc8b1832 mtd: add spi flash id s25fl064l
Add support for SPANSION s25fl064l

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Acked-by: Vignesh R <vigneshr@ti.com>
2019-04-12 10:54:27 +05:30
Patrick Delaunay
14453fbfad Convert CONFIG_SF_DEFAULT_* to Kconfig
This converts the following to Kconfig:
  CONFIG_SF_DEFAULT_BUS
  CONFIG_SF_DEFAULT_CS
  CONFIG_SF_DEFAULT_MODE
  CONFIG_SF_DEFAULT_SPEED

I use moveconfig script and then manual check on generated u-boot.cfg
to solve the remaining issue.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-03-25 17:36:53 -04:00
Vignesh R
778572d7cb mtd: spi: Add lightweight SPI flash stack for SPL
Add a tiny SPI flash stack that just supports reading data/images from
SPI flash. This is useful for boards that have SPL size constraints and
would need to use SPI flash framework just to read images/data from
flash. There is approximately 1.5 to 2KB savings with this.

Based on prior work of reducing spi flash id table by
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>

Signed-off-by: Vignesh R <vigneshr@ti.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Stefan Roese <sr@denx.de>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
2019-02-07 15:33:21 +05:30
Vignesh R
5b66fdb29d mtd: spi: Remove unused files
spi_flash and spi_flash_ids are no longer needed after SPI NOR
migration. Remove them.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Stefan Roese <sr@denx.de>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
2019-02-07 15:33:21 +05:30
Vignesh R
c4e8862308 mtd: spi: Switch to new SPI NOR framework
Switch spi_flash_* interfaces to call into new SPI NOR framework via MTD
layer. Fix up sf_dataflash to work in legacy way. And update sandbox to
use new interfaces/definitions

Signed-off-by: Vignesh R <vigneshr@ti.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Stefan Roese <sr@denx.de>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
2019-02-07 15:33:21 +05:30
Vignesh R
2ee6705be0 mtd: spi: sf_probe: Add "jedec, spi-nor" compatible string
Linux uses "jedec,spi-nor" as compatible string for JEDEC compatible
SPI Flash device nodes. Therefore make U-Boot also to look for the same
compatible string so that we can use Linux DTS files as is.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Stefan Roese <sr@denx.de>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
2019-02-07 15:33:21 +05:30
Vignesh R
8c927809ea mtd: spi: spi-nor-core: Add back U-Boot specific features
For legacy reasons, we will have to keep around U-Boot specific
SPI_FLASH_BAR and SPI_TX_BYTE. Add them back to the new framework

Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
2019-02-07 15:33:21 +05:30
Vignesh R
0c6f187cdb mtd: spi: spi-nor-core: Add SFDP support
Sync Serial Flash Discoverable Parameters (SFDP) parsing support from
Linux. This allows auto detection and configuration of Flash parameters.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Stefan Roese <sr@denx.de>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
2019-02-07 15:33:21 +05:30
Vignesh R
61059bc55a mtd: spi: spi-nor-core: Add 4 Byte addressing support
Sync changes from Linux SPI NOR framework to add 4 byte addressing
support. This is required in order to support flashes like MT35x
that no longer support legacy Bank Address Register(BAR) way of accessing
>16MB region.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Stefan Roese <sr@denx.de>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
2019-02-07 15:33:21 +05:30
Vignesh R
492e65b29b mtd: spi: spi-nor-core: Add SPI MEM support
Many SPI controllers have special MMIO interfaces which provide
accelerated read/write access but require knowledge of flash parameters
to make use of it. Recent spi-mem layer provides a way to support such
controllers.
Therefore, add spi-mem support to spi-nor-core as a way to support SPI
controllers with MMIO interface. SPI MEM layer takes care of translating
spi_mem_ops to spi_xfer()s in case of legacy SPI controllers.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Stefan Roese <sr@denx.de>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
2019-02-07 15:33:21 +05:30
Vignesh R
7aeedac015 mtd: spi: Port SPI NOR framework from Linux
Current U-Boot SPI NOR support (sf layer) is quite outdated as it does not
support 4 byte addressing opcodes, SFDP table parsing and different types of
quad mode enable sequences. Many newer flashes no longer support BANK
registers used by sf layer to a access >16MB of flash address space.
So, sync SPI NOR framework from Linux v4.19 that supports all the
above features. Start with basic sync up that brings in basic framework
subsequent commits will bring in more features.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Stefan Roese <sr@denx.de>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
2019-02-07 15:33:21 +05:30
Tom Rini
9450ab2ba8 Merge branch 'master' of git://git.denx.de/u-boot-spi
- Various MTD fixes from Boris
- Zap various unused / legacy paths.
- pxa3xx NAND update from Miquel

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-12-05 15:06:24 -05:00
Boris Brezillon
08898e8b22 mtd: sf: Make sf_mtd.c more robust
SPI flash based MTD devs can be registered/unregistered at any time
through the sf probe command or the spi_flash_free() function.

This commit does not try to fix the root cause as it would probably
require rewriting most of the code and have an mtd_info object
instance per spi_flash object (not to mention that the the spi-flash
layer is likely to be replaced by a spi-nor layer ported from Linux).

Instead, we try to be as safe as can be by checking the code returned
by del_mtd_device() and complain loudly when there's nothing we can
do about the deregistration failure. When that happens we also reset
sf_mtd_info.priv to NULL, and check for NULL pointer in the mtd hooks
so that -ENODEV is returned instead of hitting a NULL pointer
dereference exception when the MTD instance is later accessed by a user.

Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Tested-by: Heiko Schocher <hs@denx.de>
2018-12-06 00:45:36 +05:30
Boris Brezillon
7371944a71 mtd: sf: Unregister the MTD device prior to removing the spi_flash obj
The DM implementation of spi_flash_free() does not unregister the MTD
device before removing the spi dev object. This leads to a use-after-free
bug when the MTD device is later accessed by a MTD user (observed when
attaching the device to UBI after env_sf_load() has called
spi_flash_free()).

Implement ->remove() and call spi_flash_mtd_unregister() from there.

Fixes: 9fe6d8716e ("mtd, spi: Add MTD layer driver")
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Tested-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-12-06 00:45:36 +05:30
Boris Brezillon
492151b209 mtd: sf: Make sure we don't register the same device twice
spi_flash_mtd_register() can be called several times and each time it
will register the same mtd_info instance like if it was a new one.
The MTD ID allocation gets crazy when that happens, so let's track the
status of the sf_mtd_info object to avoid that.

Fixes: 9fe6d8716e ("mtd, spi: Add MTD layer driver")
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Tested-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-12-06 00:45:36 +05:30
Simon Glass
a58986ca8b sf: Add a method to obtain the block-protect setting
It is useful to obtain the block-protect setting of the SPI flash, so we
know whether it is fully open or (perhaps partially) write-protected. Add
a method for this. Update the sandbox driver to process this operation and
add a test.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-11-20 19:14:22 -07:00
Tom Rini
e6cd05e502 Merge branch 'master' of git://git.denx.de/u-boot-spi 2018-10-12 11:54:13 -04:00
Ashish Kumar
5c391486b4 sf: Add MICRON manufacturer id
NOR flash name MT35X_QLKA and MT25Q_** used on NXP board has
manufacturer id as 0x2C, which are rather for newer flashes
after the split of Micron from ST.

So macro for this micron manufacturer id.

Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
[jagan: updated commit message]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-10-12 11:37:49 +05:30
Simon Glass
5e24a2ef8b dm: spi: Add logging of some return values
When SPI flash operations fail it is helpful to be able to see the error
codes and where they are generated. Add logging to capture this
information for read operations.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:27 -06:00
Simon Glass
97f57109bb sf: Avoid allocating memory on every read operation
At present spi_flash_cmd_read_ops() allocates and frees a few bytes of
memory every time it is called. It is faster to use the stack for this
and this is now supported by the minimum GCC version required by U-Boot.

Remove the allocation and use a variable-sized array instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:27 -06:00
Simon Glass
66613f5dd2 dm: spi: Clean up detection of sandbox SPI emulator
Now that we don't have to deal with the command-line flag we can simplify
the code for detecting the emulator. Remove the lookup based on the SPI
specification, relying just on the device tree to locate the emulator.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:27 -06:00
Simon Glass
c3aed5db59 sandbox: spi: Add more logging
Add logging to aid debugging features in these drivers. Also drop some
code in sandbox_spi_xfer() which is not used.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:27 -06:00
Simon Glass
1289e96797 sandbox: spi: Drop command-line SPI option
At present we support specifying SPI flash devices to use in the device
tree and on the command line. Drop the second option, since it is a pain
to support nicely with driver model, and unnecessary.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:26 -06:00
Stefan Roese
881e4fc206 sf: Add XMC xm25qh64a and xm25qh128a entries
This patch adds support for 2 new XMC (Wuhan Xinxin Semiconductor
Manufacturing Corp) SPI NOR chips.

This support can be enabled by selecting the SPI_FLASH_XMC Kconfig
option.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-10-04 18:21:23 +05:30
Michal Simek
13f451bf56 spi: Kconfig: Create ISSI Kconfig entry
Add ISSI to Kconfig to make it selectable via menuconfig.
Also convert all current platforms.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-08-06 08:44:35 +02:00
Clément Laigle
04d57b1d58 mtd: add spi flash id s25fl128l
Add support for SPANSION s25fl128l

Signed-off-by: Clément Laigle <c.laigle@catie.fr>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
[jagan: fixed , at the end of } ]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-08-03 11:09:53 +05:30
Ludwig Zenz
51b2411946 sf: add paired dev info for winbond w25q16jv
This commit adds paired dev info for winbond w25q16jv
(tested w25q16jvssiq with a i.mx6 board)

Signed-off-by: Ludwig Zenz <lzenz@dh-electronics.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-07-16 14:17:13 +05:30
Ludwig Zenz
70cff76c38 sf: add Macronix mx25l1633e entry
Add support for the Macronix mx25l1633e nor flash. (Tested on a imx6 board)

Signed-off-by: Ludwig Zenz <lzenz@dh-electronics.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-07-16 14:14:42 +05:30
Ludwig Zenz
b1360e2fc9 sf: add Gigadevice gd25q16c entry
Add support for the Gigadevice gd25q16c nor flash. (Tested on a imx6 board)

Signed-off-by: Ludwig Zenz <lzenz@dh-electronics.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-07-16 14:14:42 +05:30
Hannes Schmelzer
760b75564f spi_flash: add a bunch of winbond flashes to id-table
This commit adds the following flashes to the id-table

- W25Q16JV
- W25Q32JV
- W25Q64JV
- W25Q128JV
- W25Q256JV

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-07-16 14:05:50 +05:30
Simon Glass
008dcddf99 dm: spi: Update sandbox SPI emulation driver to use ofnode
Update the parameters sandbox_sf_bind_emul to support livetree.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-07-09 09:11:00 -06:00
Marek Vasut
069b746ad9 sf: Enable FSR polling on N25Q256(A)
The N25Q256(A) datasheet clearly states that this device does have
a Flag Status Register and does update FSR PEC bit 7 during Program
and Erase cycles to indicate the cycle is in progress. Enable the
FSR PEC bit polling on this device to prevent data corruption.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Jagan Teki <jagan@openedev.com>
Cc: Tom Rini <trini@konsulko.com>
2018-06-28 19:58:40 +05:30
Ashish Kumar
51dce7d2bf mtd: spi: Correct parameters for s25fs512s flash
Change sector size to 256KiB in table spi_flash_ids.

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-06-25 15:50:33 +05:30
Simon Glass
fb95283931 spi: sandbox: Fix memory leak in sandbox_sf_bind_emul()
Move the strdup() call so that it is only done when we know we will bind
the device.

Reported-by: Coverity (CID: 131216)

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-06-19 07:31:44 -04:00
Carlo Caione
b1f2b72e39 sf: Add support for gd25q32b gigadevice flash
This flash IC is used in some chromebook models
manufactured by Bitland.

Signed-off-by: Carlo Caione <carlo@endlessm.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-06-04 23:40:04 +05:30
Marek Vasut
8ff4130deb sf: Set current flash bank to 0 in clean_bar()
The clean_bar() function resets the SPI NOR BAR register to 0, but
does not set the flash->curr_bar to 0 , therefore those two can get
out of sync, which could ultimatelly result in corrupted flash content.

The simplest test case is this:

  => mw 0x10000000 0x1234abcd 0x4000
  => sf probe
  => sf erase 0x1000000 0x10000
  => sf write 0x10000000 0x1000000 0x10000

  => sf probe ; sf read 0x12000000 0 0x10000 ; md 0x12000000

That is, erase a sector above the 16 MiB boundary and write it with
random pre-configured data. What will actually happen without this
patch is the sector will be erased, but the data will be written to
BAR 0 offset 0x0 in the flash.

This is because the erase command will call write_bar()+clean_bar(),
which will leave flash->bank_curr = 1 while the hardware BAR registers
will be set to 0 through clean_bar(). The subsequent write will also
trigger write_bar()+clean_bar(), but write_bar checks if the target
bank == flash->bank_curr and if so, does NOT reconfigure the BAR in
the SPI NOR. Since flash->bank_curr is still 1 and out of sync with
the HW, the condition matches, BAR programming is skipped and write
ends up at address 0x0, thus corrupting flash content.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-06-04 23:31:37 +05:30
Marek Vasut
a2569f12f0 sf: Add Macronix MX25U25635F ID
Add ID for the Macronix MX25U25635F flash.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-29 10:05:52 +05:30
Marek Vasut
d8c16849a9 sf: Add Winbond W25Q256 ID
Add ID for the Winbond W25Q256 flash.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-29 10:05:32 +05:30
Ashish Kumar
4eaa2fa169 sf: Default page size Spansion flash "S25FS512S" is 256b
page size for JEDEC EXT starting 0x4d00 is 512b,
except JEDEC ID 0x215, 0x216 and 0x220

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
[jagan: added proper commit message]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-16 18:56:49 +05:30
Kimmo Rautkoski
39b9e9bc72 sf: Add support for ISSI is25wp
Added support for is25wp032, is25wp064 and is25wp128.

Signed-off-by: Kimmo Rautkoski <ext-kimmo.rautkoski@vaisala.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-05-16 18:50:25 +05:30
Tom Rini
83d290c56f SPDX: Convert all of our single license tags to Linux Kernel style
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-05-07 09:34:12 -04:00
Tom Rini
d024236e5a Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR
We have a large number of places where while we historically referenced
gd in the code we no longer do, as well as cases where the code added
that line "just in case" during development and never dropped it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-04-27 14:54:48 -04:00