Commit graph

2017 commits

Author SHA1 Message Date
Heiko Schocher
76756e41cd ppc: cleanup compiler errors/warnings
Current u-boot top of tree builds with warnings/errors for
the following boards:

ads5121 cpci5200 mecp5200 v38b IAD210 MBX MBX860T NX823
RPXClassic debris PN62

following patch solves this.

Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Mike Frysinger <vapier@gentoo.org>
2009-03-27 20:23:32 +01:00
Wolfgang Denk
aaa0e0812f Merge branch 'master' of git://git.denx.de/u-boot-at91 2009-03-26 22:27:45 +01:00
Jon Smirl
33e88c557b mpc5200: suppress printf until console initialized
On boards which have the environment in eeprom, i2c_init() is called
before the console and RAM are initialized.
Suppress printfs until the console is initialized.

Signed-off-by: Jon Smirl <jonsmirl@gmail.com>
Acked-by: Heiko Schocher <hs@denx.de>
2009-03-25 22:50:04 +01:00
Mike Frysinger
74398b23f9 Blackfin: put memory into self-refresh before/after programming clocks
When initializing the core clocks, stick external memory into self-refresh.
This gains us a few cool things:
 - support suspend-to-RAM with Linux
 - reprogram clocks automatically when doing "go" on u-boot.bin in RAM
 - make sure settings are stable before flashing new version
 - finally fully unify initialize startup code path between LDR/non-LDR

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-03-23 15:14:55 -04:00
Mike Frysinger
d347d572ab Blackfin: do not program voltage regulator on parts that do not have one
Some newer Blackfins (like the BF51x) do not have an on-chip voltage
regulator, so do not attempt to program the memory as if it does.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-03-23 15:14:55 -04:00
Mike Frysinger
0d4f24b70f Blackfin: setup a sane default EBIU_SDBCTL for SDRAM controllers
If the board config does not specify an explicit EBIU_SDBCTL value, set it
up with sane values based on other configuration options.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-03-23 15:14:54 -04:00
Mike Frysinger
3986e981f5 Blackfin: handle reboot anomaly 432
Workaround anomaly 432:
The bfrom_SysControl() firmware function does not clear the SIC_IWR1
register before executing the PLL programming sequence.  Therefore, any
interrupt enabled in the SIC_IWR1 register prior to the call to
bfrom_SysControl() can prematurely terminate the idle sequence required
for the PLL to relock properly. SIC_IWR0 is properly handled.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-03-23 15:14:54 -04:00
Mike Frysinger
7e1d212b6d Blackfin: kill off LDR jump block
The Boot ROM uses EVT1 as the entry point so set that rather than having
to use a tiny jump block in the default EVT1 location.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-03-23 15:14:54 -04:00
Mike Frysinger
a75fa148d6 Blackfin: simplify symbol_lookup() a bit
No need to skip a byte as the symbol table handles this.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-03-23 15:14:54 -04:00
Mike Frysinger
2decc2a8d1 Blackfin: mark bfin_reset static
The function is only used locally, so mark it static.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-03-23 15:14:52 -04:00
Mike Frysinger
e82b762f29 Blackfin: fix jtag console tstc
The jtag tstc operation was checking the hardware to see if data is
available from it (which is fine for the jtag getc operation), but the
higher layers need to know whether any data is available.  Since we have
to read up to 4 bytes at a time from the hardware, the higher layers need
to know they can consume the cached bytes as well.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-03-23 15:14:52 -04:00
Haavard Skinnemoen
8206bfae3a Merge branch 'mimc200' 2009-03-23 10:22:41 +01:00
Nicolas Ferre
df486b1fa3 at91: Support for the at91sam9g20 : Atmel 400Mhz ARM 926ej-s SOC.
AT91sam9g20 is an evolution of the at91sam9260 with a faster clock speed.

The AT91SAM9G20-EK board is an updated revision of the AT91SAM9260-EK board.
It is essentially the same, with a few minor differences.

Here is the chip page on Atmel website:
http://www.atmel.com/dyn/products/product_card.asp?part_id=4337

Signed-off-by: Justin Waters <justin.waters@timesys.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-03-22 14:48:16 +01:00
Jean-Christophe PLAGNIOL-VILLARD
e2c0476f95 at91sam9/at91cap: move common macb initialisation to cpu
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-03-22 13:22:14 +01:00
Jean-Christophe PLAGNIOL-VILLARD
f3f91f886b at91sam9/at91cap: move common usb host initialisation to cpu
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-03-22 13:22:11 +01:00
Jean-Christophe PLAGNIOL-VILLARD
a484b00b86 at91sam9/at91cap: move common led management to cpu
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-03-22 13:22:08 +01:00
Jean-Christophe PLAGNIOL-VILLARD
7ebafb7ec1 at91sam9/at91cap: move common spi initialisation to cpu
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-03-22 13:22:06 +01:00
Jean-Christophe PLAGNIOL-VILLARD
1332a2a069 at91sam9/at91cap: move common serial initialisation to cpu
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-03-22 13:22:03 +01:00
Grzegorz Bernacki
5c4fa9b474 Add support for the digsy MTC board.
This is the InterControl custom device based on the MPC5200B chip.

Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
2009-03-20 22:39:14 +01:00
Stefan Roese
9cd690160d ppc4xx: Don't write the MAC address into the internal SoC registers
Remove this code. It's not needed. The 4xx EMAC driver stores the MAC
addresses into the SoC registers instead.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-03-20 22:39:14 +01:00
Graeme Russ
e17ee157ca Add basic relocation to i386 port
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
2009-03-20 22:39:13 +01:00
Graeme Russ
8c63d47651 Implement SC520 timers
Signed-off-by: Graeme Russ <graeme.russ at gmail.com>
2009-03-20 22:39:13 +01:00
Graeme Russ
6d7f610b09 Factor out SC520 sub-features
Moved sub-features of the SC520 code which is currently selectively compiled
using #ifdef out of sc520.c into individual files selectively compiled via
the makefile

Signed-off-by: Graeme Russ <graeme.russ at gmail.com>
2009-03-20 22:39:13 +01:00
Graeme Russ
abf0cd3dff Rewrite i386 interrupt handling
Rewrite interrupt handling functionality for the i386 port. Separated
functionality into separate CPU and Architecture components.

It appears as if the i386 interrupt handler functionality was intended
to allow multiple handlers to be installed for a given interrupt.
Unfortunately, this functionality was not fully implemented and also
had the problem that irq_free_handler() does not allow the passing
of the handler function pointer and therefore could never be used to
free specific handlers that had been installed for a given IRQ.

There were also various issues with array bounds not being fully
tested.

I had two objectives in mind for the new implementation:

1) Keep the implementation as similar as possible to existing
   implementations. To that end, I have used the leon2/3
   implementations as the reference

2) Seperate CPU and Architecture specific elements. All specific i386
   interrupt functionality is now in cpu/i386/ with the high level
   API and architecture specific code in lib_i386. Functionality
   specific to the PC/AT architecture (i.e. cascaded i8259 PICs) has
   been further split out into an individual file to allow for the
   implementation of the PIC architecture of the SC520 CPU (supports
   more IRQs)

Signed-off-by: Graeme Russ <graeme.russ at gmail.com>
2009-03-20 22:39:13 +01:00
Graeme Russ
6d83e3ac61 Rename SC520 Configuration Options
Options are now all uniformly CONFIG_SYS_SC520_<option>

Signed-off-by: Graeme Russ <graeme.russ at gmail.com>
2009-03-20 22:39:12 +01:00
Trent Piepho
f62fb99941 Fix all linker script to handle all rodata sections
A recent gcc added a new unaligned rodata section called '.rodata.str1.1',
which needs to be added the the linker script.  Instead of just adding this
one section, we use a wildcard ".rodata*" to get all rodata linker section
gcc has now and might add in the future.

However, '*(.rodata*)' by itself will result in sub-optimal section
ordering.  The sections will be sorted by object file, which causes extra
padding between the unaligned rodata.str.1.1 of one object file and the
aligned rodata of the next object file.  This is easy to fix by using the
SORT_BY_ALIGNMENT command.

This patch has not be tested one most of the boards modified.  Some boards
have a linker script that looks something like this:

*(.text)
. = ALIGN(16);
*(.rodata)
*(.rodata.str1.4)
*(.eh_frame)

I change this to:

*(.text)
. = ALIGN(16);
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))

This means the start of rodata will no longer be 16 bytes aligned.
However, the boundary between text and rodata/eh_frame is still aligned to
16 bytes, which is what I think the real purpose of the ALIGN call is.

Signed-off-by: Trent Piepho <xyzzy@speakeasy.org>
2009-03-20 22:39:12 +01:00
Mike Frysinger
740e8ba7d4 npe: get mac address from environment
The environment is the canonical storage location of the mac address, so
we're killing off the global data location and moving everything to
querying the env directly.

The resulting code can also be simplified even further.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
CC: Stefan Roese <sr@denx.de>
CC: Ben Warren <biggerbadderben@gmail.com>
2009-03-20 22:39:11 +01:00
Mike Frysinger
6bacfa6a8e cpu/: get mac address from environment
The environment is the canonical storage location of the mac address, so
we're killing off the global data location and moving everything to
querying the env directly.

The cpus that get converted here:
	at91rm9200
	mpc512x
	mpc5xxx
	mpc8260
	mpc8xx
	ppc4xx

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
CC: Ben Warren <biggerbadderben@gmail.com>
CC: John Rigby <jrigby@freescale.com>
CC: Stefan Roese <sr@denx.de>
2009-03-20 22:39:11 +01:00
Anatolij Gustschin
f8853d105d ppc4xx: Fix bug in PCI outbound map configuration for canyonlands
PCI outbound address map configuration doesn't match the
PCI memory address range covered by appropriate TLB entry
configuration for canyonlands causing machine check
exceptions while accessing PCI memory regions. This patch
provides a fix for this issue.

Kazuaki Ichinohe observed and reported this issue while
testing display output with PCI ATI video card on canyonlands.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-03-20 12:58:31 +01:00
Grzegorz Bernacki
6a397ef0e6 mpc52xx: Get rid of board-specific #ifdef's in cpu/mpc5xxx/ide.c
Total5200 and digsy MTC use I2C port 2 pins as a ATA chip select.
To avoid adding board-specific ifdefs to cpu/mpc5xxx/ide.c new
define CONFIG_SYS_ATA_CS_ON_I2C2 was introduced. It is used by
Total5200 and will be used by digsy MTC and other boards with
ATA CS on I2C pins.

Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
2009-03-18 20:54:56 +01:00
Heiko Schocher
506f391888 8xx, icache: enabling ICache not before running from RAM
with the new CONFIG_SYS_DELAYED_ICACHE config option, ICache
is not enabled before code runs from RAM.

Signed-off-by: Heiko Schocher <hs@denx.de>
2009-03-18 20:48:29 +01:00
TsiChung Liew
42b68af106 ColdFire: PLATFORM_CPPFLAGS updates for new compiler
Update PLATFORM_CPPFLAGS to accept 4.3.x version of
ColdFire compiler.

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2009-03-17 15:58:37 -06:00
TsiChung Liew
c3a9e63742 ColdFire: Fix M54451 serial boot dram setup
The serial boot dram extended/standard mode register was not
setup and was using default DRAM setup causing the U-boot was
unstable to boot up in serial mode.

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2009-03-17 15:58:37 -06:00
arun c
32d11d5815 Coldfire: XL Bus minor fixes
According to coldfire manual data timeout > address time out
also use correct macro to program XARB_CFG

Signed-off-by: Arun C <arunedarath@mistralsolutions.com>
2009-03-17 15:58:07 -06:00
Wolfgang Denk
e05825324a Merge branch 'master' of git://git.denx.de/u-boot-sh 2009-03-15 22:15:13 +01:00
Wolfgang Denk
45f93d4e3c Merge branch 'master' of git://git.denx.de/u-boot-mpc83xx 2009-03-15 22:12:10 +01:00
Wolfgang Denk
06ecf08847 Merge branch 'master' of git://git.denx.de/u-boot-arm 2009-03-15 22:09:18 +01:00
Wolfgang Denk
cd309029f2 Merge branch 'master' of git://git.denx.de/u-boot-pxa 2009-03-15 22:08:07 +01:00
Jerry Van Baren
394d30dd1e mpc83xx: Add bank configuration to FSL spd_sdram.c
The routine assumed 4 bank SDRAMs, enhance to configure for 4 or 8
bank SDRAMs.

Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
Acked-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-03-14 17:44:07 -05:00
Norbert van Bolhuis
b581626c1e mpc83xx: correctly set encryption and I2C bus 0 clock
This patch makes sure the correct mask is applied when setting
the encryption and I2C bus 0 clock in SCCR.
Failing to do so may lead to ENCCM being 0 in which case I2C bus 0
won't function.

Signed-off-by: Norbert van Bolhuis <nvbolhuis@aimvalley.nl>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-03-14 17:43:58 -05:00
Dirk Behme
e6a6a70415 OMAP3: Add support for OMAP3 die ID
Read and store OMAP3 die ID in U-Boot environment.

Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
2009-03-13 23:17:43 +01:00
Nobuhiro Iwamatsu
64f3c0b8ba sh: Add netdev header fixing of warning/build
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2009-03-12 23:58:30 +09:00
Ed Swarthout
0ee84b88b7 Fix mpc85xx ddr-gen3 ddr_sdram_cfg.
Commit e1be0d25, "32bit BUg fix for DDR2 on 8572" prevented other
sdram_cfg bits (such as ecc and self_refresh_in_sleep) from being set.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
2009-03-09 17:46:09 -05:00
Jean-Christophe PLAGNIOL-VILLARD
a922fdb87a PXA: timer use do_div and simplify it
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-03-09 12:01:32 +01:00
Wolfgang Denk
014c595f12 Merge branch 'master' of git://git.denx.de/u-boot-mpc83xx
Conflicts:
	lib_ppc/board.c

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-03-09 00:41:48 +01:00
Heiko Schocher
f70fd13e2f 8360, kmeter1: added bootcount feature.
add CONFIG_BOOTCOUNT_LIMIT feature for 8360 CPU.

The bootcounter uses 8 bytes from the muram,
because no other memory was found on this
CPU for the bootcount feature. So we must
correct the muram size in DTS before booting
Linux.

This feature is actual only implemented for
MPC8360, because not all 83xx CPU have qe,
and therefore no muram, which this feature
uses.

Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-03-05 18:21:30 -06:00
Dave Liu
5b0055547f 83xx: Fix some bugs in spd sdram code
1. RD_TO_PRE missed to add the AL, and need min 2 clocks for
  tRTP according to DDR2 JEDEC spec.
2. WRTORD - tWTR need min 2 clocks according to DDR2 JEDEC spec.
3. add the support of DDR2-533,667,800 DIMMs
4. cpo
5. make the AL to min to gain better performance.

The Micron MT9HTF6472CHY-667D1 DIMMs test passed on
MPC837xEMDS platform at 266MHz/333MHz/400MHz data rate.

items 1, 2 and 5:
Acked-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>

Reported-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-03-05 18:20:37 -06:00
Graeme Russ
f5a77a09c9 Moved SC520 Files (fix commit 407976185e)
Fixes commit 407976185e

Signed-off-by: Graeme Russ <graeme.russ at gmail.com>
2009-02-25 11:59:22 +01:00
Anton Vorontsov
50a4d08e8f mpc83xx: PCI: Fix hard-coded first_busno value
We should use pci_last_busno() in pci_init_bus(), otherwise we'll
erroneously re-use PCI0's first_busno for PCI1 hoses.

NOTE: The patch is untested. All MPC83xx FSL boards I have have
PCI1 in miniPCI form, for which I don't have any cards handy.

But looking in cpu/mpc85xx/pci.c:
...
#ifdef CONFIG_MPC85XX_PCI2
        hose = &pci_hose[1];

        hose->first_busno = pci_hose[0].last_busno + 1;

And considering that we do the same for MPC83xx PCI-E support,
I think this patch is correct.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-02-23 15:52:23 -06:00
Anton Vorontsov
a5878d4271 mpc83xx: PCI: Fix bus-range fdt fixups for PCI1 controllers
This patch fixes copy-paste issue: pci_hose[0]'s first and last
busnos were used to fixup pci1's nodes.

We don't see this bug triggering only because Linux reenumerate
buses anyway.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-02-23 15:52:12 -06:00