Commit graph

31947 commits

Author SHA1 Message Date
Marek Vasut
452a81e078 ddr: altera: Fix typo in mp_threshold1 programming
It is the configuration data that should go into the register,
not the register mask, just like the surrounding code does it.
Fix this typo.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Tom Rini <trini@konsulko.com>
2015-08-08 14:14:05 +02:00
Marek Vasut
42f7ebb82b ddr: altera: Move struct sdram_prot_rule prototype
Move the structure prototype from sdram.h header file into sdram.c
source file, since it is used only there and for local purpose only.
There is no point in having it global.

While at this move, fix the data types in the structure from uintNN_t
to uNN and fix the coding style a bit.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:05 +02:00
Marek Vasut
d04941cf33 arm: socfpga: Move sdram_config.h to board dir
This file is absolutelly positively board specific, so move it
into the correct place.

Signed-off-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:05 +02:00
Dinh Nguyen
cdd4e6cc37 arm: socfpga: enable the Altera SDRAM controller driver
Enable the Altera SDRAM driver for the SoCFPGA platform.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Acked-by: Marek Vasut <marex@denx.de>
2015-08-08 14:14:05 +02:00
Dinh Nguyen
3da428595e driver/ddr/altera: Add the sdram calibration portion
This patch adds the DDR calibration portion of the Altera SDRAM driver.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-08-08 14:14:05 +02:00
Dinh Nguyen
9bbd2132e3 driver/ddr/altera: Add DDR driver for Altera's SDRAM controller
This patch enables the SDRAM controller that is used on Altera's SoCFPGA
family. This patch configures the SDRAM controller based on a configuration
file that is generated from the Quartus tool, sdram_config.h.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-08-08 14:14:05 +02:00
Marek Vasut
9f76f105c7 net: designware: Rename the driver var name to eth_designware
The driver variable name is eth_sandbox, which is probably a copy-paste
mistake. Fix it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-08-08 14:14:05 +02:00
Marek Vasut
b9628595b4 net: designware: Add SoCFPGA GMAC DT compatible string
Add the OF compatible property to match the SoCFPGA GMAC.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-08-08 14:14:05 +02:00
Marek Vasut
9617ceb9cf arm: socfpga: Move generated files into qts subdir
Move all the files generated by Quartus into the qts/ subdir of the
board/altera/socfpga dir to make them explicitly separate from the
generic U-Boot code.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-08-08 14:14:04 +02:00
Marek Vasut
2e8fcc7e41 arm: dts: socfpga: Add mmc alias
Add alias for the SD/MMC controller, so it can be located by U-Boot OF support.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-08-08 14:14:04 +02:00
Marek Vasut
b09b72d83b arm: dts: socfpga: Fix SPI aliases
The SPI aliases are completely wrong. First, they point to non-existing
/spi@.* nodes instead of the correct /soc/spi@.* nodes. Second, the use
ad-hoc string instead of a handle. Furthermore, they are copied multiple
times in each board DTS.

So fix it such that we move these into socfpga.dtsi and make them use
the usual handles.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-08-08 14:14:04 +02:00
Marek Vasut
bfa89d2ba8 arm: socfpga: Fix FPGA bitstream programming routine
In case the FPGA bitstream is aligned to 4 bytes, skip the
part of the assembler which handles unaligned bitstream.
Otherwise, that part will loop indefinitelly.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-08-08 14:14:04 +02:00
Tom Rini
ae27120c31 Merge git://git.denx.de/u-boot-dm 2015-08-06 19:56:03 -04:00
Stephen Warren
f05fa6781a ARM: tegra: Add p2371-0000 board
P2371-0000 is a P2581 or P2530 CPU board married to a P2595 I/O
board. The combination contains SoC, DRAM, eMMC, SD card slot,
HDMI, USB micro-B port, Ethernet via USB3, USB3 host port, SATA,
a GPIO expansion header, and an analog audio jack.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-08-06 10:50:04 -07:00
Stephen Warren
b6920095c5 ARM: tegra: Add e2220-1170 board
E2220-1170 is a Tegra210 bringup board with onboard SoC, DRAM,
eMMC, SD card slot, HDMI, USB micro-B port, and sockets for various
expansion modules.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-08-06 10:50:03 -07:00
Stephen Warren
04037c8774 ARM: tegra: p2571: remove another unused define
CONFIG_MAX77620_POWER isn't used anywhere. Don't define it in p2571.h.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-08-06 10:50:03 -07:00
Alexandre Courbot
a38a3c4af4 ARM: tegra: enable GPU DT node when appropriate
T124/210 requires some specific configuration (VPR setup) to
be performed by the bootloader before the GPU can be used.
For this reason, the GPU node in the device tree is disabled
by default. This patch enables the node if U-boot has performed
VPR configuration.

Boards enabled by this patch are T124's Jetson TK1 and Venice2
and T210's P2571.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Tom Warren <twarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-08-06 10:50:03 -07:00
Alexandre Courbot
871d78ed1b ARM: tegra: move VPR configuration to a later stage
U-boot is responsible for enabling the GPU DT node after all necessary
configuration (VPR setup for T124) is performed. In order to be able to
check whether this configuration has been performed right before booting
the kernel, make it happen during board_init().

Also move VPR configuration into the more generic gpu.c file, which will
also host other GPU-related functions, and let boards specify
individually whether they need VPR setup or not.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Tom Warren <twarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-08-06 10:50:03 -07:00
Stephen Warren
95486f843b ARM: tegra: add comment re: autogeneration to pinmux headers
Add a comment block to the top of each generated Tegra pinmux header file
indicating that the file was auto-generated, should not be manually
edited, and with a pointer to the tool and command used to generate it.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-08-06 10:50:02 -07:00
Stephen Warren
424afc0a95 ARM: tegra: restrict usable RAM size further
Additionally, ARM64 devices typically run a secure monitor in EL3 and
U-Boot in EL2, and set up some secure RAM carve-outs to contain the EL3
code and data. These carve-outs are located at the top of 32-bit address
space. Restrict U-Boot's RAM usage to well below the location of those
carve-outs. Ideally, we would the secure monitor would inform U-Boot of
exactly which RAM it could use at run-time. However, I'm not sure how to
do that at present (and even if such a mechanism does exist, it would
likely not be generic across all forms of secure monitor).

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-08-06 10:50:02 -07:00
Simon Glass
fac971b2b5 exynos: dts: Correct LDO and BUCK naming
At present lower case is used for the regulator names in the device tree.
The kernel uses upper case and U-Boot will require this also since it will
move to a case-sensitive name check.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-06 07:44:30 -06:00
Simon Glass
bbbe55f6f2 x86: Enable debug UART for Minnowmax
Enable the debug UART and emit a single 'a' early in the init sequence to
show that it is working.

Unfortunately the debug UART implementation needs a stack to work. I cannot
seem to remove this limitation as the absolute 'jmp %eax' instruction goes
off into the weeds.

So this means that the character output cannot be any earlier than
car_init_ret, where memory is available for a stack.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
2015-08-06 07:44:30 -06:00
Simon Glass
74356d7fb1 dm: core: Fix a typo in the uclass_get_device_by_name() comment
This function comment has a typo. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2015-08-06 07:44:30 -06:00
Simon Glass
f5c67ea036 dm: core: Add a way to set a device name
Some devices are bound entirely by probing and do not have the benefit of
a device tree to give them a name. This is very common with PCI and USB. In
most cases this is fine, but we should add an official way to set a device
name. This should be called in the device's bind() method.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2015-08-06 07:44:29 -06:00
Simon Glass
c3e6847bb3 sandbox: Enable devres subsystem
This should be used for sandbox. We can convert at least one driver to use
it, but in the meantime, enable the feature so that the code is
build-tested.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-06 07:44:29 -06:00
Masahiro Yamada
40b6f2d020 devres: add debug command to dump device resources
This new command can dump all device resources associated to
each device.  The fields in every line shows:
  - The address of the resource
  - The size of the resource
  - The name of the release function
  - The stage in which the resource has been acquired (BIND/PROBE)

Currently, there is no driver using devres, but if such drivers are
implemented, the output of this command should look like this:

=> dm devres
- root_driver
- soc
- extbus
- serial@54006800
    bfb541e8 (8 byte) devm_kmalloc_release  BIND
    bfb54440 (4 byte) devm_kmalloc_release  PROBE
    bfb54460 (4 byte) devm_kmalloc_release  PROBE
- serial@54006900
    bfb54270 (8 byte) devm_kmalloc_release  BIND
- gpio@55000000
- i2c@58780000
    bfb5bce8 (12 byte) devm_kmalloc_release  PROBE
    bfb5bd10 (4 byte) devm_kmalloc_release  PROBE
- eeprom
    bfb54418 (12 byte) devm_kmalloc_release  BIND

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-06 07:44:29 -06:00
Masahiro Yamada
e2282d7076 devres: make Devres optional with CONFIG_DEVRES
Currently, Devres requires additional 16 byte for each allocation,
which is not so insignificant in some cases.

Add CONFIG_DEVRES to make this framework optional.
If the option is disabled, devres functions fall back to
non-managed variants.  For example, devres_alloc() to kzalloc(),
devm_kmalloc() to kmalloc(), etc.

Because devres_head is also surrounded by an ifdef conditional,
there is no memory overhead when CONFIG_DEVRES is disabled.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Suggested-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-06 07:44:29 -06:00
Masahiro Yamada
2b07f6859a devres: add devm_kmalloc() and friends (managed memory allocators)
devm_kmalloc() is identical to kmalloc() except that the memory
allocated with it is managed and will be automatically released
when the device is removed/unbound.

Likewise for the other variants.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-06 07:44:29 -06:00
Masahiro Yamada
608f26c51b devres: introduce Devres (Managed Device Resource) framework
In U-Boot's driver model, memory is basically allocated and freed
in the core framework.  So, low level drivers generally only have
to specify the size of needed memory with .priv_auto_alloc_size,
.platdata_auto_alloc_size, etc.  Nevertheless, some drivers still
need to allocate/free memory on their own in case they cannot
statically know the necessary memory size.  So, I believe it is
reasonable enough to port Devres into U-boot.

Devres, which originates in Linux, manages device resources for each
device and automatically releases them on driver detach.  With devres,
device resources are guaranteed to be freed whether initialization
fails half-way or the device gets detached.

The basic idea is totally the same to that of Linux, but I tweaked
it a bit so that it fits in U-Boot's driver model.

In U-Boot, drivers are activated in two steps: binding and probing.
Binding puts a driver and a device together.  It is just data
manipulation on the system memory, so nothing has happened on the
hardware device at this moment.  When the device is really used, it
is probed.  Probing initializes the real hardware device to make it
really ready for use.

So, the resources acquired during the probing process must be freed
when the device is removed.  Likewise, what has been allocated in
binding should be released when the device is unbound.  The struct
devres has a member "probe" to remember when the resource was
allocated.

CONFIG_DEBUG_DEVRES is also supported for easier debugging.
If enabled, debug messages are printed each time a resource is
allocated/freed.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-06 07:44:29 -06:00
Masahiro Yamada
aed1a4dd88 dm: add DM_FLAG_BOUND flag
Currently, we only have DM_FLAG_ACTIVATED to indicate the device
status, but we still cannot know in which stage is in progress,
binding or probing.

This commit introduces a new flag, DM_FLAG_BOUND, which is set when
the device is really bound, and cleared when it is unbound.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-08-06 07:44:29 -06:00
Simon Glass
f33017716e dm: Support address translation for simple-bus
The 'ranges' property can be used to specify a translation from the system
address to the bus address. Add support for this using the dev_get_addr()
function, which devices should use to find their address.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-06 07:44:28 -06:00
Simon Glass
0990fcb772 net: smsc95xx: Add driver-model support
Add support for driver model, so that CONFIG_DM_ETH can be defined and used
with this driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-06 07:44:28 -06:00
Simon Glass
527298c4b5 net: smsc95xx: Prepare for conversion to driver model
At present struct eth_device is passed around all over the place. This does
not exist with driver model. Add explicit arguments instead, so that with
driver model we can pass the correct things.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-06 07:44:27 -06:00
Simon Glass
25a9e98038 net: smsc95xx: Correct the error numbers
Instead of returning -1 on error, we should use a proper error number. Fix
the code to conform to this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-06 07:40:45 -06:00
Simon Glass
d62a1dc6bc net: smsc95xx: Rename AX_RX_URB_SIZE to RX_URB_SIZE
The AX_ prefix comes from the Asix driver. Since this is not that, we should
avoid this confusing prefix.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-06 07:31:37 -06:00
Simon Glass
a26925913c net: smsc95xx: Sort the include files
Tidy up the include file order before adding more.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-06 07:31:37 -06:00
Simon Glass
f58a41e001 dm: usb: Add driver-model support to dwc2
Add driver model support to this driver so it can be used with the new USB
stack.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-06 07:31:37 -06:00
Simon Glass
cc3e3a9e0e dm: usb: Prepare dwc2 driver for driver-model conversion
Put all global data in a structure and move (what will be) common code into
common functions. This will make the driver-model conversion much easier.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-06 07:31:37 -06:00
Simon Glass
2e5350fee0 dm: usb: Add an errno.h header to usb_ether.c
This is required on some platforms, so add it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-06 07:31:36 -06:00
Simon Glass
12dc8e7522 dm: Make regmap and syscon optional
Not all boards use garbage collection in their link step, so we should avoid
adding options that rely on this for prevention of code bloat. Add separate
Kconfig options for syscon and regmap uclasses.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-06 07:31:36 -06:00
York Sun
28445aa7ec lib/fdtdec: Fix fdt_addr_t and fdt_size_t typedef
fdt_addr_t is a physical address. It can be either 64-bit or 32-bit,
depending on the architecture. It should be phys_addr_t instead of
u64 or u32. Similarly, fdt_size_t is changed to phys_size_t.

Signed-off-by: York Sun <yorksun@freescale.com>
CC: Simon Glass <sjg@chromium.org>
2015-08-06 07:31:36 -06:00
York Sun
fdb9f349be lib/fdtdec: Fix compiling warning caused by changing fdt_addr_t type
fdt_addr_t is changed to phys_addr_t. The format in debug should be updated
to %pa to match the type.

Signed-off-by: York Sun <yorksun@freescale.com>
CC: Simon Glass <sjg@chromium.org>
2015-08-06 07:31:13 -06:00
Simon Glass
d1de41d7fa exynos: Add support for spring
Spring is the first ARM-based HP Chromebook 11. It is similar to snow
and it uses the same Samsung Exynos5250 chip. But has some unusual
features. Mainline support for it has lagged snow (both in kernel and
U-Boot). Now that the exynos5 code is common we can support spring just
by adding a device tree and a few lines of configuration.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-05 21:06:17 -06:00
Simon Glass
a7a73ef85f exynos: video: Remove non-device-tree code
We always use device tree on exynos, so remove the unused code.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-05 21:06:17 -06:00
Simon Glass
5ae3a5e887 dts: Drop unused compatible ID for the NXP video bridge
This has moved to driver model so we can drop the fdtdec support.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-05 21:06:17 -06:00
Simon Glass
68964dbc83 video: Remove the old parade driver
We have a new one which uses driver model and device tree configuration.
Remove the old one.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-05 21:06:16 -06:00
Simon Glass
24696e2f21 cros_ec: Remove the old tunnel code
This is not needed with driver mode. Remove it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-05 21:06:16 -06:00
Simon Glass
05bccbcd76 power: Remove old TPS65090 drivers
Remove the old drivers (both the normal one and the cros_ec one) now that
we have new drivers that use driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-05 21:06:16 -06:00
Simon Glass
54abb000e3 exynos: Drop old exynos5250-specific board code
Now that most exynos5250 boards can use the generic exynos5 code, switch
over to it and remove the old code.

Signed-off-by: Simon Glass <sjg@chromium.org>
2015-08-05 21:06:16 -06:00
Simon Glass
c51212332a exynos: Drop old exynos5420-specific board code
Now that exynos5420 boards can use the generic exynos5 code, switch over to
it and remove the old code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
2015-08-05 21:06:16 -06:00