Commit graph

16 commits

Author SHA1 Message Date
Ley Foon Tan
8ede7515fe configs: stratix10: Enable CONFIG_SPI_FLASH_USE_4K_SECTORS
Fix SPI flash environment erase size error.

CONFIG_ENV_SECT_SIZE is set to 4KB. Enable CONFIG_SPI_FLASH_USE_4K_SECTORS
to allow erase one environment sector.

Fix error below:

SOCFPGA_STRATIX10 # saveenv
Saving Environment to SPI Flash...
SF: Detected mt25qu02g with page size 256 Bytes, erase size 64 KiB, total 256 MiB
Erasing SPI flash...SF: Erase offset/length not multiple of erase size
Failed (-22)

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2019-05-10 22:48:11 +02:00
Ley Foon Tan
6bf238a461 arm: socfpga: Move Stratix 10 SDRAM driver to DM
Convert Stratix 10 SDRAM driver to device model.

Get rid of call to socfpga_per_reset() and use reset
framework.

SPL is changed from calling function in SDRAM driver
directly to just probing UCLASS_RAM.

Move sdram_s10.h from arch to driver/ddr/altera directory.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2019-05-06 12:44:17 +02:00
Simon Goldschmidt
f89d6133ee configs: move CONFIG_SPL_TEXT_BASE to Kconfig
Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing
values.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
[trini: Re-run migration]
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-04-29 21:41:40 -04:00
Tom Rini
d168bcb6fe configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2019-04-29 21:41:40 -04:00
Simon Goldschmidt
aef44283ac arm: socfpga: imply/default common config options
This commit moves common config options used in all socfpga boards
to select/imply in Kconfig. This both cleans up the defconfig files
as well as makes future changes easier.

Options implied/defaulted for all sub-arches:
- SPL, SPL_DM, USE_TINY_PRINTF, NR_DRAM_BANKS

Options implied/defaulted for implied for A10 & gen5:
- FPGA_SOCFPGA, SYS_MALLOC_F_LEN, SYS_TEXT_BASE

Options implied/defaulted for gen5:
- SPL_STACK_R, SPL_SYS_MALLOC_SIMPLE, SPL_STACK_R_ADDR

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
2019-04-25 00:00:49 +02:00
Ley Foon Tan
a32f7d3cd8 configs: stratix10: Change CONFIG_NR_DRAM_BANKS to 2
Stratix10 maps dram in 2 address spans, from 0-2GB and from
2GB up to 128GB.

Signed-off-by: Dalon Westergreen <dalon.westergreen@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2019-04-17 22:20:17 +02:00
Tom Rini
7f21ced0d2 Merge branch 'master' of git://git.denx.de/u-boot-socfpga
- configs: Stratix10: Remove CONFIG_USE_TINY_PRINTF
2019-03-26 23:19:31 -04:00
Patrick Delaunay
14453fbfad Convert CONFIG_SF_DEFAULT_* to Kconfig
This converts the following to Kconfig:
  CONFIG_SF_DEFAULT_BUS
  CONFIG_SF_DEFAULT_CS
  CONFIG_SF_DEFAULT_MODE
  CONFIG_SF_DEFAULT_SPEED

I use moveconfig script and then manual check on generated u-boot.cfg
to solve the remaining issue.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-03-25 17:36:53 -04:00
Ley Foon Tan
3d0cc01d10 configs: Stratix10: Remove CONFIG_USE_TINY_PRINTF
Use full printf instead of tiny printf in SPL.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2019-03-25 20:26:45 +01:00
Vignesh R
6d82517836 configs: Don't use SPI_FLASH_BAR as default
Now that new SPI NOR layer uses stateless 4 byte opcodes by default,
don't enable SPI_FLASH_BAR. For SPI controllers that cannot support
4-byte addressing, (stm32_qspi.c, fsl_qspi.c, mtk_qspi.c, ich.c,
renesas_rpc_spi.c) add an imply clause to enable SPI_FLASH_BAR so as to
not break functionality.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Stefan Roese <sr@denx.de>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
2019-02-07 15:33:22 +05:30
Tien Fong Chee
0c3a9ed409 spl: Kconfig: Replace CONFIG_SPL_FAT_SUPPORT with CONFIG_SPL_FS_FAT
Replace CONFIG_SPL_FAT_SUPPORT with CONFIG_SPL_FS_FAT so
obj-$(CONFIG_$(SPL_)FS_FAT) can be used to control the build in both
SPL and U-Boot.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-02-01 09:12:48 -05:00
Dalon Westergreen
f6d600b39b arm: socfpga: stratix10: Add CONFIG_OF_EMBED
The dtb should be embedded in the u-boot-spl image so that
the CONFIG_SPL_TARGET of spl/u-boot-spl.hex includes it.

This also affects the main u-boot image, so adjust
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME to u-boot.img which now
also includes the dtb.

Signed-off-by: Dalon Westergreen <dwesterg@gmail.com>
2018-09-15 03:17:01 +02:00
Tom Rini
8c5cad05c9 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-09-03 15:26:12 -04:00
Adam Ford
d7869b2183 Convert CONFIG_MII et al to Kconfig
This converts the following to Kconfig:
   CONFIG_MII
   CONFIG_DRIVER_TI_EMAC

Signed-off-by: Adam Ford <aford173@gmail.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-08-17 13:03:54 -04:00
Tom Rini
86cf1c8285 configs: Migrate CONFIG_NR_DRAM_BANKS
We have the following cases:
- CONFIG_NR_DRAM_BANKS was defined, migrate normally
- CONFIG_NR_DRAM_BANKS_MAX was defined and then used for
  CONFIG_NR_DRAM_BANKS after a check, just migrate it over now.
- CONFIG_NR_DRAM_BANKS was very oddly defined on p2771-0000-* (to 1024 +
  2), set this to 8.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-08-16 16:45:02 -04:00
Ley Foon Tan
a684729a15 arm: socfpga: stratix10: Enable Stratix10 SoC build
Add build support for Stratix SoC

Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>

Conflicts:

	arch/arm/Kconfig
	arch/arm/mach-socfpga/Kconfig
2018-07-12 09:22:12 +02:00