Commit graph

59667 commits

Author SHA1 Message Date
Simon Glass
630b2f39dd cbfs: Add functions to support multiple CBFSs
Sometimes an image has multiple CBFS. The current CBFS API is limited to
handling only one at time. Also it keeps track of the CBFS internally in
BSS, which does not work before relocation, for example.

Add a few new functions to overcome these limitations.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2019-08-18 21:54:10 +08:00
Simon Glass
c7f1693474 cbfs: Move result variable into the struct
Move the result variable into the struct also, so that it can be used when
BSS is not available. Add a function to read it.

Note that all functions sill use the BSS version of the data.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2019-08-18 21:54:10 +08:00
Simon Glass
02e4af63a9 cbfs: Move static variables into a struct
At present there are a number of static variables in BSS. This cannot work
with SPL, at least until BSS is available in board_init_r().

Move the variables into a struct, so it is possible to malloc() it and use
it before BSS is available.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2019-08-18 21:54:10 +08:00
Simon Glass
fc7b9e16a0 cbfs: Move declarations above functions
At present this file has a function at the top, above declarations. This
is normally avoided, so fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2019-08-18 21:54:10 +08:00
Simon Glass
72b2465c6b cbfs: Allow CBFS to be used in SPL
Add a new Kconfig option to enable CBFS in SPL. This can be useful when
the memory-init code is in CBFS.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2019-08-18 21:54:10 +08:00
Heinrich Schuchardt
0c4a0e601b doc: arch: correct links in x86.rst
Correctly reference uefi/uefi.rst and uefi/u-boot_on_efi.rst.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2019-08-18 21:54:10 +08:00
Heinrich Schuchardt
79bf4450a1 doc: formatting slimbootloader.rst
Avoid a warning when building the 'make htmldocs' target:

doc/board/intel/slimbootloader.rst:90: WARNING: Title underline too short.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2019-08-18 21:54:10 +08:00
Bin Meng
039c031e08 x86: qemu: Fix build warnings with CONFIG_DISTRO_DEFAULTS=n
Use DISTRO_BOOTENV to decouple BOOTENV from CONFIG_DISTRO_DEFAULTS.

Reported-by: Heinrich Schuchardt <xypron.debian@gmx.de>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2019-08-18 21:54:10 +08:00
Tom Rini
81fed78c0a Pull request for UEFI sub-system for v2019.10-rc3
This pull request provides corrections for the SetVirtualAddress runtime
 service and avoids possible calls to NULL by consumers of the
 EFI_PXE_BASE_CODE_PROTOCOL.
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Merge tag 'efi-2019-10-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi

Pull request for UEFI sub-system for v2019.10-rc3

This pull request provides corrections for the SetVirtualAddress runtime
service and avoids possible calls to NULL by consumers of the
EFI_PXE_BASE_CODE_PROTOCOL.
2019-08-17 10:31:25 -04:00
Tom Rini
8c650a9fed Merge branch 'master' of git://git.denx.de/u-boot-socfpga
- Misc gen5 fixes
2019-08-17 10:30:56 -04:00
Tom Rini
3d240d89c4 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-riscv
- Fix sifive serial y-modem transfer.
- Access CSRs using CSR numbers.
- Update doc sifive-fu540
- Support big endian hosts and target.
2019-08-16 07:22:21 -04:00
Heinrich Schuchardt
9f8932d055 efi_loader: do not call efi_runtime_detach twice
Commit 7f95104d91 ("efi_loader: detach runtime in ExitBootServices()")
added a call to efi_runtime_detach() to ExitBootServices() but did not
remove the call in SetVirtualAddressMap().

Remove the superfluous function call.

Correct a comment referring to efi_runtime_detach().

Fixes: 7f95104d91 ("efi_loader: detach runtime in ExitBootServices()")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-08-15 20:33:10 +02:00
Heinrich Schuchardt
53e1d8fae8 efi_loader: parameter check in SetVirtualAddressMap
Check the parameters DescriptorSize and DescriptiorVersion of
SetVirtualAddressMap() as prescribed by the UEFI specification.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-08-15 20:33:10 +02:00
Heinrich Schuchardt
a6d37098bd efi_loader: EFI_PXE_BASE_CODE_PROTOCOL stub
U-Boot implements the EFI_PXE_BASE_CODE_PROTOCOL because GRUB uses the mode
information for booting via PXE. All function pointers in the protocol were
NULL up to now which will cause immediate crashes when the services of the
protocol are called.

Create function stubs for all services of the protocol returning
EFI_UNSUPPORTED.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-08-15 20:33:10 +02:00
Simon Goldschmidt
a89441a74f arm: socfpga: gen5: don't zero bss in board_init_f()
The socfpga gen5 SPL manually zeroed bss in board_init_f(). Now that the
DDR driver does not use bss any more, bss is not used before board_init_r()
and we can remove this hack.

bss is normally zeroed by crt0.S, but after board_init_f(), before
board_init_r(). socfpga just had this double-zeroing because it invalidly
used bss in board_init_f() already (during DDR initialization).

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-08-15 08:50:02 +02:00
Dalon Westergreen
998f7cb29a ARM: socfpga: update CONFIG_SPL_FS_LOAD_PAYLOAD_NAME to u-boot.img
Bring cyclone5 / arria5 / arria10 in line with convention and use
u-boot.img as CONFIG_SPL_FS_LOAD_PAYLOAD_NAME.

Signed-off-by: Dalon Westergreen <dalon.westergreen@intel.com>
2019-08-15 08:50:00 +02:00
Ley Foon Tan
63b312d882 arm: socfpga: Fix SYSRESET_SOCFPGA_S10 config name
The CONFIG name should be SYSRESET_SOCFPGA_S10 instead of
SYSRESET_SOCFPGA_STRATIX10.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2019-08-15 08:50:00 +02:00
Marcus Comstedt
4539926a9c riscv: tools: Add big endian target support to prelink-riscv
Signed-off-by: Marcus Comstedt <marcus@mc.pp.se>
Cc: Rick Chen <rick@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2019-08-15 13:42:28 +08:00
Marcus Comstedt
e604410d3e riscv: tools: Fix prelink-riscv to work on big endian hosts
All ELF fields whose values are inspected by the code are converted to
CPU byteorder first.  Values which are copied verbatim (relocation
fixups) are not swapped to CPU byteorder and back as it is not needed.

Signed-off-by: Marcus Comstedt <marcus@mc.pp.se>
Cc: Rick Chen <rick@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2019-08-15 13:42:28 +08:00
Anup Patel
88af42d3de doc: sifive-fu540: Update README to explicitly load DTB for Linux
We should explicitly load DTB from TFTP server or MMC/SD card
for Linux booting. This will allow us:
1. To use different Linux DTB for SiFive Unleashed board with
   expansion board connected.
2. Avoid re-flashing OpenSBI firmware whenever board connections
   change.

This patch updates reference bootlog in SiFive FU540 README
as-per above.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2019-08-15 13:42:28 +08:00
Bin Meng
4d2583dba1 riscv: Access CSRs using CSR numbers
We should prefer accessing CSRs using their CSR numbers
because:
1. It compiles fine with older toolchains.
2. We can use latest CSR names in #define macro names of CSR
   numbers as-per RISC-V spec.
3. We can access newly added CSRs even if toolchain does not
   recognize newly added CSRs by name.

This commit is inspired from Linux kernel commit a3182c91ef4e
("RISC-V: Access CSRs using CSR numbers").

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2019-08-15 13:42:28 +08:00
Bin Meng
268753f8e6 riscv: Sync csr.h with Linux kernel v5.2
This syncs csr.h with Linux kernel 5.2, and imports asm.h that
is required by csr.h.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2019-08-15 13:42:28 +08:00
Sagar Shrikant Kadam
8836384c75 riscv : serial: use rx watermark to indicate rx data is present
In y-modem transfer mode, tstc/getc fail to check if there is any
data available / received in RX FIFO, and so y-modem transfer never
succeeds. Using receive watermark bit within ip register fixes the
issue.

This patch is based on commit c7392b7bc4e1 ("Use the RX watermark
interrupt pending bit for TSTC") available at[1]

[1] https://github.com/sifive/HiFive_U-Boot/tree/regression

Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Tested-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Padmarao Begari <padmarao.begari@microchip.com>
Tested-by: Padmarao Begari <padmarao.begari@microchip.com>
2019-08-15 13:42:28 +08:00
Tom Rini
df33f86468 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2019-08-14 08:11:27 -04:00
Tom Rini
f55e80f37e Prepare v2019.10-rc2
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-08-13 18:23:35 -04:00
Tom Rini
88c7a0a8c2 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
- Various improvements to Keymile boards - mostly DT conversation
  (Pascal & Holger)
- Removal of now unsupported Keymile boards (Pascal & Holger)
- Small MVEBU PCI fix (Marek)
- Turris Omnia defconfig update (Marek)
- Misc Allied Telesis defconfig updates (Chris)
2019-08-12 23:03:44 -04:00
Tom Rini
60f38d82c4 - amlogic: add support for the SEI Robotic SEI510
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Merge tag 'u-boot-amlogic-20190812' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic

- amlogic: add support for the SEI Robotic SEI510
2019-08-12 23:03:35 -04:00
Tom Rini
9c6115822e Merge branch '2019-08-11-ti-imports'
- More DaVinci updates and fixes
- PCIe support on am65x
- Watchdog converted to DM
- Assorted other bugfixes
2019-08-12 18:47:53 -04:00
Tom Rini
5939afc961 Merge branch '2019-08-11-master-imports'
- environment cleanup
- HiKey 960 support
- Some PCI fixes
2019-08-12 18:46:07 -04:00
Tom Rini
d7ae932152 gitlab-ci: Consolidate some testsuite jobs
We do not need to split binman, buildman, dtoc and patman test suite
runs into 3 jobs.  Instead, run them as a single job.

Signed-off-by: Tom Rini <trini@konsulko.com>
2019-08-12 15:19:18 -04:00
Tom Rini
edbe0d5664 gitlab-ci: Add USER environment variable to buildman/patman tests
The way that some of the tests here are designed, they expect USER to be
set in the environment.  This is not the case in the docker images, so
set a reasonable value.

Signed-off-by: Tom Rini <trini@konsulko.com>
2019-08-12 15:19:18 -04:00
Andreas Dannenberg
0805fe151d arm: K3: sysfw-loader: Do not require full printf() for version info
A previous commit...

commit 2a51e16bd5 ("configs: Make USE_TINY_PRINTF depend on SPL||TPL and be default")

...causes the System Firmware version string during SPL boot to no longer
getting printed to the console as expected. To fix this issue rework the
handling of that string to only use basic printf() syntax rather than
for example disabling CONFIG_USE_TINY_PRINTF on affected devices, this
way maintaining most of the memory size benefit the initial patch brings
when it comes to SPL.

Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-08-12 13:33:43 -04:00
Vignesh Raghavendra
c659a979ea firmware: ti_sci: Parse all resource ranges even if some is not available
Do not fail if any of the requested subtypes are not available, but set the
number of resources to 0 and continue parsing the resource ranges.

Based on Linux kernel patch by Peter Ujfalusi <peter.ujfalusi@ti.com>

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-08-12 13:33:43 -04:00
Adam Ford
51cd1e2373 ARM: da850-evm: Enable SPI Flash and NAND Flash when booting NOR
Historically there have been various boot options, SPI flash,
NAND or NOR. The NOR flash is mutually exclusive with MMC, but
it isn't mutually exclusive with NAND or SPI Flash, so this patch
enables both NAND flash and SPI Flash when booting from NOR.

Signed-off-by: Adam Ford <aford173@gmail.com>
2019-08-12 13:33:42 -04:00
Adam Ford
79bb64678c ARM: da850-evm: Enable filesystem commands when booting from NOR
The configuration with NOR is mutually exclusive with MMC, and as
such, the filesystem commands were disabled.  With the USB host
enabled, this patch enables the file system command which can
be executed on storage devices attached to the USB.

Signed-off-by: Adam Ford <aford173@gmail.com>
2019-08-12 13:33:42 -04:00
Adam Ford
d2c30190ee ARM: da850-evm: Increase environment NOR partition offset
The current size allocated to U-Boot is 384k, but U-Boot has grown
to 436K which means that saving the environmental variables wipes
out part of the U-Boot source and the board ceases to function.
Due to the sector and erase size for the NOR part and a desire to
not have to change partition sizes often, this patch moves the
U-Boot environmental variables to an offset of 1M so saveenv
does not brick the board.  This patch also sets up MTDIDS and
MTDPARTS to clearly show where U-Boot and U-Boot's environmental
variables are located.

Signed-off-by: Adam Ford <aford173@gmail.com>
2019-08-12 13:33:42 -04:00
Adam Ford
66e2637b19 ARM: da850-evm: Fix Lowlevel init
A previous patch for enabling the NAND config set a flag called
CONFIG_SKIP_LOWLEVEL_INIT when it should have been called
CONFIG_SKIP_LOWLEVEL_INIT_ONLY.  The affect this had was creating
a delay on startup for the NOR version which is XIP and doesn't have
SPL, so the lowlevel initialization functions need to operate.
This delay was not really noticeable at first, but the delays have been
getting longer, finally reached the point of nearly seven seconds
before the board would appear to start.

This patch sets the CONFIG_SKIP_LOWLEVEL_INIT_ONLY instead which means
"The normal CP15 init (such as enabling the instruction cache) is still
performed" per the README.  It doesn't appear to have any adverse
behavior on the SPI Flash or the NAND flash boards which use SPL.

Fixes: 93f3362762 ("ARM: configs: Add da850evm_nand to boot from NAND")

Signed-off-by: Adam Ford <aford173@gmail.com>
2019-08-12 13:33:41 -04:00
Sekhar Nori
36de3b0668 configs: am65x_evm_a53: enable support for PCIe ethernet cards
Enable support for Intel E1000 based PCIe ethernet cards that
can be used to test PCIe RC functionality on AM65x EVM.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2019-08-12 13:33:41 -04:00
Sekhar Nori
476e991452 arm: dts: k3-am65: add support for PCIe and SERDES
Add needed device-tree nodes to support PCIe 0
and SERDES on AM65x SoC. The nodes are kept
disabled by default.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2019-08-12 13:33:40 -04:00
Sekhar Nori
e0598c4584 configs: am65x_evm_a53: enable PCIe support
Enable support for PCIe and related configurations
on AM654 EVM platform.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2019-08-12 13:33:40 -04:00
Sekhar Nori
888e1caeae phy: add support for AM654x SERDES
Add a new SERDES driver for TI's AM654x SoC which configures
the SERDES only for PCIe. Support fo USB3 can be added later.

SERDES in am654x has three input clocks (left input, external
reference clock and right input) and two output clocks (left
output and right output) in addition to a PLL mux clock which
the SERDES uses for Clock Multiplier Unit (CMU refclock).

The PLL mux clock can select from one of the three input
clocks. The right output can select between left input and
external reference clock while the left output can select
between the right input and external reference clock.

The driver has support to select PLL mux and left/right output
mux as specified in device tree.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2019-08-12 13:33:39 -04:00
Sekhar Nori
03c396bb5f pcie: ti: add driver for AM65x PCIe RC
Add driver supporting PCIe root-complex available
on TI's AM65x SoC.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2019-08-12 13:33:39 -04:00
Sekhar Nori
f5b904796f dm: core: add support for getting register address and size
Current dev_read_*() API lacks support to get address and size
of a "reg" property by name or index. Add support for the same.

Livetree support has been added but not tested on real hardware.

The existing unit tests testing reading address from device-tree
have been updated to test address as well as size.

Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2019-08-12 13:33:39 -04:00
Sekhar Nori
acbb7cd4d3 clk: add support for clk_is_match()
Add support for clk_is_match() which is required to
know if two clock pointers point to the same exact
physical clock.

Also add a unit test for the new API.

Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2019-08-12 13:33:38 -04:00
Nishanth Menon
71cd80af86 power: domain: ti-sci-power-domain: Add device ID info to get/set_device failure
Failure log for ti_sci_power_domain_on/off is as below:
"ti_sci_power_domain_on: get/set_device failed (-19)"

The above information is useless for debug without information
on what specific device access failed. So add that information as well.

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-08-12 13:33:38 -04:00
Hannes Schmelzer
60df809f62 board/BuR/brsmarc1: initial commit
This commit adds support for the B&R brsmarc1 SoM.

The SoM is based on TI's AM335x SoC.
Mainly vxWorks 6.9.4.x is running on the board,
doing some PLC stuff on various carrier boards.

Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
2019-08-12 13:33:37 -04:00
Suniel Mahesh
6912f2a8ae watchdog: omap_wdt: Disable DM watchdog support in SPL
This patch disables DM watchdog support for SPL builds and uses
the legacy omap watchdog driver on TI AM335x chipsets.

The following build error is reported if DM watchdog support was
enabled in SPL:

  CC      spl/drivers/usb/gadget/rndis.o
  LD      spl/drivers/usb/gadget/built-in.o
  LD      spl/drivers/usb/musb-new/built-in.o
  LD      spl/drivers/built-in.o
  LD      spl/u-boot-spl
arm-linux-ld.bfd: u-boot-spl section .u_boot_list will not fit in region .sram
arm-linux-ld.bfd: region .sram overflowed by 440 bytes
make[1]: *** [spl/u-boot-spl] Error 1
make: *** [spl/u-boot-spl] Error 2

Adjusted WATCHDOG_RESET macro accordingly. Earlier it was pointing
to hw_watchdog_reset. Since CONFIG_WATCHDOG replaces CONFIG_HW_WATCHDOG,
now WATCHDOG_RESET macro points to watchdog_reset. This watchdog_reset
is not defined anywhere for am33xx/omap2 and needs to be defined. Fixed
this by simply calling hw_watchdog_reset in watchdog_reset.

Built and tested on AM335x device (BeagleboneBlack), compile tested for
all other AM33xx/omap2 based boards.

Signed-off-by: Suniel Mahesh <sunil.m@techveda.org>
[trini: Fix watchdog.h logic]
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-08-12 13:27:55 -04:00
Marek Behún
193a1e9f19 pci: pci_mvebu: set BAR0 after memory space is set
The non-DM version of this driver used to set BAR0 register after the
calls to pci_set_region.
I found out that for some strange reason the ath10k driver in kernel
fails to work if this is done the other way around.
I know that Linux's driver should not depend on how U-Boot does things,
but for some strange reason it does and this seems to be the simplest
solution. Fix it since it caused regressions on Omnia.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Cc: Stefan Roese <sr@denx.de>
Cc: Dirk Eibach <dirk.eibach@gdsys.cc>
Cc: Mario Six <mario.six@gdsys.cc>
Cc: Chris Packham <chris.packham@alliedtelesis.co.nz>
Cc: Phil Sutter <phil@nwl.cc>
Cc: VlaoMao <vlaomao@gmail.com>
Tested-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-08-12 13:59:31 +02:00
Suniel Mahesh
7659ea32a6 watchdog: omap_wdt: Convert watchdog driver to use DT and DM
This patch adds device tree and driver model watchdog support,
converts the legacy omap watchdog driver to driver model for
TI AM335x chipsets. The following compile warning is removed:

===================== WARNING ======================
This board does not use CONFIG_WDT (DM watchdog support).
Please update the board to use CONFIG_WDT before the
v2019.10 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/MIGRATION.txt for more info.
====================================================

CONFIG_HW_WATCHDOG is no more a default option for AM33XX devices
after DT/DM conversion, adjusted kconfig accordingly.

DM watchdog support is enabled by default in SPL. The SPL image
doesn't fit into SRAM because of size constraints and build breaks
with an overflow. For this reason DM watchdog support should be
disabled in SPL, driver code should be adjusted accordingly to serve
this purpose.
Built and tested on AM335x device (BeagleboneBlack), compile tested
for all other AM33xx based boards.

Signed-off-by: Suniel Mahesh <sunil.m@techveda.org>
2019-08-12 07:25:22 -04:00
Anselm Busse
2800bb155b ARM: omap3: overo: Fix MMC init for SPL
The SPL for the Overo board does not initialise the MMC. Hence, it
cannot load the main boot loader from the SD card susequently. This
patch moves the initialisation code for the MMC so it gets included in
the SPL.

[trini: Add missing header]
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-08-12 07:24:29 -04:00