Commit graph

86191 commits

Author SHA1 Message Date
Svyatoslav Ryhel
cf291babc7 video: move tegra dc driver into own folder
Move tegra dc driver to tegra20 directory and also mention
T30 in description of the driver's config option.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
[agust: add commit description]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2023-04-07 18:33:11 +02:00
Marcel Ziswiler
8dfeee651f tegra: lcd: video: integrate display driver for t30
On popular request make the display driver from T20 work on T30 as
well. Turned out to be quite straight forward. However a few notes
about some things encountered during porting: Of course the T30 device
tree was completely missing host1x as well as PWM support but it turns
out this can simply be copied from T20. The only trouble compiling the
Tegra video driver for T30 had to do with some hard-coded PWM pin
muxing for T20 which is quite ugly anyway. On T30 this gets handled by
a board specific complete pin muxing table. The older Chromium U-Boot
2011.06 which to my knowledge was the only prior attempt at enabling a
display driver for T30 for whatever reason got some clocking stuff
mixed up. Turns out at least for a single display controller T20 and
T30 can be clocked quite similar. Enjoy.

Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF T30
Tested-by: Jonas Schwöbel <jonasschwoebel@yahoo.de> # Surface RT T30
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # LG P895 T30
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2023-04-07 18:24:42 +02:00
Simon Glass
67a3646521 sandbox: video: Fix building without SDL
This is currently broken. If SDL is not installed, SANDBOX_SDL becomes
false and build errors are generated, e.g.:

   test/dm/video.c:424: undefined reference to `sandbox_sdl_set_bpp'

Fix it by making the function return an error in this case.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-04-07 17:43:36 +02:00
Hai Pham
36b63c92c3 ARM: renesas: Add R8A779G0 V4H White Hawk board code
Add board code for R8A779G0 V4H White Hawk board.

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Synchronize configuration symbols which are now switched to Kconfig
        Mallocate gd->bd->bi_boot_params, i.e. drop the assignment
        Sort headers, use clrbits_le32(), use BIT macros where appropriate
        Use CONFIG_SYS_CLK_FREQ for counter frequency instead of custom macro]
2023-04-07 17:13:28 +02:00
Hai Pham
e4e242b296 ARM: renesas: Add R8A779G0 V4H Kconfig entry and PRR ID
Add Kconfig entry and PRR ID to support R8A779G0 V4H SoC.

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Update commit message]
2023-04-07 17:13:28 +02:00
Tho Vu
2ea98fc9f9 ARM: dts: renesas: Add R8A779G0 V4H White Hawk DTs
Add DTs for R8A779G0 V4H White Hawk CPU and BreakOut boards.

Based on Linux next 20230228 DTs up to
commit 058f4df42121 ("Add linux-next specific files for 20230228")

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Tho Vu <tho.vu.wh@renesas.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Sync with Linux next 20230228, update commit message
        Rename DTs to match Linux, which has dash between white-hawk]
2023-04-07 17:13:28 +02:00
Hai Pham
2ed192361e ARM: dts: renesas: Add R8A779G0 V4H DT extras
Add R8A779G0 V4H DT extras for U-Boot.

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Update compatible string to match latest upstream]
2023-04-07 17:13:28 +02:00
Phong Hoang
2c8941659d ARM: dts: renesas: Add R8A779G0 V4H DT
Add initial DT support for R8A779G0 (R-Car V4H). Based on Linux next
commit 058f4df42121 ("Add linux-next specific files for 20230228")

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Phong Hoang <phong.hoang.wz@renesas.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Sync with Linux next 20230228, update commit message]
2023-04-07 17:13:28 +02:00
Hai Pham
de4c777e3e pinctrl: renesas: Add R8A779G0 V4H PFC tables
Add pinctrl tables for R8A779G0 V4H SoC.

Based on Linux next 20230228 PFC tables tables up to
commit 058f4df42121 ("Add linux-next specific files for 20230228")

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: LUU HOAI <hoai.luu.ub@renesas.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Phong Hoang <phong.hoang.wz@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Sync with Linux next 20230228, sort sh_pfc_pinconf_set voltage args]
2023-04-07 17:13:28 +02:00
Hai Pham
53f27dda29 clk: renesas: Add R8A779G0 V4H clock tables
Add clock tables for R8A779G0 V4H SoC from Linux next
commit 058f4df42121 ("Add linux-next specific files for 20230228")

There is an adjustment to the clock tables to make them easier suitable
for U-Boot, PLL2 is not treated as GEN4 PLL type PLL2_VAR, but rather a
plain PLL2. This should be sufficient until PLL2_VAR is implemented in
the clock core.

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Sync with Linux next 20230228 . Update from CLK to CPG core driver
        Treat PLL2 as non-PLL2_VAR for now]
2023-04-07 17:13:28 +02:00
Tho Vu
0296ec364d dt-bindings: clock: Add R8A779G0 V4H CPG Core Clock Definitions
Add all Clock Pulse Generator Core Clock Outputs for the
Renesas R-Car V4H (R8A779G0) SoC from Linux next
commit 058f4df42121 ("Add linux-next specific files for 20230228")

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Tho Vu <tho.vu.wh@renesas.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Update to linux next 20230228 state]
2023-04-07 17:13:28 +02:00
Tho Vu
3813c3c0a5 dt-bindings: power: Add R8A779G0 V4H SYSC power domain definitions
Add power domain indices for R-Car V4H (R8A779G0) from Linux next
commit 058f4df42121 ("Add linux-next specific files for 20230228")

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Tho Vu <tho.vu.wh@renesas.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Update to linux next 20230228 state]
2023-04-07 17:13:28 +02:00
Hai Pham
558d10620b ARM: renesas: Add R8A779F0 S4 Spider board code
Add board code for R8A779F0 S4 Spider board.

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Synchronize configuration symbols which are now switched to Kconfig
        Mallocate gd->bd->bi_boot_params, i.e. drop the assignment
	Sort headers, use clrbits_le32(), use BIT macros where appropriate
	Use CONFIG_SYS_CLK_FREQ for counter frequency instead of custom macro]
2023-04-07 17:13:28 +02:00
Hai Pham
8f098fd623 ARM: renesas: Add R8A779F0 S4 Kconfig entry and PRR ID
Add Kconfig entry and PRR ID to support R8A779F0 S4 SoC.

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Update commit message]
2023-04-07 17:13:28 +02:00
Hai Pham
d1bbe1bedd ARM: dts: renesas: Add R8A779F0 S4 Spider DTs
Add DTs for R8A779F0 S4 Spider CPU boards and Breakout boards.

Based on Linux next 20230228 DTs up to
commit 058f4df42121 ("Add linux-next specific files for 20230228")

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Sync with Linux next 20230228, update commit message]
2023-04-07 17:13:28 +02:00
Hai Pham
d29bc87173 ARM: dts: renesas: Add R8A779F0 S4 DT extras
Add R8A779F0 S4 DT extras for U-Boot.

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Update compatible string to match latest upstream]
2023-04-07 17:13:28 +02:00
Hai Pham
b51f953053 ARM: dts: renesas: Add R8A779F0 S4 DT
Add initial DT for R8A779F0 S4 SoC. Based on Linux next
commit 058f4df42121 ("Add linux-next specific files for 20230228")

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Sync with Linux next 20230228, update commit message]
2023-04-07 17:13:28 +02:00
Hai Pham
32e6893caf ARM: rmobile: Turn R-Car V3U into R-Car Gen4
Despite the name, R-Car V3U is the first member of the R-Car Gen4
family [1]. Hence reflect this in related files, select appropriate
configuration options and split DT build into its own GEN4 entry.

[1] https://www.renesas.com/us/en/products/automotive-products/automotive-system-chips-socs/r-car-v3u-best-class-r-car-v3u-asil-d-system-chip-automated-driving

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Deduplicate DTC_FLAGS addition using RCAR_64 symbol
        Update commit message]
2023-04-07 17:13:28 +02:00
LUU HOAI
1b1834c037 pinctrl: renesas: Add R8A779F0 S4 PFC tables
Add pinctrl tables for R8A779F0 S4 SoC.

Based on Linux next 20230228 PFC tables tables up to
commit 058f4df42121 ("Add linux-next specific files for 20230228")

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: LUU HOAI <hoai.luu.ub@renesas.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Use RCAR_64 Kconfig, sync with Linux next 20230228]
2023-04-07 17:13:28 +02:00
Hai Pham
17207aa84f clk: renesas: Add R8A779F0 S4 clock tables
Add clock tables for R8A779F0 S4 SoC

Based on Linux commit 24aaff6a6ce4 ("clk: renesas: cpg-mssr: Add support
for R-Car S4-8") by Yoshihiro Shimoda and sync the tables up to Linux next
commit 058f4df42121 ("Add linux-next specific files for 20230228")

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Sync with Linux next 20230228 . Update from CLK to CPG core driver]
2023-04-07 17:13:28 +02:00
Marek Vasut
3e01ed8e0f clk: renesas: Update R-Car Gen3 driver Gen4 support
Update R-Car Gen4 support in Gen3 clock driver. This patch renames the
V3U clock parts to Gen4 and extends them by new PLL2, PLL3, PLL4, PLL6
as well as SDSRC clock which use undocumented bits so far, and RPCSRC
clock which uses its own more capable divider table. The Gen4 module
standby and reset tables are also updated.

This patch makes use of union to alias Gen3 and more extensive Gen4
PLL tables, as the driver cannot ever be instantiated on hardware
that would identify itself as both Gen3 and Gen4.

The V3U clock driver is updated to match Gen4 clock driver behavior,
it is augmented with a more extensive PLL table and a valid MODEMR
register offset.

This supersedes "clk: renesas: Introduce R-Car Gen4 CPG driver"
from Hai Pham as the R-Car Gen3 and Gen4 clock core drivers are
extremely similar. That implementation was in turn based on Linux
commit 470e3f0d0b15 ("clk: renesas: rcar-gen4: Introduce R-Car Gen4 CPG driver")
by Yoshihiro Shimoda .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-04-07 17:13:28 +02:00
Tho Vu
2fa93af66a dt-bindings: clock: Add R8A779F0 S4 CPG Core Clock headers
Add definitions for R8A779F0 S4 CPG Core Clock headers from Linux next
commit 058f4df42121 ("Add linux-next specific files for 20230228")

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Tho Vu <tho.vu.wh@renesas.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Update to linux next 20230228 state]
2023-04-07 17:13:28 +02:00
Tho Vu
ec6f6acac1 dt-bindings: power: Add R8A779F0 S4 SYSC power domain definitions
Add power domain indices for R-Car S4 (R8A779F0) from Linux next
commit 058f4df42121 ("Add linux-next specific files for 20230228")

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Tho Vu <tho.vu.wh@renesas.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Update to linux next 20230228 state]
2023-04-07 17:13:28 +02:00
Marek Vasut
72f2781072 spi: renesas: Make driver available on R-Car Gen4
Use CONFIG_RCAR_64 to make the driver available on both
R-Car Gen3 and R-Car Gen4.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-04-07 17:13:28 +02:00
Hai Pham
bbe36e29ca serial: sh: Add HSCIF support for R-Car SoC
Provide the basic HSCIF support for R-Car SoC.

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Fill in HSSRR offset for Gen2 and SCBRR calculation for Gen2 and Gen3]
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-04-07 17:13:28 +02:00
Hai Pham
3bf63fbd5d serial: sh: Add R-Car Gen4 support
Add R-Car Gen4 family support. The basic function is as same as previous
R-Car Generation.

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Swap RZ/A1 and Gen4 to keep the GenN sequence, use RCAR_64]
2023-04-07 17:13:28 +02:00
Hai Pham
c2fbaaf3dc net: ravb: Add R-Car Gen4 support
Add support for R-Car Gen4 SoCs and a matching DT compatible.

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Drop SoC specific compatible, use RCAR_64 Kconfig symbol, update commit message]
2023-04-07 17:13:28 +02:00
Hai Pham
632a7b1186 mmc: renesas-sdhi: Add R-Car Gen4 support
Support R-Car Gen4 family. The default quirk is similar to previous
generation.

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> # Use RCAR_64 Kconfig
2023-04-07 17:13:28 +02:00
Marek Vasut
2769ddc99f mmc: tmio: Replace ifdeffery with IS_ENABLED/CONFIG_IS_ENABLED macros
Instead of #if and #ifdef, use IS_ENABLED and CONFIG_IS_ENABLED macros.
This improves build test coverage. The CONFIG_SPL_BUILD must remain an
ifdef, as CONFIG_SPL_STACK may not always be defined, e.g. in U-Boot
proper build. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2023-04-07 17:13:27 +02:00
Marek Vasut
dd073c0393 mmc: tmio: Check 'addr' width before checking for 64bit limitation
The 64bit limitation check is compiled and optimized out on 32bit
platforms, but generates a type width warning:

drivers/mmc/tmio-common.c: In function ‘tmio_sd_addr_is_dmaable’:
drivers/mmc/tmio-common.c:376:26: warning: right shift count >= width of type [-Wshift-count-overflow]
  376 |                 if (addr >> 32)
      |                          ^~

Fix the warning by checking the addr type width to see whether the
shift even makes sense in the first place. The width check is also
optimized out at compile time.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2023-04-07 17:13:27 +02:00
Hai Pham
79da1a96c2 i2c: rcar_i2c: Add R-Car Gen4 support
Add support for R-Car Gen4 SoCs into the driver.

While I2C on R-Car Gen4 does support some extra features (Slave Clock
Stretch Select), for now it is treated the same as I2C on R-Car Gen3,
which let us share the same driver.

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> # Use RCAR_64 Kconfig
Reviewed-by: Heiko Schocher <hs@denx.de>
2023-04-07 17:13:27 +02:00
Tom Rini
19d0c64f89 Merge branch 'master_net/phy/prep-cleanup' of https://source.denx.de/u-boot/custodians/u-boot-sh
- PHY framework cleanups
2023-04-07 10:51:49 -04:00
Tom Rini
340bebf9c7 Merge branch '2023-04-06-assorted-updates'
- Make use of the semi-formal "fallthrough" mechanism, update env tools
  to use /run for lockfile, add 2048 game (as a way to test console
  changes), update some CONFIG option logic in Kconfig, have lmb command
  show regions in use, remove some duplicate serial code, add
  __gnu_thumb1_case_si code and fix m68k custodian email address.
2023-04-07 10:44:19 -04:00
Hai Pham
a5c7613e61 gpio: renesas: Add R-Car Gen4 support
Add support for the GPIO controller block in the R-Car Gen4 family.

It has a General Input Enable Register (INEN), whose reset state is to
have all inputs disabled.

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-04-07 14:33:50 +02:00
Hai Pham
5a3b074255 ARM: rmobile: Add R-Car Generation 4 support
This adds R-Car Generation 4 (Gen4) support as Renesas ARM64 SoC.

In this version, reusing R-Car Gen3 lowlevel initialize routine [1]
and R-Car Gen3 memory map tables [2] .

[1] arch/arm/mach-rmobile/lowlevel_init_gen3.S
[2] arch/arm/mach-rmobile/memmap-gen3.c

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: - Enable DTO support by default
        - Sort the Kconfig lists
	- Select RCAR_64 Kconfig option to pull in all the shared
	  Kconfig options with Gen3, and use where applicable to
	  deduplicate entries.
	- Fix reference [2] typo in commit message
	- Drop config options moved to Kconfig, rename rest to CFG_
	  accordingly to synchronize with upstream changes. Drop
	  removed CONFIG_VERY_BIG_RAM.
        - Move board size limit to arch/Kconfig
	- Move GICR_BASE to headers instead of common config]
2023-04-07 14:33:46 +02:00
Marek Vasut
b0177a24d4 phy: Add .set_mode and .set_speed callbacks
Add two new callbacks matching the Linux ones. The .set_mode is used to set
PHY mode and submode, where mode is either USB, Ethernet, and so on, while
submode is e.g. for Ethernet case RGMII, RMII, and so on. The .set_speed is
used to configure link speed into the PHY. Unlike the existing configure
callback, which is used to pass arbitrary custom information to the PHY,
these two callbacks are used to pass standardized set of information to
the PHY.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-04-07 14:23:26 +02:00
Marek Vasut
12a8efbcdd phy: Fix kerneldoc alignment
Insert missing space in front of asterisk to avoid checkpatch warning.
Replace 'beeing' with 'being' as well, to fix another checkpatch warning.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-04-07 14:23:26 +02:00
Marek Vasut
ab9b812989 phy: Add empty generic_phy_configure() implementation for PHY disabled case
In case PHY is not enabled, the generic_phy_configure() implementation is
missing. Add an empty one so that the list of empty functions is complete.

Fixes: f8da8a82c5 ("generic-phy: add configure op")
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-04-07 14:23:26 +02:00
Marek Vasut
b6fcab0728 net: phy: marvell10g: Adapt Marvell 10G PHY driver from Linux
Pull Marvell 10G PHY driver from Linux 6.1.y as of commit
d6d29292640d3 ("net: phy: marvell10g: select host interface configuration")
and heavily adapt to match U-Boot PHY framework. Support for
hwmon is removed as is much other functionality which could
not be tested, this results in much simpler driver which can
only bring the PHY up and set MAC type.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2023-04-07 14:21:37 +02:00
Marek Vasut
9e53d5f580 net: phy: Add MDIO PCS 2.5G and 5G speed macros from Linux
Add MDIO PCS 2.5G and 5G speed macros from Linux 5.1.y as of commit
7fd8afa8933a0 ("net: phy: Add generic support for 2.5GBaseT and 5GBaseT")
This is used by the upcoming Marvell 10G PHY driver.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2023-04-07 14:21:37 +02:00
Marek Vasut
1f614d5246 net: phy: Add phy_read_mmd_poll_timeout() from Linux
Add phy_read_mmd_poll_timeout() from Linux 5.7.y as of commit
bd971ff0b7392 ("net: phy: introduce phy_read_mmd_poll_timeout macro")
This is used by the upcoming Marvell 10G PHY driver.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2023-04-07 14:21:37 +02:00
Marek Vasut
87b7502824 net: phy: Add phy_modify_mmd() and phy_modify_mmd_changed() from Linux
Add phy_modify_mmd()/phy_modify_mmd_changed() from Linux 5.1.y as of commit
b8554d4f7288f ("net: phy: add register modifying helpers returning 1 on change")
This is used by the upcoming Marvell 10G PHY driver.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2023-04-07 14:21:37 +02:00
Marek Vasut
bf3dabb7de net: phy: marvell: Import and use marvell_phy.h from Linux
Import marvell_phy.h from Linux 5.14.y as of commit
a5de4be0aaaa6 ("net: phy: marvell10g: fix differentiation of 88X3310 from 88X3340")
and use it in marvell PHY driver instead of current ad-hoc macros.
Two of the PHY IDs are unknown to Linux, 88E1149S and 88E1680, for
those two, only sync the length of the hexadecimal number to 8 digits.

No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2023-04-07 14:21:37 +02:00
Marek Vasut
75d28899e3 net: phy: Synchronize PHY interface modes with Linux
Synchronize PHY interface modes with Linux next 6.2.y commit:
0194b64578e90 ("net: phy: improve phy_read_poll_timeout")

Retain LX2160A/LX2162A PHY modes as those are not yet supported
by the Linux kernel, but isolate those with ifdeffery.

Isolate NCSI which are also not supported by Linux kernel. Note
that the ifdeffery cannot be avoided with IS_ENABLED() here due
to compilation of the entire conditional, which would fail in
case NCSI symbols are not available.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2023-04-07 14:20:53 +02:00
Marek Vasut
166ea49750 net: mvpp2: Replace PHY_INTERFACE_MODE_SFI with 5GBASER/10GBASER/XAUI
Replace PHY_INTERFACE_MODE_SFI with PHY_INTERFACE_MODE_5GBASER,
PHY_INTERFACE_MODE_10GBASER and PHY_INTERFACE_MODE_XAUI to match
Linux PHY interface modes.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2023-04-07 14:20:53 +02:00
Marek Vasut
6b1948d81a net: mvpp2: Drop PHY_INTERFACE_MODE_SGMII_2500 support
This mode does not seem to be well defined and used anywhere, remove support for it.
Based on discussion:
- 1000baseX does c37 AN of duplex+pause
- SGMII does AN of duplex+pause+speed, at lower speed bytes are repeated 10x/100x
- 2500baseX does not do AN, or does very different c73 AN
- SGMII 2500 behavior is unclear

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2023-04-07 14:20:53 +02:00
Marek Vasut
9461d73de9 net: phy: Only call phy_init() on systems needing manual relocation
The phy_init() is now used only to perform manual relocation of PHY
driver callbacks. Wrap it in ifdeffery and only call it on systems
which still require manual relocation, i.e. m68k .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Acked-by: Michal Simek <michal.simek@amd.com>
Tested-by: Michal Simek <michal.simek@amd.com> #microblaze (MANUAL_RELOC)
2023-04-07 14:18:51 +02:00
Marek Vasut
c878e70beb net: phy: Re-inline phy_drv_reloc()
Wrap phy_drv_reloc() back into phy_init() to reduce ifdeffery,
since phy_drv_reloc() is now called only from one call site.
No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Acked-by: Michal Simek <michal.simek@amd.com>
Tested-by: Michal Simek <michal.simek@amd.com> #microblaze (MANUAL_RELOC)
2023-04-07 14:18:51 +02:00
Marek Vasut
7da03bbc57 net: phy: Drop unused phy_register()
This function is no longer used, drop it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Acked-by: Michal Simek <michal.simek@amd.com>
Tested-by: Michal Simek <michal.simek@amd.com> #microblaze (MANUAL_RELOC)
2023-04-07 14:18:51 +02:00
Marek Vasut
8728d4c032 net: phy: Drop static phy_drivers list
The static phy_drivers list is superseded by linker list of struct phy_drivers
now that all drivers have been converted to the later. Drop the phy_drivers
list as well as list_head from struct phy_driver.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Acked-by: Michal Simek <michal.simek@amd.com>
Tested-by: Michal Simek <michal.simek@amd.com> #microblaze (MANUAL_RELOC)
2023-04-07 14:18:51 +02:00