Commit graph

33574 commits

Author SHA1 Message Date
Thomas Chou
744b57b8a6 nios2: use dram bank in board info
Use dram bank in board info, so that it displays correct
memory values in bdinfo command.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Marek Vasut <marex@denx.de>
2015-11-06 09:14:11 +08:00
Thomas Chou
2de4823dc0 nios2: change virt_to_phys to use physaddr_mask in global data
As virt_to_phys() is used a lot in DMA transfer, change it
to use physaddr_mask in global data. This will save an "if"
statement and get a little faster.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Marek Vasut <marex@denx.de>
2015-11-06 09:14:11 +08:00
Thomas Chou
1cda48f333 nios2: remove the useless parenthesis in asm/io.h
Remove the useless parenthesis in asm/io.h as suggested
by Marek.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Marek Vasut <marex@denx.de>
2015-11-06 09:14:11 +08:00
Thomas Chou
1ce61cbbe7 nios2: fix map_physmem to do real cache mapping
Fix the map_physmem() to do real cache mapping.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Marek Vasut <marex@denx.de>
2015-11-06 09:14:11 +08:00
Tom Rini
ed02c532be Merge branch 'master' of git://git.denx.de/u-boot-video 2015-11-05 07:47:21 -05:00
Tom Rini
60b25259a5 Merge git://git.denx.de/u-boot-samsung 2015-11-05 07:46:45 -05:00
Tom Rini
1674942ad7 Merge git://git.denx.de/u-boot-usb 2015-11-05 07:46:37 -05:00
Tom Rini
28824407f3 Merge git://git.denx.de/u-boot-socfpga 2015-11-05 07:46:28 -05:00
Bin Meng
4b6d09449f video: Drop DEV_EXT_VIDEO flag
DEV_EXT_VIDEO does not have any actual meaning, hence drop it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2015-11-05 08:24:42 +01:00
Bin Meng
1caf934a05 video: Drop DEV_FLAGS_SYSTEM flag
DEV_FLAGS_SYSTEM does not have any actual meaning, hence drop it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2015-11-05 08:22:21 +01:00
Przemyslaw Marczak
58cb44cf66 sandbox: adc: Add missing header file
Commit: sandbox: add ADC driver

adds the driver without its main header file.
It causes build brake for sandbox_defonfig.

This commit adds a missing header:
- include/sandbox-adc.h

Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2015-11-05 12:58:04 +09:00
Chin Liang See
a55f28624e arm: dts: socfpga: Increase the spi-max-frequency for QSPI flash
With a working QSPI calibration, the SCLK can now run up to 100MHz

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Vikas Manocha <vikas.manocha@st.com>
Cc: Jagannadh Teki <jteki@openedev.com>
Cc: Pavel Machek <pavel@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jagan Teki <jteki@openedev.com>
2015-11-05 02:34:15 +01:00
Chin Liang See
4e609b6cb1 spi: cadence_qspi: Ensure check for max frequency in place
Ensure the intended SCLK frequency not exceeding the maximum
frequency. If that happen, SCLK will set to maximum frequency.

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Vikas Manocha <vikas.manocha@st.com>
Cc: Jagannadh Teki <jteki@openedev.com>
Cc: Pavel Machek <pavel@denx.de>
Acked-by: Pavel Machek <pavel@denx.de>
2015-11-05 02:34:15 +01:00
Chin Liang See
040f4ba742 spi: cadence_qspi: Fix fdt read of spi-max-frequency
Fix the fdt read for spi-max-frequency as it's contained
in the child node. Current state of code is always
returning default value.

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Vikas Manocha <vikas.manocha@st.com>
Cc: Jagannadh Teki <jteki@openedev.com>
Cc: Pavel Machek <pavel@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Pavel Machek <pavel@denx.de>
2015-11-05 02:34:15 +01:00
Chin Liang See
98fbd71d7a spi: cadence_qspi: Ensure spi_calibration is run when sclk change
Ensuring spi_calibration is run when there is a change of sclk
frequency. This will ensure the qspi flash access works for high
sclk frequency

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Vikas Manocha <vikas.manocha@st.com>
Cc: Jagannadh Teki <jteki@openedev.com>
Cc: Pavel Machek <pavel@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jagan Teki <jteki@openedev.com>
2015-11-05 02:34:15 +01:00
Chin Liang See
bfa3e55b44 lib, fdt: Adding fdtdec_get_uint function
Adding fdtdec_get_uint function which is the
unsigned version for fdtdec_get_int

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Vikas Manocha <vikas.manocha@st.com>
Cc: Jagannadh Teki <jteki@openedev.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Heiko Schocher <hs@denx.de>
2015-11-05 02:34:14 +01:00
Tom Rini
8168ee38c2 Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx 2015-11-04 18:30:51 -05:00
Andy Fleming
87e29878ca mpc85xx: Add support for the Varisys Cyrus board
This board runs a P5020 or P5040 chip, and utilizes
an EEPROM with similar formatting to the Freescale P5020DS.

Large amounts of this code were developed by
Adrian Cox <adrian at humboldt dot co dot uk>

Signed-off-by: Andy Fleming <afleming@gmail.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-11-04 15:19:34 -08:00
Andy Fleming
c79e1c1ce9 rtc: Add MCP79411 support to DS1307 rtc driver
The code is from Adrian Cox, and is patterned after similar
support in Linux (drivers/rtc/rtc-ds1307.c:1121-1135). This
chip is used on the Cyrus board from Varisys.

Signed-off-by: Andy Fleming <afleming@gmail.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-11-04 15:19:12 -08:00
Michal Simek
1e370ef7e7 ARM: zynq: Remove zc70x target
Remove zc70x target which was one setting for zc702 and zc706.
Currently zc702 and zc706 are separated.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2015-11-04 14:49:53 +01:00
Simon Glass
42800ffa79 arm: zynq: Move serial driver to driver model
Update this driver to use driver model and change all users.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-11-04 14:49:53 +01:00
Simon Glass
325c8d569e arm: zynq: serial: Drop non-device-tree serial driver portions
Since we use device tree in SPL also, we can drop this code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-11-04 14:49:53 +01:00
Michal Simek
c2490bf546 ARM: zynqmp: Enable DM and OF binding
SPI requires DM and OF that's why enable DM for ZynqMP
and start to use configuration based on embedded OF.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2015-11-04 14:49:53 +01:00
Simon Glass
035c6b271d arm: zynq: dts: Add U-Boot device tree additions
We need to mark some device tree nodes so that they are available before
relocation. This enables driver model to find these automatically. In the
case of SPL it ensures that these nodes will be retained in SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-11-04 14:49:53 +01:00
Simon Glass
71556fbcbf dm: arm: zynq: Enable device tree control in SPL
Move to using device tree control in SPL so that we can use the same driver
code in both SPL and U-Boot proper.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-11-04 14:49:53 +01:00
Simon Glass
c54c0a4c1c arm: zynq: Support the debug UART
Add support for the debug UART to assist with early debugging. Enable it
for Zybo as an example.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-11-04 14:49:52 +01:00
Simon Glass
bd44758a41 arm: zynq: Drop unnecessary code in SPL board_init_f()
Move to the new way of starting up SPL. Clearing of BSS and calling
board_init_r() is now handled by crt0.S.

Also tidy up the header include order.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-11-04 14:49:52 +01:00
Simon Glass
fa43f69e03 arm: zynq: Use separate device tree instead of embedded
Production boards should not use CONFIG_OF_EMBED. Fix this for the Zybo
boards.

The image to use now becomes u-boot-dtb.bin.

For example, the .bif file should contain a line like:

  [load = 0x04000000,startup=0x04000000]/path/to/u-boot-dtb.bin

instead of:

  [load = 0x04000000,startup=0x04000000]/path/to/u-boot.bin

When device tree is enabled we need to load u-boot-dtb.img. Change the
settings so that SPL does the right thing.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-11-04 14:49:52 +01:00
Simon Glass
1017296247 dm: spl: Support device tree when BSS is in a different section
At present in SPL we place the device tree immediately after BSS. This
avoids needing to copy it out of the way before BSS can be used. However on
some boards BSS is not placed with the image - e.g. it can be in RAM if
available.

Add an option to tell U-Boot that the device tree should be placed at the
end of the image binary (_image_binary_end) instead of at the end of BSS.

Note: A common reason to place BSS in RAM is to support the FAT filesystem.
We should update the code so that it does not use so much BSS.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-11-04 14:49:52 +01:00
Simon Glass
021b4d117c dm: spl: Generate u-boot-spl-dtb.bin only when enabled
At present this file is generated even when device tree is not enabled in
SPL. Avoid this, since this file serves no purpose in that case.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-11-04 14:49:52 +01:00
Simon Glass
6bdc593e96 dm: serial: Deal with stdout-path with an alias
Sometimes stdout-path contains a UART alias along with speed, etc. For
example:

	stdout-path = "serial0:115200n8";

Add support for decoding this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-11-04 14:49:52 +01:00
Simon Glass
f403914dfc fdtgrep: Simplify the alias generation code
We don't need to allocate a new region list when we run out of space.
The outer function can take care of this for us.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-11-04 14:49:51 +01:00
Simon Glass
9d8ac956af fdt: Correct handling of alias regions
At present the last four bytes of the alias region are dropped in
the case where the last alias is included. This results in a corrupted
device tree. Fix this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-11-04 14:49:51 +01:00
Simon Glass
3bc37a50e0 fdt: Add a function to look up a /chosen property
It is sometimes useful to find a property in the chosen node. Add a function
for this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-11-04 14:49:51 +01:00
Michal Simek
44303dfa79 ARM: zynqmp: Add DTS for ep108 board
Add DTS for ep108 board.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Series-to: u-boot
2015-11-04 14:49:51 +01:00
Siva Durga Prasad Paladugu
1c3f2c7270 zynq-common: Define CONFIG_SYS_I2C_ZYNQ based on board config
Enable CONFIG_SYS_I2C_ZYNQ only if it has either I2C0 or I2C1
enabled in a board config.This fixes the issue of i2c error
during board init if board specific doesnt have either I2C0
or I2C1.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-11-04 14:49:51 +01:00
Dinh Nguyen
c624d07f3f arm: socfpga: reset: correct dma, qspi, and sdmmc reset bit defines
The DMA, QSPI, and SD/MMC reset bits are located in the permodrst register,
not the mpumodrst. So the bank for these reset bits should be 1, not 0.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-11-03 17:32:16 +01:00
Michal Simek
f6fcebf5c1 usb: udc: Fix warnings on 64-bit builds
Cast u32 bit value to 64bit before recasting to 64bit pointer to avoid
pointer from integer cast size mismatch warnings.

Warning log:
+../drivers/usb/gadget/udc/udc-core.c: In function
‘usb_gadget_unmap_request’:
+../drivers/usb/gadget/udc/udc-core.c:68:19: warning: cast to pointer
from integer of different size [-Wint-to-pointer-cast]

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-11-03 17:29:54 +01:00
Michal Simek
32191755d7 usb: lthor: Specify correct parameter for sizeof type
This patch removes this warning:
  CC      drivers/usb/gadget/f_thor.o
drivers/usb/gadget/f_thor.c: In function ‘thor_tx_data’:
drivers/usb/gadget/f_thor.c:572:2: warning: format ‘%d’ expects argument
of type ‘int’, but argument 4 has type ‘long unsigned int’ [-Wformat=]
  debug("%s: dev->in_req->length:%d to_cpy:%d\n", __func__,
  ^

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-11-03 17:29:54 +01:00
Michal Simek
01c94c4a6e usb: dwc3: Fix warnings on 64-bit builds
Change aritmentics to use 64bit types to be compatible with 64bit
builds.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-11-03 17:29:54 +01:00
Vignesh R
5486d067a8 ARM: dra7xx_evm: Add DFU support for qspi flash
This adds support to update firmware on qspi flash using DFU.

On device:
=> setenv dfu_alt_info ${dfu_alt_info_qspi}
=> dfu 0 sf 0:0

On host:
$ sudo dfu-util -l
$ sudo dfu-util -D MLO -a MLO
$ sudo dfu-util -D u-boot.img -a u-boot.img

Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-11-03 17:29:33 +01:00
Vignesh R
30e3ea4c79 dfu: dfu_sf: Pass duplicate devstr to parse_dev
parse_dev() alters the string pointed by devstr parameter. Due to this
subsequent parsing of sf entities will fail, as string pointed by devstr
is no longer valid sf dev arguments.
Fix this by passing pointer to the copy of the string to parse_dev
instead of pointer to the actual devstr.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-11-03 17:29:33 +01:00
Hans de Goede
b748b24fb5 ohci: Add missing cache-flush for hcca area
We need to cache-flush the hcca area after the initial memset, otherwise
on the first hc_interrupt we might see an old $random value as done_head and
try to interpret that as the address for a completed td (followed by chaos).

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-11-03 17:29:33 +01:00
Tom Rini
f5fb78a274 common/usb_storage.c: Clean up usb_storage_probe()
We have the protocol and subclass variables which are used only in
disabled debug code.  This code dates back to the initial git import and
seemingly dead code so remove it.

This was detected by Coverity (CID 131117)

Signed-off-by: Tom Rini <trini@konsulko.com>
2015-11-03 17:29:33 +01:00
Daniel Gorsulowski
83bf005710 arm: at91: reworked meesc board support
Signed-off-by: Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
2015-11-03 14:21:32 +01:00
Wenyou Yang
a3b59b1523 mmc: atmel: Add atmel sdhci support
The SDHCI is introduced by sama5d2, named as Secure Digital Multimedia
Card Controller(SDMMC). It supports the embedded MultiMedia Card (e.MMC)
Specification V4.41, the SD Memory Card Specification V3.0, and the SDIO
V3.0 specification. It is compliant with the SD Host Controller Standard
V3.0 specification.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
2015-11-03 14:21:31 +01:00
Wenyou Yang
c19000556e arm: at91: clock: Add the generated clock support
Some peripherals may need a second clock source that may be different
from the system clock. This second clock is the generated clock (GCK)
and is managed by the PMC via PMC_PCR.

For simplicity, the clock source of the GCK is fixed to PLLA_CLK.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
2015-11-03 14:21:31 +01:00
Wenyou Yang
79667b7b76 mmc: sdhci: Fix the SD clock stop sequence
According to the SDHC specification, stopping the SD Clock is by setting
the SD Clock Enable bit in the Clock Control register at 0, instead of
setting all bits at 0.

Before stopping the SD clock, we need to make sure all SD transactions
to complete, so add checking the CMD and DAT bits in the Presen State
register, before stopping the SD clock.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
2015-11-03 14:21:30 +01:00
Wenyou Yang
ce39680f7e arm: at91: Change the Chip ID registers' addresses
Provide the specific addresses for the Chip ID and Chip ID Extension
registers, instead of the offset, which make it use on other chips.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
2015-11-03 14:21:30 +01:00
Shengzhou Liu
96d59e9d6a mpc85xx/t2081: enable parsing DDR ratio for T2081 rev1.1
T2081 rev 1.1 changes MEM_PLL_RAT in RCW which requires new parsing
for PLL ratio.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-11-02 08:51:50 -08:00