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8 commits

Author SHA1 Message Date
Matthew McClintock
087454609e * Added support for initializing second PCI bus on 85xx 
Patch by Andy Fleming 17-Mar-2006

Signed-off-by: Andy Fleming <afleming@freescale.com>
 2006-06-28 10:45:17 -05:00
Jon Loeliger
de1d0a6995 Fix style issues primarily in 85xx and 83xx boards. 
- C++ comments
    - Trailing white space
    - Indentation not by TAB
    - Excessive amount of empty lines
    - Trailing empty lines
 2005-08-01 13:20:47 -05:00
Jon Loeliger
d9b94f28a4 * Patch by Jon Loeliger, 2005-05-05 
Implemented support for MPC8548CDS board.
  Added DDR II support based on SPD values for MPC85xx boards.
  This roll-up patch also includes bugfies for the previously
  published patches:
    DDRII CPO, pre eTSEC, 8548 LBIU, Andy's TSEC, eTSEC 3&4 I/O
 2005-07-25 14:05:07 -05:00
Jon Loeliger
9c4c5ae3e1 * Patch by Jon Loeliger, Kumar Gala 2005-02-08 
- Convert the CPM2 based functionality to use new CONFIG_CPM2
    option rather than a myriad of CONFIG_MPC8560-like variants.
    Applies to MPC85xx and MPC8260 boards, includes stxgp3 and sbc8560.
    Eliminates the CONFIG_MPC8560 option entirely.  Distributes the
    new CONFIG_CPM2 option to each 8260 board.
 2005-07-23 10:37:35 -05:00
wdenk
343117bf12 Fix timer handling on MPC85xx systems 2005-05-13 22:49:36 +00:00
wdenk
03f5c55021 Patches by Jon Loeliger, 24 Aug 2004: 
- Add support for the MPC8541 and MPC8555 CDS boards
- Cleanup eth?addr handling: make dependent on CONFIG_ETH?ADDR
 2004-10-10 21:21:55 +00:00
wdenk
547b4cb25e Patches by Jon Loeliger, 11 May 2004: 
(partially, as they contained a lot of crap)
 2004-06-09 00:51:50 +00:00
wdenk
42d1f0394b * Patches by Xianghua Xiao, 15 Oct 2003: 
- Added Motorola CPU 8540/8560 support (cpu/85xx)
  - Added Motorola MPC8540ADS board support (board/mpc8540ads)
  - Added Motorola MPC8560ADS board support (board/mpc8560ads)

* Minor code cleanup
 2003-10-15 23:53:47 +00:00