Commit graph

18 commits

Author SHA1 Message Date
Yoshio Furuyama
d5ce263100 mtd: spinand: toshiba: Support for new Kioxia Serial NAND
Add support for new Kioxia products.
The new Kioxia products support program load x4 command, and have
HOLD_D bit which is equivalent to QE bit.

Signed-off-by: Yoshio Furuyama <ytc-mb-yfuruyama7@kioxia.com>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/aa69e455beedc5ce0d7141359b9364ed8aec9e65.1584949601.git.ytc-mb-yfuruyama7@kioxia.com
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-05-28 01:24:03 +05:30
Yoshio Furuyama
5f8d677839 mtd: spinand: toshiba: Rename function name to change suffix and prefix (8Gbit)
The suffix was changed from "G" to "J" to classify between 1st generation
and 2nd generation serial NAND devices (which now belong to the Kioxia
brand).
As reference that's
1st generation device of 1Gbit product is "TC58CVG0S3HRAIG"
2nd generation device of 1Gbit product is "TC58CVG0S3HRAIJ".

The 8Gbit type "TH58CxG3S0HRAIJ" is new to Kioxia's serial NAND lineup and
the prefix was changed from "TC58" to "TH58".

Thus the functions were renamed from tc58cxgxsx_*() to tx58cxgxsxraix_*().

Signed-off-by: Yoshio Furuyama <ytc-mb-yfuruyama7@kioxia.com>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/0dedd9869569a17625822dba87878254d253ba0e.1584949601.git.ytc-mb-yfuruyama7@kioxia.com
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-05-28 01:24:03 +05:30
Simon Glass
cd93d625fd common: Drop linux/bitops.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:23 -04:00
Simon Glass
eb41d8a1be common: Drop linux/bug.h from common header
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18 21:19:23 -04:00
Robert Marko
f5fba6e85b mtd: nand: spi: add support for Toshiba TC58CVG2S0HRAIJ
Toshiba recently launched new revisions of their serial SLC NAND series.
TC58CVG2S0HRAIJ is a refresh of previous series with minor improvements.
Basic parameters are same so lets add support for this new revision.

Datasheet: https://business.kioxia.com/info/docget.jsp?did=58601&prodName=TC58CVG2S0HRAIJ

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Tested-by: Luka Kovacic <luka.kovacic@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-04-29 01:44:35 +05:30
Robert Marko
8912710484 mtd: spi-nand: Import Toshiba SPI-NAND support
Linux has good support for Toshiba SPI-NAND, so lets import it.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Tested-by: Luka Kovacic <luka.kovacic@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-04-29 01:44:35 +05:30
Simon Glass
336d4615f8 dm: core: Create a new header file for 'compat' features
At present dm/device.h includes the linux-compatible features. This
requires including linux/compat.h which in turn includes a lot of headers.
One of these is malloc.h which we thus end up including in every file in
U-Boot. Apart from the inefficiency of this, it is problematic for sandbox
which needs to use the system malloc() in some files.

Move the compatibility features into a separate header file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05 19:33:46 -07:00
Simon Glass
61b29b8268 dm: core: Require users of devres to include the header
At present devres.h is included in all files that include dm.h but few
make use of it. Also this pulls in linux/compat which adds several more
headers. Drop the automatic inclusion and require files to include devres
themselves. This provides a good indication of which files use devres.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-02-05 19:33:46 -07:00
Simon Glass
8d38a8459b mtd: Rename free() to rfree()
This function name conflicts with our desire to #define free() to
something else on sandbox. Since it deals with resources, rename it to
rfree().

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05 19:33:46 -07:00
Robert Marko
370d33bc8c mtd: spinand: winbond: Add support for W25N01GV
Linux has supported W25N01GV for a long time, so lets import it.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-01-27 22:27:22 +05:30
Miquel Raynal
1de770d544 mtd: rename CONFIG_MTD -> CONFIG_DM_MTD
CONFIG_MTD must be reserved for the MTD core. Like any other
subsystem, prefix the symbol by DM when it comes to DM support.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
[trini: Add Kconfig files]
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-12-03 23:04:10 -05:00
Stefan Roese
d67fb265d1 mtd: spinand: Sync GigaDevice GD5F1GQ4UExxG with latest Linux version
This patch sync's the U-Boot SPI NAND GigaDevice GD5F1GQ4UExxG support
with the latest Linux version (v5.0-rc3) plus the chip supported posted
on the MTD list. Only the currently in U-Boot available chip is
supported with this sync.

The changes for the GD5F1GQ4UExxG are:
- Name of NAND device changed to better reflect the real part
- OOB layout changed to only reserve 1 byte for BBT
- Use ECC caps 8bits/512bytes instead of 8bits/2048bytes
- Enhanced ecc_get_status() function to determine and report
  a more fine grained bit error status

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Boris Brezillon <bbrezillon@kernel.org>
Cc: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Jagan Teki <jagan@openedev.com>
2019-04-12 10:54:11 +05:30
Stefan Roese
9e5c2a755a mtd: nand: spi: Add Gigadevice SPI NAND support
This patch adds support for Gigadevices SPI NAND device to the new SPI
NAND infrastructure in U-Boot. Currently only the 128MiB GD5F1GQ4UC
device is supported.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: Boris Brezillon <boris.brezillon@bootlin.com>
Cc: Jagan Teki <jagan@openedev.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Jagan Teki <jagan@openedev.com>
2018-10-04 18:24:24 +05:30
Miquel Raynal
515d021261 mtd: spinand: Add initial support for the MX35LF2GE4AB chip
Add support for the MX35LF2GE4AB chip, which is similar to its cousin
MX35LF1GE4AB, with two planes instead of one.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Jagan Teki <jagan@openedev.com>
2018-09-20 20:10:49 +05:30
Boris Brezillon
6f041ccabb mtd: spinand: Add initial support for the MX35LF1GE4AB chip
Add minimal support for the MX35LF1GE4AB SPI NAND chip.

Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Acked-by: Jagan Teki <jagan@openedev.com>
2018-09-20 20:10:49 +05:30
Frieder Schrempf
3181c0a622 mtd: spinand: Add initial support for Winbond W25M02GV
Add support for the W25M02GV chip.

Signed-off-by: Frieder Schrempf <frieder.schrempf@exceet.de>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Jagan Teki <jagan@openedev.com>
2018-09-20 20:10:49 +05:30
Peter Pan
883d8778ae mtd: spinand: Add initial support for Micron MT29F2G01ABAGD
Add a basic driver for Micron SPI NANDs. Only one device is supported
right now, but the driver will be extended to support more devices
afterwards.

Signed-off-by: Peter Pan <peterpandong@micron.com>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Jagan Teki <jagan@openedev.com>
2018-09-20 20:10:49 +05:30
Peter Pan
0a6d6bae03 mtd: nand: Add core infrastructure to support SPI NANDs
Add a SPI NAND framework based on the generic NAND framework and the
spi-mem infrastructure.

In its current state, this framework supports the following features:

- single/dual/quad IO modes
- on-die ECC

Signed-off-by: Peter Pan <peterpandong@micron.com>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Jagan Teki <jagan@openedev.com>
2018-09-20 20:10:49 +05:30