Commit graph

14595 commits

Author SHA1 Message Date
Simon Glass
69bc15d5ff sandbox: Support booting from TPL to SPL
At present we support booting from SPL to U-Boot proper. Add support for
the previous stage too, so sandbox can be started with TPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:26 -06:00
Simon Glass
056a5cea31 sandbox: Add a way to write data to the host filesystem
For debugging it is sometimes useful to write out data for inspection
using an external tool. Add a function which can write this data to a
given file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:26 -06:00
Simon Glass
50b288aca3 sandbox: Support file truncation with os_open()
At present files are not truncated on writing. This is a useful feature.
Add support for this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09 04:40:26 -06:00
Loic Devulder
c45414b542 ARM: meson: Extend mem_map to support 3GiB of RAM
The current mem_map definition for Meson SoCs has support for up
to 2GiB of RAM. According to S905, S905X, S912 and S805X datasheets
the DDR region is set from 0x00000000 to 0xBFFFFFFF, so mem_map's
definition should be changed accordingly.

It is also needed to be able to boot Khadas VIM2 board with S912
SoC.

Signed-off-by: Loic Devulder <ldevulder@suse.de>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
2018-10-08 14:45:02 -04:00
Simon Glass
9f8037ea9c sandbox: Unprotect DATA regions in bus tests
On my Ubuntu 18.04.1 machine two driver-model bus tests have started
failing recently. The problem appears to be that the DATA region of the
executable is protected. This does not seem correct, but perhaps there
is a reason.

To work around it, unprotect the regions in these tests before accessing
them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-08 07:34:34 -06:00
Jens Wiklander
0a60a81ba3 Kconfig: sandbox: enable cmd_avb and dependencies
Enables cmd_avb and its dependencies need to run the AVB tests.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
[trini: Disable for sandbox_noblk]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-10-07 13:34:19 -04:00
Jens Wiklander
fe39e8e0ee sandbox: imply CONFIG_TEE (TEE uclass)
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
2018-10-07 10:48:26 -04:00
Jens Wiklander
fa830ae1e4 sandbox: dt: add sandbox_tee node
Adds a sandbox_tee node to enable the sandbox tee driver in all the
sandbox dts files.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
2018-10-07 10:48:26 -04:00
Jens Wiklander
7ab5630a42 arm: dt: hikey: Add optee node
Sync with 14e21cb8f811 ("arm64: dt: hikey: Add optee node"
from Linux kernel.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
2018-10-07 10:47:38 -04:00
Patrice Chotard
362612df53 mach-stm32: Set MPU SDRAM size to 512MB for STM32F7/H7
This allows to boot all STM32F7 and STM32H7 boards independently
of the amount of embedded SDRAM.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
2018-10-06 14:09:41 -04:00
Adam Ford
5ad4212ce0 ARM: DTS: Add Logic PD OMAP35/DM37 SOM-LV and OMAP35 Torpedo
With the device trees doing most of the work of pin-muxing and
DM doing much of the peripheral initialization, this creates
new defconfig files for each of the Logic PD variants with
proper register settings/pin-muxing.

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Update MAINTAINERS entry]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-10-06 14:09:27 -04:00
Adam Ford
e2e30f50a9 ARM: DTS: Add support for Logic PD OMAP35 Torpedo & SOM-LV
The baseboards and SOM's are virtually identical to their DM37
counterparts, but OMAP36/37 and OMAP3 have some minor register
differences.  With the boards being mostly driven by device trees
now, this synchronizes their respective device trees with linux-omap
for-next branch destined for 4.20 (or whatever the version after 4.19
will be called)

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-10-06 09:04:18 -04:00
Adam Ford
c981cb8dda ARM: DTS: Remove unnecessary u-boot.dtsi options from omap3/36xx
With the introduction of the omap serial driver, the need for some
of these U-Boot specific modifications is gone.  This cleans up
this unnneeded stuff.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-10-06 09:04:18 -04:00
Adam Ford
87555d1415 ARM: DTS: LogicPD-SOM-LV & Torpedo: Resync DTS with Kernel
The device tree entries are from linux-omap's for-next branch
destined to me put into 4.20 (or whatever the version is after 4.19)

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-10-06 09:04:18 -04:00
Tom Rini
14573fb78f Merge branch 'master' of git://git.denx.de/u-boot-sh 2018-10-05 21:17:35 -04:00
Tom Rini
1b484736ce Merge branch 'master' of git://git.denx.de/u-boot-socfpga 2018-10-05 21:17:21 -04:00
Tom Rini
a4b38fca7e Rockchip-focused changes for v2018.11-rc2:
- fixes to rkimage for SPL boot via USB
  - fixes to make_fit_atf.py, incl. entry-point calculation and python3
    compatibility
  - OP-TEE support for ARMv7-based SoCs
  - fixes to RGMII/GMII selection on the RK3328
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Merge tag 'rockchip-for-v2018.11-rc2' of git://git.denx.de/u-boot-rockchip

Rockchip-focused changes for v2018.11-rc2:
 - fixes to rkimage for SPL boot via USB
 - fixes to make_fit_atf.py, incl. entry-point calculation and python3
   compatibility
 - OP-TEE support for ARMv7-based SoCs
 - fixes to RGMII/GMII selection on the RK3328

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-10-05 13:40:42 -04:00
Alexey Brodkin
5396e8b1dd arc: Add support for IoT development kit
The DesignWare ARC IoT Development Kit is a versatile platform
that includes the necessary hardware and software to accelerate
software development and debugging of sensor fusion,
voice recognition and face detection designs.

More information is avaialble here [1] and here [2].

The board is based on real silicon with
ARC EM9D-based Data Fusion IP Subsystem.

It sports a rich set of I/O including
 * DW USB OTG
 * DW MobileStorage (used for micro SD-card)
 * GPIO
 * multiple serial interface including DW APB UART
 * ADC, PWM and eFlash, SRAM and SPI Flash memory
 * Real-Time Clock (RTC)
 * Bluetooth module with worldwide regulatory compliance
   (FCC, IC, CE, ETSI, TELEC)
 * On-board 9-axis sensor (gyro, accelerometer and compass)

Extensible with Arduino, Pmod, mikroBUS connectors and a 2x18
extension header.

One of the most interesting features for developers is built-in
Digilent USB JTAG probe so only micro-USB cable is needed!

[1] https://www.synopsys.com/dw/ipdir.php?ds=arc_iot_development_kit
[2] https://www.synopsys.com/dw/doc.php/ds/cc/iot_dev_kit.pdf

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-10-05 16:57:00 +03:00
Alexey Brodkin
7fe46b969d ARC: Implement print_cpuinfo()
Once we enable DISPLAY_CPUINFO for ARC we'll see
ARC core family and version printed on boot.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-10-05 16:55:42 +03:00
Alexey Brodkin
c3dcd508b6 ARC: Add model property to boards .dts
1. This way we sync with Linux kernel where we have model
   set for all ARC boards for quite some time, see [1]

2. Once we enable DISPLAY_BOARDINFO for ARC this info will
   be printed on boot givin some extra data-point about the board

[1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=618a9cd06dd471ac232f5b27325b24d26eba5571

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-10-05 16:55:42 +03:00
Alexey Brodkin
56ddae7d91 ARC: Don't pre-define CROSS_COMPILE
Even though arc-linux- prefix is used in ARC prebuilt tools and
in Buildroot there're other options like Linux distro cross-tools
etc where prefix is different so let's not rely on this default.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-10-05 16:55:42 +03:00
Mian Yousaf Kaukab
7009eae890 rockchip: make_fit_atf: make python3 compatible
Make script python3 compatible. No functional changes intended.

Signed-off-by: Mian Yousaf Kaukab <yousaf.kaukab@suse.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-10-04 21:15:46 +02:00
Mian Yousaf Kaukab
e4011e8daa rockchip: make_fit_atf: use elf entry point
make_fit_atf.py uses physical address of first segment as the
entry point to bl31. It is incorrect and causes following abort
when bl31_entry() is called:

U-Boot SPL board initTrying to boot from MMC1
"Synchronous Abort" handler, esr 0x02000000
elr: 0000000000000000 lr : 00000000ff8c7e8c
x 0: 00000000ff8e0000 x 1: 0000000000000000
x 2: 0000000000000000 x 3: 00000000ff8e0180
x 4: 0000000000000000 x 5: 0000000000000000
x 6: 0000000000000030 x 7: 00000000ff8e0188
x 8: 00000000000001e0 x 9: 0000000000000000
x10: 000000000007fcdc x11: 00000000002881b8
x12: 00000000000001a2 x13: 0000000000000198
x14: 000000000007fdcc x15: 00000000002881b8
x16: 00000000003c0724 x17: 00000000003c0718
x18: 000000000007fe80 x19: 00000000ff8e0000
x20: 0000000000200000 x21: 00000000ff8e0000
x22: 0000000000000000 x23: 000000000007fe30
x24: 00000000ff8d1c3c x25: 00000000ff8d5000
x26: 00000000deadbeef x27: 00000000000004a0
x28: 000000000000009c x29: 000000000007fd90

Fix it by using the entry point from the elf header.

Signed-off-by: Mian Yousaf Kaukab <yousaf.kaukab@suse.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-10-04 21:15:46 +02:00
Kever Yang
aabb51da59 rockchip: add fit source file for pack itb with op-tee
We package U-Boot and OP-TEE into one itb file for SPL,
so that we can support OP-TEE in SPL.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-10-04 21:15:46 +02:00
Kever Yang
f00273a3a3 rockchip: make_fit_atf: fix warning unit_address_vs_reg
Patch fix warning:
/builddir/BUILD/u-boot-2018.05-rc2/"arch/arm/mach-rockchip/make_fit_atf.py" \
arch/arm/dts/rk3399-firefly.dtb > u-boot.its
  ./tools/mkimage  -f u-boot.its -E u-boot.itb >/dev/null  && cat
/dev/null
u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /images/uboot@1
has a unit name, but no reg property
u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /images/atf@1 has
a unit name, but no reg property
u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /images/atf@2 has
a unit name, but no reg property
u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /images/atf@3 has
a unit name, but no reg property
u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /images/fdt@1 has
a unit name, but no reg property
u-boot.itb.tmp: Warning (unit_address_vs_reg): Node
/configurations/config@1 has a unit name, but no reg property
make[1]: Leaving directory
'/builddir/BUILD/u-boot-2018.05-rc2/builds/firefly-rk3399'

Reported-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-10-04 21:15:46 +02:00
Tom Rini
a1588ac822 Rockchip changes for 2018.11
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Merge tag 'rockchip-for-v2018.11' of git://git.denx.de/u-boot-rockchip

Rockchip changes for 2018.11
2018-10-03 12:09:19 -04:00
Ooi, Joyce
8be11fb3c1 arm: socfpga: stratix10: add sgmii in phymode setup
Additional sgmii phymode is added in socfpga_phymode_setup() along with
a minor fix for maximum number of GMACs.

Signed-off-by: Ooi, Joyce <joyce.ooi@intel.com>
2018-10-03 12:56:50 +02:00
Ley Foon Tan
74c78024a0 arm: socfpga: Remove unused function socfpga_emac_manage_reset()
Remove code from the reset manager that is never called.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2018-10-03 12:56:50 +02:00
Marek Vasut
806df252c1 ARM: rmobile: Enable PHY framework on Gen3
Enable PHY framework on Gen3, this is required for USB EHCI PHY support.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-10-03 12:56:13 +02:00
Marek Vasut
c1ec347638 ARM: rmobile: Mark 4-64GiB as DRAM on Gen3
Mark area 0x1_0000_0000 - 0x10_0000_0000 as DRAM on Gen3 as the
chip is capable of addressing that and U-Boot can make use of it.
This patch prevents exception when accessing those areas.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-10-03 12:56:13 +02:00
Marek Vasut
2da6d39e26 ARM: dts: rmobile: Reinstate missing i2c6 on Porter
The I2C6 is used to communicate with the PMIC and it was removed
during DT sync with Linux 4.17. Reinstate it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-10-03 12:56:12 +02:00
Heinrich Schuchardt
5845f66123 riscv: allow native compilation
If environment variable CROSS_COMPILE is not set, this indicates native
compilation. In this case we should not set an arbitrary value which is
not applicable for 64bit anyway.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-10-03 17:49:44 +08:00
Rick Chen
9d9b3dc0d5 riscv: cosmetic: Reword do_reset() printf message.
The Sentence "reset unsupported yet" is not
grammatically correct and should say
"reset not supported yet" instead.

Suggested-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Signed-off-by: Rick Chen <rick@andestech.com>
2018-10-03 17:49:27 +08:00
Bin Meng
b984ddc2dd riscv: Move do_reset() to a common place
We don't have a reset method on any RISC-V board yet. Instead of
adding the same 'unsupported' message for each CPU variant it might
make more sense to add a generic do_reset function for all CPU
variants to lib/, similar to the one for ARM (arch/arm/lib/reset.c).

Suggested-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2018-10-03 17:48:43 +08:00
Bin Meng
510e379c49 riscv: Add QEMU virt board support
This adds QEMU RISC-V 'virt' board target support, with the hope of
helping people easily test U-Boot on RISC-V.

The QEMU virt machine models a generic RISC-V virtual machine with
support for the VirtIO standard networking and block storage devices.
It has CLINT, PLIC, 16550A UART devices in addition to VirtIO and
it also uses device-tree to pass configuration information to guest
software. It implements RISC-V privileged architecture spec v1.10.

Both 32-bit and 64-bit builds are supported. Support is pretty much
preliminary, only booting to U-Boot shell with the UART driver on
a single core. Booting Linux is not supported yet.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2018-10-03 17:48:37 +08:00
Bin Meng
cd1f45c21d riscv: kconfig: Imply DM support for some common drivers
This implies DM support for some common drivers that are used on
RISC-V.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2018-10-03 17:48:31 +08:00
Bin Meng
bf6cc82c7c riscv: kconfig: Select DM and OF_CONTROL
RISC-V is a pretty new architecture and should support DM and
OF_CONTROL by default.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2018-10-03 17:48:25 +08:00
Bin Meng
4694c93fef riscv: ae350: Clean up mixed tabs and spaces in the dts
There are quite a lot of mixed tabs and spaces in the ae350.dts.
Clean them up.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2018-10-03 17:48:19 +08:00
Bin Meng
b5369c5813 riscv: Make start.S available for all targets
Currently start.S is inside arch/riscv/cpu/ax25/, but it can be
common for all RISC-V targets.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2018-10-03 17:48:14 +08:00
Bin Meng
ed49ba4dcc riscv: bootm: Pass mhartid CSR value to kernel
So far this is hardcoded to zero, and we should read the value from
mhartid CSR and pass it to Linux kernel.

Suggested-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>
2018-10-03 17:48:08 +08:00
Bin Meng
e5ea1e5860 riscv: Remove CSR read/write defines in encoding.h
There is no reason to keep two versions of CSR read/write defines
in encoding.h. We already have one set of defines in csr.h, which
is from Linux kernel, and let's drop the one in encoding.h.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>
2018-10-03 17:48:02 +08:00
Bin Meng
2fab2e9c88 riscv: Add a helper routine to print CPU information
This adds a helper routine to print CPU information. Currently
it prints all the instruction set extensions that the processor
core supports.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2018-10-03 17:47:55 +08:00
Bin Meng
ce7a8e0740 riscv: Explicitly pass -march and -mabi to the compiler
At present the compiler flag against which architecture and abi
variant the riscv image is built for is not explicitly indicated
which means the default compiler configuration is used. But this
does not work if we want to build a different target (eg: 32-bit
riscv images using a toolchain configured for 64-bit riscv).

Fix this by explicitly passing -march and -mabi to the compiler.
Since generically we don't use floating point in U-Boot, specify
the RV[32|64]IMA ISA and software floating ABI.

This also fix some alignment coding style issues.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2018-10-03 17:47:43 +08:00
Bin Meng
3d6015651b riscv: Fix coding style issues in the linker script
There are several coding style issues in the linker script. Fix them.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2018-10-03 17:47:37 +08:00
Bin Meng
dfb828ed1c riscv: Move the linker script to the CPU root directory
The linker script can be shared by all RISC-V targets. Move it to
a common place.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2018-10-03 17:47:31 +08:00
Bin Meng
8cdc6b58d7 riscv: Remove mach type
Since the mach_id is not used by RISC-V, remove it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2018-10-03 17:47:19 +08:00
Bin Meng
4afeedf172 riscv: bootm: Correct the 1st kernel argument to hart id
The first argument of Linux kernel is the risc-v core hart id,
from which the kernel is booted from. It is not the mach_id,
which seems to be copied from arm.

While we are here, this also changes the Linux kernel entry
parameters' type to support both 32-bit and 64-bit.

Note the hart id is hardcoded to zero for now, and we should
change to fill in it with the value read from mhartid CSR of
the hart which this routine is currently running on.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>
2018-10-03 17:46:51 +08:00
Bin Meng
3ad4866dd7 riscv: Remove setup.h
This was copied from ARM, and does not apply to RISC-V. While we
are here, bootm.h is eventually removed as its content is only
the inclusion of setup.h.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2018-10-03 17:44:44 +08:00
Bin Meng
117a433d9e riscv: kconfig: Normalize architecture name spelling
It's RISC-V that is the official name, not RISCV.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>
2018-10-03 17:44:38 +08:00
Tom Rini
592cd5defd Merge branch 'master' of git://git.denx.de/u-boot-spi
This is the PR for SPI-NAND changes along with few spi changes.

[trini: Re-sync changes for ls1012afrwy_qspi*_defconfig]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-10-02 17:01:46 -04:00
Heiko Stuebner
e4d5fa3db0 rockchip: rk3188: explicitly set vcc_sd0 pin to gpio on rk3188-radxarock
It is good practice to make the setting of gpio-pinctrls explicitly in the
devicetree, and in this case even necessary.
Rockchip boards start with iomux settings set to gpio for most pins and
while the linux pinctrl driver also implicitly sets the gpio function if
a pin is requested as gpio that is not necessarily true for other drivers.

The issue in question stems from uboot, where the sdmmc_pwr pin is set
to function 1 (sdmmc-power) by the bootrom when reading the 1st-stage
loader. The regulator controlled by the pin is active-low though, so
when the dwmmc hw-block sets its enabled bit, it actually disables the
regulator. By changing the pin back to gpio we fix that behaviour.

[picked from the identical linux patch
https://patchwork.kernel.org/patch/10609253/]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-10-02 09:35:39 +02:00
Heiko Stuebner
598a26a8fb rockchip: rk3188: add u-boot-specific mmc properties
The dwmmc controllers on rk3188 do not have idma support, so need to
use the fifo-mode and it my tests they became confused and stopped
working if the frequency was to high.

While I only tested in somewhat bigger steps, 32MHz for example
hung the controller, while reducing it to 16MHz worked just fine
and is reasonably fast to load a kernel from mmc.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-10-02 09:35:19 +02:00
Tom Rini
d24c1d0f4d Merge git://git.denx.de/u-boot-dm 2018-09-30 18:16:51 -04:00
Ramon Fried
665e452515 dts: db410c: Add bindings for MSM USB phy
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-09-30 13:00:36 -04:00
Ramon Fried
2df573e6a5 db410c: serial# env using msm board serial
The serial# environment variable needs to be
defined so it will be used by fastboot as serial
for the endpoint descriptor.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-09-30 13:00:35 -04:00
Ramon Fried
6b0861a942 dts: db410c: add alias for USB
Alias is required so req-seq will be filled.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
2018-09-30 13:00:35 -04:00
Tom Rini
b592936d35 Merge branch 'master' of git://git.denx.de/u-boot-video
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-09-29 22:28:44 -04:00
Rajan Vaja
31b8217e83 dm: test: Add "/firmware" node scan test
Add a test which verifies that all subnodes under "/firmware"
nodes are scanned.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Added 'imply FIRMWARE' to sandbox Kconfig to fix test failures, fixed
ordering of lines in arch/sandbox/dts/test.dts and test/dm/Makefile,
updated #if condition in drivers/firmware/firmware-uclass.c:
Signed-off-by: Simon Glass <sjg@chromium.org>
2018-09-29 11:49:35 -06:00
Mario Six
e6fd018108 test: Add tests for board uclass
Add tests for the new board uclass.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-29 11:49:35 -06:00
Tom Rini
cc49e2bdb8 Merge branch 'master' of git://git.denx.de/u-boot-sunxi 2018-09-29 11:48:02 -04:00
Tom Rini
d29a583161 Use device tree for mpc85xx with binman. Enabled for T2080QDS.
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Merge tag 'mpc85xx-for-v2018.11-rc1' of git://git.denx.de/u-boot-mpc85xx

Use device tree for mpc85xx with binman. Enabled for T2080QDS.
2018-09-29 11:47:50 -04:00
Tom Rini
27f622d568 Switch to driver model for eSDHC on Layerscape SoCs including LS1021A,
LS1043A, LS1046A, LS1088A, LS2088A.
 Switch to driver model for SATA on LS1021A and LS1043A.
 Add support for LS1012AFRWY rev C board.
 Enable SMMU for LS1043A.
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Merge tag 'fsl-qoriq-for-v2018.11-rc1' of git://git.denx.de/u-boot-fsl-qoriq

Switch to driver model for eSDHC on Layerscape SoCs including LS1021A,
LS1043A, LS1046A, LS1088A, LS2088A.
Switch to driver model for SATA on LS1021A and LS1043A.
Add support for LS1012AFRWY rev C board.
Enable SMMU for LS1043A.
2018-09-29 11:47:32 -04:00
Adam Ford
973fcc8dae ARM: da850evm_direct_nor_defconfig: Enable DM_SERIAL
With DM enabled, this patch enables DM_SERIAL and removes
the NS16550 initialization from da850_lowlevel since the driver
will take care of that itself.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-09-29 08:07:28 -04:00
Adam Ford
96a82d33f8 ARM: DTS: various omap3: Remove cd-inverted from u-boot.dtsi
With the omap_mmc driver no longer supporting cd-inverted, this
patch removes all these references since they are not needed.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-09-29 08:07:26 -04:00
Adam Ford
f4df405f0e mmc: omap_mmc: Remove invert references
With DM_GPIO and DM_MMC translating GPIO_ACTIVE_LOW, any boards
using the 'cd-invert' option will no longer need to do this.  This
patch removes the support for 'invert' from the MMC driver.

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Fix warning over when !DM_GPIO]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-09-29 08:06:56 -04:00
Eugen Hristev
57fb8b4654 ARM: dts: at91: sama5d4_xplained: add onewire connector for LCD eeprom
Add onewire node in device tree for TM series LCDs

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-28 20:22:44 -04:00
Eugen Hristev
db17fbfd96 ARM: dts: at91: sama5d2_ptc: add onewire connector for LCD eeprom
Add onewire node in device tree for TM series LCDs

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-28 20:22:43 -04:00
Eugen Hristev
d656875372 ARM: dts: at91: sama5d27_som1_ek: add onewire connector for LCD eeprom
Add onewire node in device tree for TM series LCDs

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-28 20:22:43 -04:00
Eugen Hristev
2b238c6cdb ARM: dts: at91: sama5d3_xplained: add onewire connector for LCD eeprom
Add onewire node in device tree for TM series LCDs

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-28 20:22:43 -04:00
Eugen Hristev
7f0110d47e ARM: dts: at91: sama5d2_xplained: add onewire connector for LCD eeprom
Add onewire node in device tree for TM series LCDs

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-28 20:22:42 -04:00
Eugen Hristev
cc1bdd23c0 board: sama5d2_ptc_ek: add pda detect call at init time
Call the PDA detection mechanism at boot time so we can have
the pda environment variable ready for use.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-28 20:22:40 -04:00
Eugen Hristev
59e43c3291 board: sama5d3_xplained: add pda detect call at init time
Call the PDA detection mechanism at boot time so we can have
the pda environment variable ready for use.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-28 20:22:40 -04:00
Eugen Hristev
81b8e96511 sandbox: DTS: w1: add node for one wire interface on GPIO
Add a node for the one wire uclass and one wire gpio driver
in sandbox.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-28 20:22:37 -04:00
Jagan Teki
9ad93c0c96 ARM: dts: sun8i: Update A23/A33/r16 dts(i) files from Linux-v4.18-rc3
Update all A23/A33/r16 devicetree dtsi and dtsi files from
Linux-v4.18-rc3 with below commits.

A23:
commit bc3bd041fe766219a44688b182c260064007f0cc
Author: Miquel Raynal <miquel.raynal@bootlin.com>
Date:   Tue Apr 24 17:55:02 2018 +0200

    ARM: dts: sun8i: a23/a33: declare NAND pins

A33:
commit 88fe315d2c0a397ef42d7639addab0e021ae911d
Author: Maxime Ripard <maxime.ripard@bootlin.com>
Date:   Wed Apr 4 11:57:15 2018 +0200

    ARM: dts: sun8i: a33: Add the DSI-related nodes

r16:
commit 9621d0bd1b0d61167e1853ac68cf4869c31bcc96
Author: Miquel Raynal <miquel.raynal@bootlin.com>
Date:   Tue Apr 24 17:55:03 2018 +0200

    ARM: dts: nes: add Nintendo NES/SuperNES Classic Edition support

Note:
- Drop pinctrl from sun8i-r16-nintendo-nes-classic-edition.dts since
  sun8i-a23-a33.dtsi is added with Linux sync.
- Don't sync non U-Boot supported dts files
   sun8i-a23-ippo-q8h-v1.2.dts
   sun8i-a23-ippo-q8h-v5.dts
   sun8i-a33-et-q8-v1.6.dts
   sun8i-a33-ippo-q8h-v1.2.dts
   sun8i-r16-nintendo-nes-classic.dts
   sun8i-r16-nintendo-super-nes-classic.dts

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-09-28 22:09:24 +05:30
Jagan Teki
b9d59d08a6 ARM: dts: sun7i: Update A20 dts(i) files from Linux-v4.18-rc3
Update all A10 devicetree dtsi and dtsi files from Linux-v4.18-rc3
with below commit:
commit 5d9ef839f874f4e3923c8a9ae7b136c6c3912cd5
Author: Stefan Mavrodiev <stefan@olimex.com>
Date:   Wed May 16 14:38:08 2018 +0300

    ARM: dts: sun7i: Add Olimex A20-SOM-EVB-eMMC board

Note:
- Update sun7i-a20-primo73.dts as per Linux, since
  this dts is U-Boot specific.
- Drop sun7i-a20-olimex-som-evb-emmc.dts since no board
  added for this.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-09-28 22:09:24 +05:30
Jagan Teki
d1d4295aab ARM: dts: sun6i: Update A31/A31s dts(i) files from Linux-v4.18-rc3
Update all A31/A31s devicetree dtsi and dtsi files from
Linux-v4.18-rc3 with below commit:
commit b240b419db5d624ce7a5a397d6f62a1a686009ec
Merge: 9c2dd8405c0c 518d2f43c358
Author: Linus Torvalds <torvalds@linux-foundation.org>
Date:   Thu Apr 5 21:18:09 2018 -0700

    Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-09-28 22:09:24 +05:30
Jagan Teki
13b36face7 ARM: dts: sun5i: Update A10s/A13/gr8/r8 dts(i) files from Linux-v4.18-rc3
Update all A10s/A13/gr8/r8devicetree dtsi and dtsi files from
Linux-v4.18-rc3 with below commit:
commit 190e3138f9577885691540dca59c2f07540bde04
Merge: cafc87023b0d a7affb13b271
Author: Arnd Bergmann <arnd@arndb.de>
Date:   Tue Mar 27 14:58:00 2018 +0200

    Merge tag 'sunxi-h3-h5-for-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-09-28 22:09:24 +05:30
Jagan Teki
3c92cca3cd ARM: dts: sun4i: Update A10 dts(i) files from Linux-v4.18-rc3
Update all A10 devicetree dtsi and dtsi files from Linux-v4.18-rc3
with below commit:
commit 590b0c0cfc6162aeebbf43eaafb9753b56df1532
Author: Pascal Roeleven <dev@pascalroeleven.nl>
Date:   Fri Apr 20 12:21:12 2018 +0200

    ARM: dts: sun4i: Fix incorrect clocks for displays

Note: Update pinctrl-0 for sun4i-a10-inet-3f.dts, sun4i-a10-inet-3w.dts
like other dts file since there dts file are U-Boot specific.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-09-28 22:09:24 +05:30
Mario Six
4eea531859 video_osd: Add osd sandbox driver and tests
Add sandbox driver and tests for the new OSD uclass.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-28 18:26:52 +02:00
Jagdish Gediya
432054b947 powerpc: dts: Enable device tree support for T2080QDS
Add device tree for T2080QDS board and enable CONFIG_OF_CONTROL
so that device tree can be compiled.

Update board README for device tree usage.

Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 10:14:14 -07:00
Jagdish Gediya
3a2f59e244 powerpc: dts: Add u-boot.dtsi to use binman for MPC85xx boards
Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 10:14:06 -07:00
Jagdish Gediya
96699f097a powerpc: mpc85xx: Use binman to embed dtb inside U-Boot
Below is the sequence to embed dtb inside U-Boot,
1. Remove bootpg and resetvec section if needed
2. Append dtb
3. Append bootpg and resetvec section back if removed in step 1

Above procedure is required only when CONFIG_MPC85xx and
CONFIG_OF_SEPARATE are defined.

Add new config CONFIG_MPC85XX_HAVE_RESET_VECTOR to indicate that
image has resetvec section. Step 1 and step 3 described above are
required only if this config is y.

Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 10:13:59 -07:00
Jagdish Gediya
52fcb717b5 powerpc: mpc85xx: Select BINMAN by default
Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 10:13:55 -07:00
Jagdish Gediya
7d7a8e99e4 powerpc/dts: Makefile changes to clean and build dts
Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 10:13:38 -07:00
Jagdish Gediya
4d3294b1d5 powerpc/dts: Define '_end' symbol in mpc85xx U-Boot lds files
'board_fdt_blob_setup' function sets up fdt blob at '&_end' so
define '_end' symbol in mpc85xx lds files.

Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 10:13:24 -07:00
Ran Wang
26cbc0d663 armv7: ls102xa: Disable QE before enter deep sleep
Otherwise system will hang after executing wfi.

Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 10:01:28 -07:00
Laurentiu Tudor
dc29a4c177 armv8: ls1043a: add icid setup support
Reuse the existing ICID setup code done for LS1046A smmu enablement
and add the equivalent setup for LS1043A chips.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 08:58:15 -07:00
Laurentiu Tudor
2131079356 armv8: ls1043a: advertise QMan v3 in configuration
The QMan IP block in this SoC is version 3.2 so advertise
this in the SoC configuration header.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 08:58:03 -07:00
Laurentiu Tudor
6fae6a1fd6 armv8: fsl-layerscape: add missing qe base address define
Add define for QUICC Engine register block base address.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
[York S: revised commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 08:56:40 -07:00
Nipun Gupta
a78df40cba u-boot: fixup the iommu-map property of fsl-mc node
The iommu-map property in the fsl-mc node is updated by
valid stream-ids by u-boot. This patch is to fixup this
property for LS208x and LS1088.

Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 08:55:05 -07:00
Peng Ma
9ed5ec9b53 armv7: dts: fsl-ls1021a: add sata node support enable sata for ls1021a-qds and ls1021a-twr
Add sata node to support this feature.

Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 08:53:13 -07:00
Peng Ma
686203737e armv7: fsl: remove sata support
Remove the old implementation in order to enable DM for sata

Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 08:53:03 -07:00
Peng Ma
d92116566b armv8: dts: fsl-ls1043a: add sata node support
Add sata node to support ls1043a.

Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 08:52:11 -07:00
Yinbo Zhu
46d471f5b8 armv7: ls1021a: enable esdhc
This patch is to enable eSDHC for ls1021a.

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 08:51:36 -07:00
Yinbo Zhu
2fd425f8e3 armv8: ls1046a: add eSDHC node
This patch is to add eSDHC node for ls1046a.

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 08:51:22 -07:00
Yinbo Zhu
bdccf12839 armv8: ls1043a: add eSDHC node
This patch is to add eSDHC node for ls1043a.

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 08:51:16 -07:00
Yinbo Zhu
585d357522 armv8: ls1088a: add eSDHC node
This patch is to add eSDHC node for ls1088a.

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 08:51:11 -07:00
Yinbo Zhu
99e0071df5 armv8: ls2088a: add eSDHC node
This patch is to add eSDHC node for ls2088a.

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 08:50:39 -07:00
Yinbo Zhu
0fdf696721 armv8/ls1088a/ls2088a: esdhc: Add esdhc clock support
This patch adds esdhc clock support for ls1088a and ls2088a.

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 08:50:26 -07:00
Yinbo Zhu
c3ced8a6ed ppa/fm/qe: use block layer in ppa/fm/qe driver
At present the MMC subsystem maintains its own list of MMC devices.
This cannot work with driver model when CONFIG_BLK is enabled, use
blk_dread to replace previous mmc read interface, use
mmc_get_blk_desc to get the mmc device property.

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
[York S: reformatted commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
2018-09-27 08:48:51 -07:00