3 commits

Author	SHA1	Message	Date
Algapally Santosh Sagar	6fe46936a3	board: xilinx: Add missing prototypes ... Add missing prototypes to fix the below sparse warnings 1. warning: no previous prototype for 'soc_name_decode' [-Wmissing-prototypes] 2. warning: no previous prototype for 'soc_detection' [-Wmissing-prototypes] 3. warning: no previous prototype for 'board_name_decode' [-Wmissing-prototypes] 4. warning: no previous prototype for 'board_detection' [-Wmissing-prototypes] Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Link: https://lore.kernel.org/r/20230523055626.14742-1-ashok.reddy.soma@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>	2023-06-12 13:24:31 +02:00
Michal Simek	d61728c8e8	xilinx: board: Read the whole eeprom not just offset ... Starts to use new way how eeproms should be referenced. Reference is done via nvmem alias nodes. When this new way is specified code itself read the eeprom and decode xilinx legacy format and fill struct xilinx_board_description. Then based on information present there board_* variables are setup. If variables are saved and content can't be changed information is just shown on console. Signed-off-by: Michal Simek <michal.simek@xilinx.com>	2020-10-27 08:13:32 +01:00
Michal Simek	80fdef12b2	xilinx: Introduce board_late_init_xilinx() ... This function should keep common shared late configurations for Xilinx SoCs. Signed-off-by: Michal Simek <michal.simek@xilinx.com>	2020-04-27 13:57:17 +02:00