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Author SHA1 Message Date
Rick Chen
6f4dd62f33 riscv: cpu: nx25: Rename as ax25 
Andes has rearranged the product combinations.
nx25 and ax25 both are RISC-V architecture cpu core.
But ax25 has MMU unit inside, and nx25 is not.

Cpu nx25 and platform ae250 are arranged in pairs.
Cpu ax25 and platform ae350 are arranged in pairs.

This patch will rename
nx25 as ax25
ae250 as ae350
nx25-ae250 as ax25-ae350
including filename, variable, string and definition.

Then u-boot can boot linux kernel in ae350
platform reasonably.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>
 2018-05-29 14:45:02 +08:00
Rick Chen
177c16c933 riscv: dts: AE250 support sd High-Speed mode 
Enable High-Speed mode with cap-sd-highspeed in dts.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
 2018-03-30 13:13:34 +08:00
Rick Chen
039ed7c572 riscv: nx25: dts: Add AE250 dts to support RISC-V 
AE250 is the Soc using NX25 cpu core base on RISC-V arch.
Details please see the doc/README.ae250.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
 2018-01-12 08:05:12 -05:00