Commit graph

10 commits

Author SHA1 Message Date
Stefan Herbrechtsmeier
6d0e34bf4e mmc: sdhci: Distinguish between base clock and maximum peripheral frequency
The sdhci controller assumes that the base clock frequency is fully supported by
the peripheral and doesn't support hardware limitations. The Linux kernel
distinguishes between base clock (max_clk) of the host controller and maximum
frequency (f_max) of the card interface. Use the same differentiation and allow
the platform to constrain the peripheral interface.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
2017-01-23 15:37:42 +09:00
Jaehoon Chung
2cb5d67c1a mmc: sdhci: use the generic error number
Use the generic error number instead of meaningless value.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-10-10 15:23:33 +09:00
Jaehoon Chung
895549a2d9 mmc: sdhci: use the host version value in sdhci_setup_cfg
"host->version" isn't a SoC specific value.
It doesn't need to get in each SoC drivers.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
2016-10-10 15:23:33 +09:00
Stefan Roese
5b37212a3d mmc: mv_sdhci: Configure the SDHCI MBUS bridge windows
This driver did not yet configure the SDHCI MBUS bridge registers.
Without this and with CONFIG_MMC_SDMA enabled, mmc hangs at random
times. As DMA cannot complete correctly.

Tested on db-88f6820-gp eval board.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Dirk Eibach <eibach@gdsys.cc>
Tested-by: Kevin Smith <kevin.smith@elecsyscorp.com>
2015-10-21 02:25:02 +02:00
Rob Herring
3a48944bc9 mv_sdhci: fix warnings on 64-bit builds
Change addresses to unsigned long to be compatible with 64-bit builds.
Regardless of fixing warnings, the device is still only 32-bit capable.

Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
2015-03-18 09:56:17 +02:00
Jaehoon Chung
a68aac4947 mmc: sdhci: return error when failed add_sdhci().
If failed the add_host(), it is reasonable that return value of
add_sdhci().

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-06 16:26:24 -05:00
Anatolij Gustschin
bfe6f6235f drivers/mmc/mv_sdhci.c: Fix build warning
Fix:
mv_sdhci.c: In function 'mv_sdh_init':
mv_sdhci.c:47:22: warning: the comparison will always
evaluate as 'true' for the address of 'mv_sdhci_writeb'
will never be NULL [-Waddress]

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Lei Wen <leiwen@marvell.com>
Cc: Andy Fleming <afleming@freescale.com>
Acked-by: Lei Wen <leiwen@marvell.com>
2012-01-08 21:28:16 -06:00
Ajay Bhargav
5af9a56999 mmc: mv_sdhci: Fix host version read for Armada100
sdhci_readw does not work for host version read in Armada100 series
SoCs. This patch fix this issue by making a sdhci_readl call to get host
version.

Signed-off-by: Ajay Bhargav <ajay.bhargav@einfochips.com>
2011-11-25 17:43:05 -06:00
Lei Wen
02d3ad3e19 mmc: mv_sdhci: fix 8bus width access for 88SV331xV5
Marvell 88SV331xV5 platform's sdhci host control is not very standard
with the spec in the 8bit handling. It need to set its private register
to switch to the 8bit mode which is not included in the standard sdhci
registers.

This patch mainly hacks the writeb method, and set its private register
if it find the driver is going to switch to the 8bit mode.

Signed-off-by: Lei Wen <leiwen@marvell.com>
2011-11-03 02:14:58 -05:00
Lei Wen
e75787d903 MMC: add marvell sdhci driver
This could support both armada100 and pantheon serial in the mainline,
while this driver also be tested to support upcoming mg, mmp2 and mmp3
hardware.

Signed-off-by: Lei Wen <leiwen@marvell.com>
Acked-by: Andy Fleming <afleming@freescale.com>
2011-07-15 20:29:19 -05:00