Commit graph

9 commits

Author SHA1 Message Date
Yuri Tikhonov
0a51e9248e POST: preparations for moving CONFIG_POST to Makefiles
Remove CONFIG_POST ifdefs from the post/ source files.

Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-04-22 14:38:38 +02:00
Stefan Roese
84a999b6cd ppc4xx: program_tlb now uses 64bit physical addess
This patch changes the physical addess parameter from 32bit to 64bit.
This is needed for 36bit 4xx platforms to access areas located
beyond the 4GB border, like SoC peripherals (EBC etc.).

Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-15 07:28:03 +01:00
Stefan Roese
2e583d6c81 ppc4xx: Fix compilation problem in 405 cache POST test
Signed-off-by: Stefan Roese <sr@denx.de>
2007-12-27 19:35:35 +01:00
Stefan Roese
d91722102c ppc4xx: Fix problem in 44x cache POST routine
As repoted by Larry Johnson, running "diag run cache" caused a crash
in U-Boot. This problem was introduced by a patch that removed the
TLB entry for the cache test after the test has completed. Since this
TLB was only setup once, a 2nd attempt to run this cache test
failed with a crash. Now this TLB entry is created every time the
routine is called.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-12-27 19:35:34 +01:00
Stefan Roese
a268590406 ppc4xx: Remove temporary TLB entry in POST cache test only for 440
Signed-off-by: Stefan Roese <sr@denx.de>
2007-10-31 21:21:47 +01:00
Stefan Roese
06713773da ppc4xx: Remove compiler warning from previous commit
Signed-off-by: Stefan Roese <sr@denx.de>
2007-10-31 21:21:46 +01:00
Stefan Roese
6fa397df67 ppc4xx: Remove temporary TLB entry in POST cache test
Signed-off-by: Stefan Roese <sr@denx.de>
2007-10-31 21:21:46 +01:00
Stefan Roese
eb2b4010ae POST: Add ppc405 support to cache and UART POST
Signed-off-by: Stefan Roese <sr@denx.de>
2007-08-14 14:39:44 +02:00
Sergei Poselenov
b44896215a Merged POST framework with the current TOT.
Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
2007-07-05 08:17:37 +02:00