Commit graph

13 commits

Author SHA1 Message Date
Weijie Gao
6bd888b63b mips: mtmips: add support for mt7628-rfb
This patch adds support for mt7628 reference board. SPL_DM and DT are not
enabled for SPL to save about 17KiB for u-boot-spl.bin.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27 20:30:13 +02:00
Weijie Gao
757cbbe956 mips: mtmips: enable SPL for all boards
This patch enables SPL for all mtmips boards. And also remove defconfig
files which are intend to build ram bootable u-boot files.

SPL_DM and OF_CONTROL are enabled for both boards.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27 20:30:13 +02:00
Weijie Gao
7a4b6964b5 mips: mtmips: add SPL support
This patch adds SPL support for mtmips platform. The lowlevel architecture
is split into SPL and the rest parts are built into a memory loadable
u-boot image. Optional SPL_DM and OF_CONTROL are also supported.

The increment of size is very small (< 10 KiB) if SPL_DM and OF_CONTROL are
not enabled and the memory bootable u-boot (u-boot.img) is generated
automatically so there is not need to add a separate config for it.

A lzma compressed payload (u-boot-lzma.img) is also generated and it will
be combined with u-boot-spl.bin to form the unified ROM bootable binary
u-boot-mtmips.bin.

A spl loader is added to support uncompress the payload.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27 20:30:12 +02:00
Weijie Gao
02cd449f0b mips: mtmips: rewrite lowlevel codes of mt7628
This patch rewrites the mtmips architecture with the following changes:

1. Move MT7628 soc parts into a subfolder.
2. Lock parts of D-Cache as temporary stack.
3. Reimplement DDR initialization in C language.
4. Reimplement DDR calibration in a clear logic.
5. Add full support for auto size detection for DDR1 and DDR2.
6. Use accurate CPU clock depending on the input xtal frequency for timer
   and delay functions.

Note:

print_cpuinfo() has incompatible parts with MT7620 so it's moved into
mt7628 subfolder.

Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27 20:29:33 +02:00
Weijie Gao
c366a45649 mips: mtmips: make use of sysreset-resetctrl for mt7628 soc
This patch replaces sysreset-syscon with sysreset-resetctrl for mt7628 soc.

Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27 20:29:33 +02:00
Weijie Gao
79765201ca mips: mtmips: add predefined i-cache/d-cache size and linesize
Both mt7620 and mt7628 has the same cache configuration. There is no need
to use CONFIG_SYS_CACHE_SIZE_AUTO to probe it at runtime.

Add them into Kconfig to reduce some code size.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27 20:29:33 +02:00
Simon Glass
336d4615f8 dm: core: Create a new header file for 'compat' features
At present dm/device.h includes the linux-compatible features. This
requires including linux/compat.h which in turn includes a lot of headers.
One of these is malloc.h which we thus end up including in every file in
U-Boot. Apart from the inefficiency of this, it is problematic for sandbox
which needs to use the system malloc() in some files.

Move the compatibility features into a separate header file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05 19:33:46 -07:00
Simon Glass
9b4a205f45 common: Move RAM-sizing functions to init.h
These functions relate to memory init so move them into the init
header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-17 14:02:35 -05:00
Simon Glass
1eb69ae498 common: Move ARM cache operations out of common.h
These functions are CPU-related and do not use driver model. Move them to
cpu_func.h

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:24:58 -05:00
Weijie Gao
3f851c992d mips: mtmips: select essential drivers in Kconfig
Some drivers (clk, pinctrl, reset, ...) are necessary for reset of the
system, they should be always selected.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25 17:20:44 +02:00
Stefan Roese
9814fb272f mips: mt76xx: Implement new d-cache fix in last_stage_init()
With commit 06985289d4 ("watchdog: Implement generic watchdog_reset()
version") the init sequence has changed in arch_misc_init(), resulting
in a re-appearance of the d-cache issue on MT7688 boards (e.g. gardena).
When this happens, the first (or sometimes later ones as well) TFTP
command hangs and does not complete correctly. This leads to the
assumption that the d-cache is not in a clean state once the ethernet
driver is called (d-cache is used here for the buffers). The old work-
around with the cache flush somehow does not work any more now with
the new code change.

Unfortunately adding CONFIG_SYS_MALLOC_CLEAR_ON_INIT also did not fix
this issue. With v2019.07-rc3 it shows again. The time of accessing
the data seems to be very important here. It needs to be "very late"
in the boot process.

Testing has shown, that copying a 64KiB area in DDR at a very late
bootup time, directly before calling into the prompt, fixes this issue.
Flushing of the complete d-cache does not seem to necessary, as this
copy alone seems to fix this problem.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-07-05 17:12:27 +02:00
Stefan Roese
f913eab9b9 mips: mt76xx: Remove cache workaround and select SYS_MALLOC_CLEAR_ON_INIT
With commit 06985289d4 ("watchdog: Implement generic watchdog_reset()
version") the init sequence has changed in arch_misc_init(), resulting
in a re-appearance of the d-cache issue on MT7688 boards (e.g. gardena).
When this happens, the first (or sometimes later ones as well) TFTP
command hangs and does not complete correctly. This leads to the
assumption that the d-cache is not in a clean state once the ethernet
driver is called (d-cache is used here for the buffers). The old work-
around with the cache flush somehow does not work any more now with
the new code change.

To fix this issue, this patch now removes the old workaround and selects
CONFIG_SYS_MALLOC_CLEAR_ON_INIT for ARCH_MTMIPS. With this option the
complete malloc area is initialized with zeros (cache lines are touched).
Testing has shown that this also fixes the issue on the MT7688 boards.

Signed-off-by: Stefan Roese <sr@denx.de>
Suggested-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-05-24 15:55:17 +02:00
Weijie Gao
16b94903e2 mips: rename mach-mt7620 to mach-mtmips
Currently mach-mt7620 contains only support for mt7628. To avoid confusion,
rename mach-mt7620 to mach-mtmips, which means MediaTek MIPS platforms.
MT7620 and MT7628 should be distinguished by SOC_MT7620 and SOC_MT7628
because they do not share the same lowlevel codes.

Dependencies of four drivers are changed to SOC_MT7628 as these drivers
are only used by MT7628.

Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-05-03 16:43:11 +02:00