Commit graph

8 commits

Author SHA1 Message Date
Becky Bruce
3111d32c49 mpc8641: Support 36-bit physical addressing
This patch creates a memory map with all the devices
in 36-bit physical space, in addition to the 32-bit map.
The CCSR relocation is moved (again, sorry) to
allow for the physical address to be 36 bits - this
requires translation to be enabled.  With 36-bit physical
addressing enabled, we are no longer running with VA=PA
translations.  This means we have to distinguish between
the two in the config file.  The existing region name is
used to indicate the virtual address, and a _PHYS variety
is created to represent the physical address.

Large physical addressing is not enabled by default.
Set CONFIG_PHYS_64BIT in the config file to turn this on.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-11-10 10:10:05 -06:00
Becky Bruce
c759a01a00 mpc8641: Change 32-bit memory map
The memory map on the 8641hpcn is modified to look more like
the 85xx boards; this is a step towards a more standardized
layout going forward. As part of this change, we now relocate
the flash.

The regions for some of the mappings were far larger than they
needed to be.  I have reduced the mappings to match the
actual sizes supported by the hardware.

In addition I have removed the comments at the head
of the BAT blocks in the config file, rather than updating
them.  These get horribly out of date, and it's a simple
matter to look at the defines to see what they are set to
since everything is right here in the same file.

Documentation has been changed to reflect the new map, as this
change is user visible, and affects the OS which runs post-uboot.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-11-10 10:10:04 -06:00
Becky Bruce
170deacb1d mpc8641: Drop imaginary second flash bank, map 8MB
There's a lot of setup and foo for the second flash
bank.  The problem is, this board doesn't actually have one.
Clean this up.  Also, the flash is 8M in size.  Get rid
of the confusing aliased overmapping, and just map 8M.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-11-10 10:10:03 -06:00
Becky Bruce
af5d100e8d mpc8641: Make PCI and RIO mutually exclusive, fix non-PCI build
You can't actually have both, and with some coming changes to
change the memory map for the board and support 36-bit physical,
we need the extra BAT that is being consumed by having both.

I also make non-PCI configs build cleanly, for the sake of sanity.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-11-03 11:04:59 -06:00
Dave Liu
5ba1ef5074 86xx: remove the second DDR LAW setting for mpc8641hpcn
The DDR1 LAW will precedence the DDR2 LAW, so remove
the second DDR LAW.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Becky Bruce <becky.bruce@freescale.com>
2008-10-30 10:30:18 -05:00
Jean-Christophe PLAGNIOL-VILLARD
6d0f6bcf33 rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-10-18 21:54:03 +02:00
Kumar Gala
859a86a25c 85xx/86xx: Move to dynamic mgmt of LAWs
With the new LAW interface (set_next_law) we can move to letting the
system allocate which LAWs are used for what purpose.  This makes life
a bit easier going forward with the new DDR code.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Acked-by: Jon Loeliger <jdl@freescale.com>
Acked-by: Becky Bruce <becky.bruce@freescale.com>
2008-06-11 01:52:23 -05:00
Becky Bruce
4933b91f8a 86xx: Support new law setup method and convert mpc8641
Adds the support code in cpu/mpc86xx for the new law setup code
recently created fsl_law.c, and changes the MPC8641HPCN config
to use this code.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-01-24 12:12:30 -06:00