Commit graph

17844 commits

Author SHA1 Message Date
Andrejs Cainikovs
6a77fb3b4c apalis-imx8: remove -u-boot.dtsi include
This file is included automatically since quite some time now.

From documentation:

U-Boot automatically looks for and includes a file with updates
to the standard devicetree for your board, searching for them in
the same directory as the main file, in this order:

<orig_filename>-u-boot.dtsi
<CONFIG_SYS_SOC>-u-boot.dtsi
<CONFIG_SYS_CPU>-u-boot.dtsi
<CONFIG_SYS_VENDOR>-u-boot.dtsi
u-boot.dtsi

Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
2023-12-20 15:04:46 -03:00
Tim Harvey
c0689191f1 arm: dts: imx8mp-venice-gw72xx: add TPM device
Add the TPM device found on the GW72xx revision F PCB.

This hangs off of SPI2, uses gpio1_10 as a CS and gpio1_11 as RST#.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2023-12-20 15:00:47 -03:00
Tim Harvey
b1c40d0692 arm: dts: imx8mm-venice-gw72xx: add TPM device
Add the TPM device found on the GW72xx revision F PCB.

This hangs off of SPI2, uses gpio1_10 as a CS and gpio1_11 as RST#.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2023-12-20 15:00:47 -03:00
Cody Green
2264bfba19 mxs: Fix VDDx brownout interrupt disable/enable
Incorrect registers HW_POWER_VDDIOCTRL, HW_POWER_VDDACTRL
and HW_POWER_VDDDCTRL are used in the current code to disable/enable
brownout interrupts in 'mxs_power_set_vddx()'.
Change register to HW_POWER_CTRL which contains brownout interrupt
enable bits ENIRQ_VDDIO_BO, ENIRQ_VDDA_BO and ENIRQ_VDDD_BO.

Signed-off-by: Cody Green <cody@londelec.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Lukasz Majewski <lukma@denx.de>
2023-12-20 15:00:47 -03:00
Tom Rini
f7655af980 - Add support for new GXL MDIO mux, with driver and Linux DT sync from v6.4
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Merge tag 'u-boot-amlogic-next-20231220' of https://source.denx.de/u-boot/custodians/u-boot-amlogic into next

- Add support for new GXL MDIO mux, with driver and Linux DT sync from v6.4
2023-12-20 08:34:12 -05:00
Svyatoslav Ryhel
4989628c1d board: compal: paz00: clean up the board
Since implementation of pinctrl driver for T20 Paz00 can switch
to device tree pinmux setup along with remove of board pinmux
and some minor device tree and defconfig tweaks.

Tested-by: Agneli <poczt@protonmail.ch> # Toshiba AC100 T20
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2023-12-19 21:24:30 +02:00
Svyatoslav Ryhel
14281b082a board: htc: endeavoru: switch to DM pinmux
Drop the pinmux setup in the board in favor of setting it up in
the device tree. Device tree nodes match nodes used for the Linux
device tree and are set according to the downstream kernel. 

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2023-12-19 21:24:30 +02:00
Svyatoslav Ryhel
8a861dd769 board: asus: transformer: switch to DM pinmux
Drop the pinmux setup in the board in favor of setting it up in
the device tree. Device tree nodes match nodes used in the Linux
device tree. 

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2023-12-19 21:24:30 +02:00
Svyatoslav Ryhel
fd211f85cc board: lg: x3-t30: switch to DM pinmux
Drop the pinmux setup in the board in favor of setting it up in
the device tree. Device tree nodes match nodes used for the Linux
device tree and are set according to the service manual.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2023-12-19 21:24:30 +02:00
Svyatoslav Ryhel
98a1c3b51c board: asus: grouper: switch to DM pinmux
Drop the pinmux setup in the board in favor of setting it up in
the device tree. Device tree nodes match nodes used in the Linux
device tree.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2023-12-19 21:24:30 +02:00
Svyatoslav Ryhel
b98bed0e9c drivers: pinctrl: tegra: incorporate existing code
Move all existing pinmux and funcmux code into a dedicated folder in
pinctrl to simplify further maintenance.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2023-12-19 21:24:30 +02:00
Svyatoslav Ryhel
91069320a5 drivers: pinctrl: create Tegra DM pinctrl driver
The existing pinctrl driver available for Tegra SOC is well
designed, but it lacks DM support. Let's add a DM compatible
overlay, which allows use of the device tree, along with preserving
backward compatibility with all existing setups and the ability
to use it in SPL board configuration stage.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2023-12-19 21:24:30 +02:00
Svyatoslav Ryhel
886b1da83b ARM: mach-tegra: rearrange SPL configs
SPL configs are used only by the ARMv7-based Tegra SOC's, so move
SPL_SYSRESET under TEGRA_ARMV7_COMMON selection and enable SPL_DM
since SPL_SYSRESET depends on it.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2023-12-19 21:24:30 +02:00
Svyatoslav Ryhel
944ac34075 ARM: tegra114: clock: implement PLLD2 support
PLLD2 is a simple clock (controlled by 2 registers) and appears starting
from T30. Primary use of PLLD2 is as main HDMI clock parent.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2023-12-19 21:24:11 +02:00
Svyatoslav Ryhel
e63ab85dba ARM: tegra30: clock: implement PLLD2 support
PLLD2 is a simple clock (controlled by 2 registers) and appears starting
from T30. Primary use of PLLD2 is as main HDMI clock parent.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2023-12-19 21:24:11 +02:00
Svyatoslav Ryhel
1ba80d1b2c ARM: tegra: clock: support get and set rate for simple PLL
Simple PLL clocks like PLLD2 were omitted since they do not share common
4 register structure with main clocks. Such clocks are containd in simple
PLL group. Only clock_start_pll function supported them. This patch expands
this support on clock_set_rate and clock_get_rate which should make
simple PLL clocks equal to main PLL clocks.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2023-12-19 21:24:11 +02:00
Tom Rini
936d0f9dd7 Merge patch series "Fix J7200 kernel boot when using upstream u-boot"
Reid Tonking <reidt@ti.com> says:

Since the 09.01.00.002 release of ti-linux-firmware [0] upstream uboot
has led to the kernel hanging during boot [1] for the TI J7200 S0C. The
issue was found to be a few patches that had be added to ti-u-boot, but not
yet upstreamed. This series adds the missing two patches to allow upstream
u-boot to boot the kernel properly [2].

[0] https://git.ti.com/cgit/processor-firmware/ti-linux-firmware/commit/?h=ti-linux-firmware-next&id=952fd03e36a50ec070e73560dc1060102d637ce0

Boot logs:
[1] https://gist.github.com/reidt1/5f4e85a0db258bcf20d7168bd0caebd0
[2] https://gist.github.com/reidt1/e950dc97f15ad0a09623d64f81edac39

Links to patches on ti-u-boot:
https://git.ti.com/cgit/ti-u-boot/ti-u-boot/commit/?h=ti-u-boot-2023.04-next&id=d878fbef4d4460e87608d8d2dfe5311499de49c5
https://git.ti.com/cgit/ti-u-boot/ti-u-boot/commit/?h=ti-u-boot-2023.04-next&id=543e735fe495be233a8a75b19b3d7f8ed44251e0
2023-12-19 11:42:03 -05:00
Tom Rini
9cfef5fcfb Merge patch series "Add support for MediaTek MT8365 EVK Board"
Julien Masson <jmasson@baylibre.com> says:

This patch series add the support for the MediaTek MT8365 EVK Board [1].
Most of the code have been copied/adapted from Linux tag v6.7-rc2.

For now we only enable/test these features:
Boot, UART, Watchdog and MMC.

[trini: This includes two clocks not listed in the Linux binding, which
 needs resyncing later]
2023-12-19 11:42:03 -05:00
Reid Tonking
3d6cb03905 arm: dts: k3-j7200-r5-common-proc-board: Set parent clock for clock ID 323
Previously, dynamic frequency scaling supported rates only through fixed
divison.

This virtual clock mux configuration enables more varied rates on A72
clock ID 202 by setting up the required register.

Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Signed-off-by: Apurva Nandan <a-nandan@ti.com>
Signed-off-by: Reid Tonking <reidt@ti.com>
2023-12-19 10:15:54 -05:00
Bryan Brattlof
9fc5e19c2e arm: mach-k3: j72xx: add new 'virtual' mux
In order for the Cortex-A72s to operate at different frequencies other
than the default 2GHz, add in a new 'virtual' mux (a mux that does not
physically exist in the clock tree) that can be selected.

CC: Vishal Mahaveer <vishalm@ti.com>
Signed-off-by: Bryan Brattlof <bb@ti.com>
Signed-off-by: Apurva Nandan <a-nandan@ti.com>
Signed-off-by: Reid Tonking <reidt@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
2023-12-19 10:15:53 -05:00
Julien Masson
1c2c0c6359 board: mediatek: add MT8365 EVK board support
This adds support for the MT8365 EVK board with the following
features enabled/tested: Boot, UART, Watchdog and MMC.

Signed-off-by: Julien Masson <jmasson@baylibre.com>
2023-12-19 10:09:06 -05:00
Julien Masson
ee33f6539d arm: mediatek: add support for MediaTek MT8365 SoC
This patch adds basic support for MediaTek MT8365 SoC.
The dtsi has been copied from Linux source code tag v6.7-rc2.
(commit 9b5d64654ea8f51fe1e8e29ca1777b620be8fb7c)

Signed-off-by: Julien Masson <jmasson@baylibre.com>
2023-12-19 10:09:06 -05:00
Michael Trimarchi
6645934646 arm: mach-k3: am625: Relax emmc boot condition
spl_mmc_emmc_boot_partition return a number different from 0
if the partition is a boot one. We can have the uboot img
for instance in a raw offset in emmc partition 0 so we would
like to continue to load the next stage. If the user want
to use EMMC as boot device allow him to use any part of the
emmc and not only boot partition

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
2023-12-19 10:07:48 -05:00
Neil Armstrong
4d4fbf0415 ARM: dts: sync Amlogic GX DT to Linux v6.4
Sync Amlogic GXBB, GXL & GXM DTs from Linux v6.4, and also
switch to GXL MDIO MUX driver to adapt to DT change,

Most of the changes are only cosmetic or doesn't concern U-Boot,
the most important change for U-Boot is the GXL mdio mux compatible
switch to amlogic,gxl-mdio-mux.

Link: https://lore.kernel.org/r/20231213-u-boot-gxl-mdio-mux-v2-2-c56bb02a75ea@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-12-19 11:24:38 +01:00
Tom Rini
1373ffde52 Prepare v2024.01-rc5
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Merge tag 'v2024.01-rc5' into next

Prepare v2024.01-rc5
2023-12-18 09:55:32 -05:00
Tom Rini
8bb3cd7fe7 clock patches for u-boot/next
The main thing in here is Igor's conversion of soc_clk_dump to a clk_ops
 member. There's also a write-protect feature for nuvoton clocks.
 
 Signed-off-by: Sean Anderson <seanga2@gmail.com>
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Merge tag 'clk-2024.01-next' of https://source.denx.de/u-boot/custodians/u-boot-clk into next

clock patches for u-boot/next

The main thing in here is Igor's conversion of soc_clk_dump to a clk_ops
member. There's also a write-protect feature for nuvoton clocks.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
2023-12-15 17:49:13 -05:00
Andrew Davis
7c9c6e1925 arm: mach-k3: Merge initial memory maps
The Device vs Normal memory map is the same for all K3 SoCs. Merge
the SoC specific maps into one.

Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Tested-by: Nishanth Menon <nm@ti.com>
2023-12-15 15:27:48 -05:00
Andrew Davis
c90462e691 arm: mach-k3: Remove non-cached memory map areas
All normal memory areas should be mapped as such.

We added these un-cached holes in our memory map to hack around the
remoteproc driver missing the proper cache maintenance operations.

The problem is having these non-cached memory map areas causes stability
issues later in system operation due to the nature of the K3 coherency
architecture. Plus these are board specific carveouts and instead
should have been added at the board level, not here in the SoC common
code area.

Remove these non-cached memory map areas.

Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Tested-by: Nishanth Menon <nm@ti.com>
2023-12-15 15:27:48 -05:00
Andrew Davis
4b4ebdb4a4 arm: mach-k3: Do not map ATF and OPTEE regions in MMU
ATF and OPTEE regions may be firewalled from non-secure entities. To
prevent access to this area we leave a hole there in the MMU map. This
is the same idea as [0] but we complete that patch by adding the same
for AM65, J721e, J7200, and J721s2 here.

[0] commit 0688ff3ae2 ("arm: mach-k3: arm64-mmu: do not map ATF and OPTEE regions in A53 MMU")

Signed-off-by: Andrew Davis <afd@ti.com>
2023-12-15 15:27:48 -05:00
Andrew Davis
d7b889403c arm: mach-k3: Let the compiler size the mem_map lists
NR_MMU_REGIONS is a copy/paste from another platform that extends
this list later. We do not do that, so let the list be the size
of the initializer list.

Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Tested-by: Nishanth Menon <nm@ti.com>
2023-12-15 15:27:47 -05:00
Andrew Davis
4621960754 arm: mach-k3: Move K3 common schema.yaml out of board directory
This file is common for all K3, move it out of board/ directory and
into mach-k3. As we need to change the path in k3-binman.dtsi let's
take this opportunity to switch to absolute paths which makes adding
non-TI boards (like Toradex Verdin) not need to override these paths.

Signed-off-by: Andrew Davis <afd@ti.com>
2023-12-15 15:27:47 -05:00
Igor Prusov
bdac755114 clk: zynq: Move soc_clk_dump to Zynq clock driver
Move clock dump function in preparation for switching to dump function
in clk_ops.

Acked-by: Michal Simek <michal.simek@amd.com>
Signed-off-by: Igor Prusov <ivprusov@sberdevices.ru>
Link: https://lore.kernel.org/r/20231109105516.24892-2-ivprusov@sberdevices.ru
2023-12-15 12:33:09 -05:00
Dario Binacchi
88c938f874 ARM: dts: stm32: support MIPI DSI on stm32f469-disco board
Unlike Linux, the DSI driver requires the LTDC clock to be properly
probed. Hence, the changes made to the DSI node.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-12-15 15:41:23 +01:00
Dario Binacchi
451ae8daa2 ARM: dts: stm32: make the DSI clock usable by the clock driver
As described in [1], the "clocks" property contains "a phandle to the
clock device node, an index selecting between gated clocks (0) and other
clocks (1), and an index specifying the clock to use." The current version
of the clock driver, unlike the kernel, is currently able to properly
handle nodes with "clocks" properties with an index set to 0.

This patch is preparatory for future developments that require the use
of the DSI clock.

[1] Documentation/devicetree/bindings/clock/st,stm32-rcc.txt
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-12-15 15:41:23 +01:00
Dario Binacchi
6212e5bc69 ARM: dts: stm32: make the LTDC clock usable by the clock driver
As described in [1], the "clocks" property contains "a phandle to the
clock device node, an index selecting between gated clocks (0) and other
clocks (1), and an index specifying the clock to use." The current version
of the clock driver, unlike the kernel, is currently able to properly
handle nodes with "clocks" properties with an index set to 0.

This patch is preparatory for future developments that require the use
of the LTDC clock.

[1] Documentation/devicetree/bindings/clock/st,stm32-rcc.txt
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-12-15 15:41:23 +01:00
Dario Binacchi
95d1900d22 ARM: dts: stm32f469-disco: sync with Linux 6.5
Sync the devicetree with linux 6.5 for stm32f746-disco board.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-12-15 15:41:23 +01:00
Dario Binacchi
555cf4c495 ARM: dts: stm32f769-disco: rework ltdc node
With commit f479f5dbb7 ("ARM: dts: stm32: add ltdc support on
stm32f746 MCU"), which adds the 'ltdc' node in stm32f746.dtsi, we can
simplify stm32f769-disco-uboot.dtsi and align stm32f769-disco.dtsi with
the kernel version.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-12-15 14:57:02 +01:00
Marek Vasut
41b0f3454b ddr: imx: Add 3600 MTps rate support
Add PLL settings for DDR 3600 MTps . This is very similar to 3200 MTps
PLL setting, except the divider is not 9 but 8 .

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2023-12-14 15:29:08 -03:00
Marek Vasut
4a03cf38d8 arm64: imx8mp: Inhibit DTC warning on DH i.MX8MP DHCOM rev.100 DTO
Inhibit DTC warning in imx8mp-dhcom-pdk3-overlay-rev100.dts:
"
arch/arm/dts/imx8mp-dhcom-pdk3-overlay-rev100.dtbo: Warning (reg_format): /fragment@0/__overlay__:reg: property has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
arch/arm/dts/imx8mp-dhcom-pdk3-overlay-rev100.dtbo: Warning (avoid_default_addr_size): /fragment@0/__overlay__: Relying on default #address-cells value
arch/arm/dts/imx8mp-dhcom-pdk3-overlay-rev100.dtbo: Warning (avoid_default_addr_size): /fragment@0/__overlay__: Relying on default #size-cells value
"

The DTO overwrites the 'reg' property of an ethernet PHY and is only
used on specific combination of old prototype SoM and old prototype
PDK3 carrier board, which had incorrectly placed pull resistor, which
made the PHY change its MDIO address in that specific combination and
which is already fixed on production hardware.

The DTO is implemented in this simple manner because if it contained a
full MDIO bus node reference to define #address-cells and #size-cells,
it would also require a full new copy of the PHY node, i.e.
ethernet-phy@5 { ... reg = <5>; ... }, to avoid DTC warnings about
mismatch between node unit and reg value. The node unit in SoM DT is
ethernet-phy@7 { ... }; .

This simpler approach avoids unnecessary duplication without adverse
side effects.

Reported-by: Fabio Estevam <festevam@denx.de>
Reported-by: Sean Anderson <seanga2@gmail.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Tested-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2023-12-14 15:29:08 -03:00
Tom Rini
fa3f19aa56 Xilinx changes for v2024.04-rc1
zynqmp:
 - Introduce Kria specific defconfig
 - Calculate SPI image location based on boot offset
 - DT updates
 
 zynqmp-clk:
 - Fix topsw_lsbus_clock for DP
 
 axi-enet:
 - Support older DT binding
 
 mailbox:
 - Add support for multiple mailboxes
 
 pcie-xilinx:
 - Covert driver to newer interface
 - Enable MMIO region
 
 zynq:
 - dfu updates
 - Enable capsule update for Antminer S9
 - DT updates
 
 xilinx_spi:
 - Add new xfer callback and support runtime fifo depth discovery
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Merge tag 'xilinx-for-v2024.04-rc1' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next

Xilinx changes for v2024.04-rc1

zynqmp:
- Introduce Kria specific defconfig
- Calculate SPI image location based on boot offset
- DT updates

zynqmp-clk:
- Fix topsw_lsbus_clock for DP

axi-enet:
- Support older DT binding

mailbox:
- Add support for multiple mailboxes

pcie-xilinx:
- Covert driver to newer interface
- Enable MMIO region

zynq:
- dfu updates
- Enable capsule update for Antminer S9
- DT updates

xilinx_spi:
- Add new xfer callback and support runtime fifo depth discovery
2023-12-14 13:27:11 -05:00
Tom Rini
11e1cc7aae Merge tag 'u-boot-imx-next-20231214' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx into next
- Add TPM support for venice boards
- Add networking support for imx93-evk
- Enable TCP, IPv6, wget for DHCOM and Data Modul boards
- Enable fastboot support for Toradex boards
- Allow pico-imx7d to boot from SD
- Enable fastboot for beacon imx8m beacon boards, disabled
  SYS_CONSOLE_IS_IN_ENV
- Fix mxsboot to prevent NAND blocks being reported as bad
- Add imx8mm PWM clock support
- Several devicetree syncs with the kernel
- Add support for i.MX8MP Polyhex Debix Model A SBC
- Reworked ddr_load_train_firmware() to get a 50ms boot time improvement
2023-12-14 07:37:02 -05:00
Neha Malcom Francis
3ef977e085 arm: dts: k3-*-binman: Move to using ti-dm entry type
Move the DM entry in tispl.bin FIT image from default fetching an
external blob entry to fetching using ti-dm entry type. This way, the
DM entry will be populated by the TI_DM pathname if provided. Else it
will resort to the ti-dm.bin file.

Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Andrew Davis <afd@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-12-13 18:39:06 -05:00
Benjamin Szőke
03622f3012 pico-imx7d: add baseboard SD card boot detect
Technexion PICO-IMX7 SoM is supporting USDHC3 (eMMC or micro SD on SoM)
and USDHC1 (SD on carrier board) to use on any carrier board like
PICO-NYMPH. Based on the U-Boot version from Technexion it adds
baseboard SD card boot detect to able to boot from selected USDHC1
or USDHC3 boot devices.

Signed-off-by: Benjamin Szőke <egyszeregy@freemail.hu>
Tested-by: Fabio Estevam <festevam@gmail.com>
2023-12-13 15:55:13 -03:00
Fabio Estevam
04bb59b408 imx: imx-hab: Select SPL_DRIVERS_MISC in the SPL case
Selecting CONFIG_IMX_HAB=y on a SPL target, such as apalis_imx6_defconfig,
for example, leads to the following build error:

/usr/bin/arm-linux-gnueabihf-ld.bfd: arch/arm/mach-imx/hab.o: in function `imx_hab_is_enabled':
arch/arm/mach-imx/hab.c:879: undefined reference to `fuse_read'

fuse_read() comes from SPL_MXC_OCOTP, which depends on SPL_DRIVERS_MISC,
since commit 251a3053b1 ("misc: imx: remove DM dependency for ocotp
driver in SPL").

Select SPL_DRIVERS_MISC in the SPL case to fix this build issue.

Reported-by: Lisandro Pérez Meyer <lpmeyer@ics.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
Tested-by: Lisandro Pérez Meyer <lpmeyer@ics.com>
2023-12-13 15:37:52 -03:00
Marek Vasut
712aa6e24c arm: mxs: Clear CPSR V bit to activate low vectors
The MXS starts with CPSR V bit set, which makes the CPU jump to high vectors
in case of an exception. Those high vectors are located at 0xffff0000, which
is where the BootROM exception table is located as well. U-Boot should handle
exceptions on its own using its own exception handling code, which is located
at 0x0, i.e. at low vectors. Clear the CPSR V bit, so that the CPU would jump
to low vectors on exception instead, and therefore run the U-Boot exception
handling code.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2023-12-13 15:33:21 -03:00
Tom Rini
9565771076 Merge patch series "bootm: Refactoring to reduce reliance on CMDLINE (part A)"
To quote the author:

It would be useful to be able to boot an OS when CONFIG_CMDLINE is
disabled. This could allow reduced code size.

Standard boot provides a way to handle programmatic boot, without
scripts, so such a feature is possible. The main impediment is the
inability to use the booting features of U-Boot without a command line.
So the solution is to avoid passing command arguments and the like to
code in boot/

A similar process has taken place with filesystems, for example, where
we have (somewhat) separate Kconfig options for the filesystem commands
and the filesystems themselves.

This series starts the process of refactoring the bootm logic so that
it can be called from standard boot without using the command line.
Mostly it removes the use of argc, argv and cmdtbl from the internal
logic.

Some limited tidy-up is included, but this is kept to smaller patches,
rather than trying to remove all #ifdefs etc. Some function comments
are added, however.

A simple programmatic boot is provided as a starting point.

This work will likely take many series, so this is just the start.

Size growth with this series for firefly-rk3288 (Thumb2) is:

       arm: (for 1/1 boards) all +23.0 rodata -49.0 text +72.0

This should be removed by:

   https://source.denx.de/u-boot/custodians/u-boot-dm/-/issues/11

but it is not included in this series as it is already large enough.

No functional change is intended in this series.

Changes in v3:
- Add a panic if programmatic boot fails
- Drop RFC tag

Changes in v2:
- Add new patch to adjust position of unmap_sysmem() in boot_get_kernel()
- Add new patch to obtain command arguments
- Fix 'boot_find_os' typo
- Pass in the command name
- Use the command table to provide the command name, instead of "bootm"
2023-12-13 11:51:53 -05:00
Simon Glass
b1f8b56f45 arm: x86: Drop discarding of command linker-lists
Since we can now cleanly disable CMDLINE when needed, drop the rules
which discard the command code.  It will not be built in the first
place.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2023-12-13 11:51:24 -05:00
Fabio Estevam
4b5c1175a2 imx7d-pico-pi-u-boot.dtsi: Fix aliases indentation
The aliases are currently indented using spaces.

Fix it to use the standard tab indentation.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-12-13 10:02:45 -03:00
Fabio Estevam
458ab6b9f2 clock_imx8mm: Add a stub for imx8mp_fec_interface_init()
When CONFIG_DWC_ETH_QOS_IMX=y and CONFIG_FEC_MXC is not selected, the
following warning is seen:

arch/arm/mach-imx/imx8m/clock_imx8mm.c: In function 'board_interface_eth_init':
arch/arm/mach-imx/imx8m/clock_imx8mm.c:914:24: warning: implicit declaration of function 'imx8mp_fec_interface_init; did you mean 'imx8mp_eqos_interface_init'? [-Wimplicit-function-declaration]

Fix it by adding a stub for imx8mp_fec_interface_init() to handle this
case.

This follows the same approach done on imx8mp_eqos_interface_init().

Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
2023-12-13 09:54:32 -03:00
Fabio Estevam
21b30c237a imx8mp_evk: Simplify Ethernet initialization
With DM enabled, there is no need for board code to initialize
the Ethernet interfaces.

The RTL8211FDI Ethernet PHYs have 25MHz oscillator, so there is no
need to enable the RGMII TX clk output.

Also, there is no need for describing the deprecated phy-reset FEC
properties, nor passing reset properties to the EQOS interface in
u-boot.dtsi.

Remove all these unneeded pieces.

Tested both Ethernet interfaces after these changes.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
2023-12-13 09:54:00 -03:00