Commit graph

92 commits

Author SHA1 Message Date
Shengzhou Liu
c18fc2c960 net/phy: enable serdes auto-negotiation for vsc8514 phy
VSC8514 QSGMII PHY requires enabling auto-negotiation,
otherwise it wouldn't work.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-12-05 08:06:15 -08:00
Shengzhou Liu
9b18e5199e net/phy: Add support for CS4315/CS4340 PHY
Add support for Cortina CS4315/CS4340 10G PHY.
- This driver loads CS43xx firmware from NOR/NAND/SPI/SD device
  to initialize Cortina PHY.
- Cortina PHY has non-standard offset of PHY ID registers, thus
  we define own get_phy_id() to override default get_phy_id().
- To define macro CONFIG_PHY_CORTINA will enable this driver.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-12-05 08:06:11 -08:00
Hao Zhang
35fa0dda0c net: phy: marvell: add errata w/a for 88E151* chips
As per Marvell Release Notes - Alaska 88E1510/88E1518/88E1512/88E1514
Rev A0, Errata Section 3.1 Marvell PHY has an errata which requires
that certain registers get written in order to restart
autonegotiation.

Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2014-11-06 11:04:38 -05:00
Tom Rini
5aa7bece10 Merge branch 'master' of git://git.denx.de/u-boot-ti 2014-10-27 09:05:43 -04:00
Jeroen Hofstee
3c6928fd7b net: phy: fix warnings with W=1
get_phy_id is marked weak but has no protype nor a
strong version, just make it static. Use __weak for
board_phy_config.

Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
2014-10-25 07:01:59 -04:00
Khoronzhuk, Ivan
adc9a79f3f net: phy: print a number of phy that is not found
In case when several Ethernet ports are supported it's
convenient to see the number of phy that is not found.

Acked-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
2014-10-23 11:27:28 -04:00
Pavel Machek
58ec63d6bc net: phy: Cleanup drivers/net/phy/micrel.c
Old saying says that more than three exclamation marks in a row are
sign of mental disease. Cleanup micrel.c.

Signed-off-by: Pavel Machek <pavel@denx.de>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Pavel Machek <pavel@denx.de>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Acked-by: Chin Liang See <clsee@altera.com>
2014-10-06 17:36:40 +02:00
Masahiro Yamada
368b4d2b49 drivers: net: remove dead drivers
The following configs are not defined at all:

 - CONFIG_INCA_IP_SWITCH
 - CONFIG_PBL2800_ETHER
 - CONFIG_PHY_ICPLUS

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-08-21 12:01:11 -04:00
maxin.john@enea.com
79e86ccb37 vitesse: remove duplicated argument to ||
Remove the duplicated argument to || check

Signed-off-by: Maxin B. John <maxin.john@enea.com>
2014-08-09 11:17:02 -04:00
Cormier, Jonathan
08be2836df phy: fix create_phy_by_mask for when its given an actual search mask
get_phy_id returns -EIO when it can't read from a phy at a given addr.  This would cause
create_phy_by_mask to return prematurely before it had tested the other addresses in the provided mask.

Example usage:
Replace
    phydev = phy_connect(bus, phy_addr, dev, phy_if)
with
    phydev = phy_find_by_mask(bus, phy_mask, phy_if)
    if (phydev)
	phy_connect_dev(phydev, dev);

Signed-off-by: Cormier, Jonathan <jcormier@criticallink.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
2014-06-05 14:44:56 -04:00
Chunhe Lan
ffc8667acf net: phy/vitesse: Add support for VSC8664 phy module
This patch adds support for VSC8664 PHY module which can
be found on Freescale's T4240RDB boards.

Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-05-16 16:24:05 -05:00
Shengzhou Liu
597fe041a8 net/phy: enable get_phy_id redefinable
As some PHYs have non-standard PHY ID registers, PHY Id can't
be read correctly by current get_phy_id function, so we enable
get_phy_id redefinable to permit specific PHY driver having own
specific get_phy_id function.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
2014-05-12 15:19:45 -04:00
Xiaobo Xie
02aa4c5388 AR8035/phy: Enable autonegotiation function for ar8035
Function "genphy_parse_link()" used "if (mii_reg & BMSR_ANEGCAPABLE)" before,
but used "if (phydev->supported & SUPPORTED_Autoneg)" now.
So assign "phydev->supported" to "phydev->drv->features" for ar8035
to enable autonegotiation. Then removed the genphy_config_aneg() function.

Signed-off-by: Xie Xiaobo <X.Xie@freescale.com>
2014-05-12 15:19:45 -04:00
Zhao Qiang
08ad9b068a ar8031: modify the config func of ar8031 to ar8021_config
ar8031 has the same config steps with ar8021, so change its
config func to ar8021_config instead of genphy_config.

Signed-off-by: Zhao Qiang <B45475@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-04-22 17:58:53 -07:00
Codrin Ciubotariu
44afbbc0f0 net/phy: Fix PHY id for VSC8514
In the current Datasheet for VSC8514 there is a mistake, saying that
the PHY id is 0x70570. The real value in the identifier registers is
0x70670. Linux PHY driver uses 0x70670 also.

Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com>
Cc: York Sun <yorksun@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-04-22 17:58:47 -07:00
Haijun.Zhang
dc116bd6c4 net/phy: Correct AR8021 phy_mask
There was wrong phy_mask for AR8021 device,
so the AR8021 can't be probed correctly.
Changed it from 0x4fffff to 0x4ffff0.

Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com>
2014-03-07 10:59:06 -05:00
Tom Rini
a7e8c15f71 Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
With this, fixup a trivial build error of get_effective_memsize needing
to be updated in the new board/freescale/p1010rdb/spl.c

Signed-off-by: Tom Rini <trini@ti.com>
2014-02-25 13:55:49 -05:00
Zhao Qiang
e0d809647f ar8031/8033/phy:enable autonegotiation for ar8031/8033
Function "genphy_parse_link()" used "if (mii_reg & BMSR_ANEGCAPABLE)" before
while "if (phydev->supported & SUPPORTED_Autoneg)" now.
So assign "phydev->supported" to "phydev->drv->features" for ar8031/8033
to enable autonegotiation.

Signed-off-by: Zhao Qiang <B45475@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-02-24 15:23:41 -08:00
Heiko Schocher
9137d19bdd net, phy: atheros ar803x bug
commit 626ee1e3 "phylib: update atheros ar803x phy"

leads in failing ethernet on the pxm2 board.

Calling genphy_config() instead of ar8021_config(),
which seems for ar8021 phys not ar803x phys, make
it working again.

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
2014-02-19 10:47:33 -05:00
Fabio Estevam
f66e3ded61 net: phy: atheros: Fix the masks for AR8031/8035
Use the same masks as used in the kernel:
https://git.kernel.org/cgit/linux/kernel/git/stable/linux-stable.git/tree/drivers/net/phy/at803x.c?id=refs/tags/v3.12.6

With such changes Ethernet is functional on hummingboard solo.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Marek Vasut <marex@denx.de>
Patch: 306640
2014-01-14 14:00:41 -06:00
David Dueck
f27f3b5266 phy: Use general phy code for smsc lan8720a
Signed-off-by: David Dueck <davidcdueck@googlemail.com>
2013-11-22 17:03:20 -06:00
David Dueck
3a530d1b3e phy: Use supported field during autonegotiation
The current code incorrectly detects gigabit capabilities for some
100Mbit/s phys. (lan8720a)

Signed-off-by: David Dueck <davidcdueck@googlemail.com>
2013-11-22 17:03:20 -06:00
Fabio Estevam
e003ba5bfc net: phy: atheros: Fix masks for AR8035 and AR8021
The masks were ignoring the last 4 bits which didn't allow detection differences
between the ar8031 and ar8035.

Signed-off-by: Jon Nettleton <jon.nettleton@gmail.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Patch: 288018
2013-11-22 17:03:18 -06:00
Chunhe Lan
3177457853 net/phy: Fix the phy id mask of AR8031
The both AR8031 and AR8035 belong to Atheros 803x serial PHY.
So the phy id mask of AR8031 is the same to the phy id mask
of AR8035. The right mask value is 0x4fffff.

This patch has been tested on the P1010 and P1023.

Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Patch: 287748
2013-11-22 17:03:18 -06:00
Heiko Schocher
dfcaa61c33 net, phy: fix AR8031 phy_mask
AR8035 driver will be never applied because of wrong mask for
AR8031 driver. Fix this.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reported-by: Pavel Nakonechny <pavel.nakonechny@skitlab.ru>
Cc: Andy Fleming <afleming@freescale.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Patch: 276944
2013-11-22 16:50:54 -06:00
Stefano Babic
9ced16fefa net: add function to read/write extended registers in Micrel Phy
Signed-off-by: Stefano Babic <sbabic@denx.de>
2013-11-22 16:50:52 -06:00
Stefano Babic
e8194d58bd net: fix mask for phy Micrel KSZ9031
Signed-off-by: Stefano Babic <sbabic@denx.de>
2013-11-22 16:50:51 -06:00
Bhupesh Sharma
4220504767 net/phy: realtek: Fix the PHY ID mask to ensure the correct Realtek PHY is detected
The 'get_phy_driver' code in 'drivers/net/phy/phy.c' uses the following
method to determine which driver is to be loaded for a particular PHY
module:

list_for_each(entry, &phy_drivers) {
	drv = list_entry(entry, struct phy_driver, list);
	if ((drv->uid & drv->mask) == (phy_id & drv->mask))
		return drv;
}

This means that a drv->mask of 0xfffff0 will return incorrect phy driver
for the logic above, even if the drv->uid is anything other than
something ending with a 0x0.

For e.g. if the RTL8211E drv->uid is 0x1cc915 and drv->mask is 0xffffff
and the RTL8211B drv->uid is 0x1cc910 and drv->mask is 0xffffff0, then
the phy driver selected will always be RTL8211B even though the
underlying phy connected on the board is a 8211E module.

This patch fixes this issue.

Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
2013-11-22 16:50:51 -06:00
Arpit Goel
e97a78cfed net: phy/vitesse: Add support for VSC8514 phy module
This patch adds support for VSC8514 PHY module which can be
found on Freescale's T1040RDB boards.

Signed-off-by: Arpit Goel <B44344@freescale.com>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
2013-11-22 16:50:50 -06:00
Shengzhou Liu
626ee1e32e phylib: update atheros ar803x phy
As AR8031 and AR8033 have same PHY ID 0x4dd074, they use the
common driver. Currently AR8031_driver didn't work for AR8033,
hence updated it to have it work on AR8031/AR8033.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
2013-11-22 14:39:54 -06:00
Masahiro Yamada
e32459e24a drivers: net: convert makefiles to Kbuild style
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2013-10-31 13:22:13 -04:00
Robert P. J. Day
1bce2aeb6f Cosmetic: Fix a number of typos, no functional changes.
Fix various misspellings of things like "environment", "kernel",
"default" and "volatile", and throw in a couple grammar fixes.

Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
2013-09-20 10:30:54 -04:00
Bhupesh Sharma
c624d168bf net: phy/realtek: Add support for RTL8211DN and RTL8211E phy modules
This patch adds support for Realtek PHY modules RTL8211DN and
RTL8211E (variants: RTL8211E-VB-CG, RTL8211E-VL-CG, RTL8211EG-VB-CG),
which can be found on Freescale's T1040RDB boards.

To make the driver more generic across 8211 family, a generic name 8211x
is added for macros and function names.

Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
2013-08-19 12:34:19 -05:00
Fabio Estevam
25634210af phy: smsc: LAN8710/8720 are not Gbit PHYs
LAN8710/8720 are 10/100 Mbps PHYs, so fix the '.features' field.

Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2013-08-19 12:34:18 -05:00
Heiko Schocher
f6d1f6e4a5 net, phy, cpsw: fix gigabit register access
accessing a lan9303 switch with the cpsw driver results in wrong
speed detection, as the switch sets the BMSR_ERCAP in BMSR
register, and follow read of the MII_STAT1000 register fails, as
the switch does not support it. Current code did not check,
if a phy_read() fails ... fix this.

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Acked-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
2013-07-30 09:21:42 -04:00
Wolfgang Denk
1a4596601f Add GPL-2.0+ SPDX-License-Identifier to source files
Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini <trini@ti.com>
2013-07-24 09:44:38 -04:00
Fabio Estevam
9a5dad2393 net: phy: Set SUPPORTED_1000baseX_Half flag in ESTATUS_1000_XHALF case
Commit de1d786e (add support for Xilinx 1000BASE-X phy (GTX)) introduced the
checking for ESTATUS_1000_XHALF, but it incorrectly sets the
SUPPORTED_1000baseX_Full flag in this case.

Set the SUPPORTED_1000baseX_Half flag instead.

Acked-by: Charles Coldwell <coldwell@gmail.com>
Reviewed-By: Sascha Silbe <t-uboot@infra-silbe.de>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2013-07-19 17:12:20 -04:00
Sascha Silbe
9ba30f6bc2 phy: fix 10/100Mbps operation on 1Gbps-capable links
de1d786 [add support for Xilinx 1000BASE-X phy (GTX)] introduced a
check for the extended status register in order to support
1Gbps-capable PHYs that don't have the 1000BASE-T registers. Since
Extended Status only indicates what the PHY (i.e. the local side) is
capable of, this broke communication with non-1Gbps peers.

Only check the extended status if the 1000BASE-T registers are
actually missing so we don't end up setting speed to 1Gbps even though
the previous test (for the combination of local and peer support for
1Gbps) already indicated we can't do 1Gbps with the current peer.

Signed-off-by: Sascha Silbe <t-uboot@infra-silbe.de>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2013-07-19 17:12:16 -04:00
Heiko Schocher
433a2c5325 phylib: add atheros ar803x phy
add atheros ar803x phy, used on the upcoming siemens boards.

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Andy Fleming <afleming@freescale.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
2013-06-24 19:11:17 -05:00
Heiko Schocher
96d0b9e100 phylib: add natsemi dp83630 phy
add natsemi dp83630 phy, used on the upcoming siemens boards.

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Andy Fleming <afleming@freescale.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
2013-06-24 19:11:17 -05:00
SARTRE Leo
42a7cb50a9 net: phy: supplement support for Micrel's KSZ9031
Add function ksz9031_phy_extended_write and ksz9031_phy_extended_read

Signed-off-by: Leo Sartre <lsartre@adeneo-embedded.com>
2013-06-24 19:11:16 -05:00
Xie Xiaobo
6027384a69 phylib: Add Atheros AR8035 GETH PHY support
Signed-off-by: Xie Xiaobo <X.Xie@freescale.com>
2013-06-24 19:11:14 -05:00
Charles Coldwell
de1d786edf add support for Xilinx 1000BASE-X phy (GTX)
commit 39695029bc15041c809df3db4ba19bd729c447fa
Author: Charles Coldwell <coldwell@ll.mit.edu>
Date:   Tue Feb 19 08:27:33 2013 -0500

    Changes to support the Xilinx 1000BASE-X phy (GTX/MGT)

Signed-off-by: Charles Coldwell <coldwell@ll.mit.edu>
2013-06-24 19:11:13 -05:00
David Andrey
62d7dba7be PHY: micrel.c: add support for KSZ9031
Add support for Micrel PHY KSZ9031 in phylib,
including small rework for KSZ9021 to avoid
code duplication

Signed-off-by: David Andrey <david.andrey@netmodule.com>
Cc: Troy Kisky <troy.kisky@boundarydevices.com>
Cc: Joe Herschberger <joe.hershberger@gmail.com>
Cc: Andy Fleming <afleming@freescale.com>
Acked-by: Stefan Roese <sr@denx.de>
2013-06-24 19:11:13 -05:00
Sebastian Hesselbarth
aeceec0d0e NET: phy: add 88E1310 PHY initialization
This adds PHY initialization for Marvell Alaska 88E1310 PHY.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
2013-06-24 19:10:14 -05:00
Yegor Yefremov
0fae25089d net: add ICPlus PHY driver
The driver code was taken from Linux kernel source:
drivers/net/phy/icplus.c

Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
2013-06-24 19:07:32 -05:00
Yegor Yefremov
e2043f5c27 phy: export genphy_parse_link()
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
2013-06-24 19:07:32 -05:00
Albert ARIBAUD
a19b0dd62d Merge branch 'u-boot/master' into 'u-boot-arm/master'
Conflicts:
	common/cmd_fpga.c
	drivers/usb/host/ohci-at91.c
2013-05-30 14:45:06 +02:00
Shaohui Xie
d54097b6c1 net/phy: fix select line for TN80xx
TN80xx has same PHY ID as TN2020, but it needs different setting to register
30.93 which used to select line, so we read register 30.32 which has
bit 15:12 to indicate PHY hardware version, for TN20xx we will get 3 or 2,
for TN80xx we will get 5 or 4.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-24 16:54:09 -05:00
Shaohui Xie
7794b1a7e6 net/phy: add VSC8574 support
The VSC8574 is a quad-port Gigabit Ethernet transceiver with four SerDes
interfaces for quad-port dual media capability. This driver supports SGMII
and QSGMII MAC mode. For now SGMII mode is tested.

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2013-05-14 16:13:25 -05:00