Commit graph

64681 commits

Author SHA1 Message Date
Heinrich Schuchardt
6d68735559 doc: sphinx: refresh parse-headers.pl from Linux
Copy parse-headers.pl from Linux kernel tree:

* fix the parameter description %s/--man/--usage/
* fix a documentation reference

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-04-27 14:55:29 -04:00
Heinrich Schuchardt
f561498935 Add .readthedocs.yml
readthedocs.org allows to automatically generate and publish the HTML
documentation for the U-Boot project.

Add a file controlling building https://u-boot.readthedocs.io/.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-04-27 14:55:29 -04:00
Heinrich Schuchardt
38c4f6eb74 doc: specify that xelatex is used as Latex engine
Building the pdf documentation on readthedocs.org fails with pdflatex.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-04-27 14:55:29 -04:00
Rasmus Villemoes
e282c422e0 tools: fw_env: use erasesize from MEMGETINFO ioctl
We have a board with several revisions. The older ones use a nor flash
with 64k erase size, while the newer have a flash with 4k sectors. The
environment size is 8k.

Currently, we have to put a column containing 0x10000 (64k) in
fw_env.config in order for it to work on the older boards. But that
ends up wasting quite a lot of time on the newer boards that could
just erase the 8k occupied by the environment - strace says the 64k
erase takes 0.405 seconds. With this patch, as expected, that's about
an 8-fold better, at 0.043 seconds.

Having different fw_env.config files for the different revisions is
highly impractical, and the correct information is already available
right at our fingertips. So use the erasesize returned by the
MEMGETINFO ioctl when the fourth and fifth columns (sector size and
#sectors, respectively) are absent or contain 0, a case where the
logic previously used to use the environment size as erase size (and
consequently computed ENVSECTORS(dev) as 1).

As I'm only testing this on a NOR flash, I'm only changing the logic
for that case, though I think it should be possible for the other
types as well.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2020-04-27 14:55:29 -04:00
Eugeniy Paltsev
5f2c4e0129 CMD: random: fix return code
As of today 'random' command return 1 (CMD_RET_FAILURE) in case
of successful execution and 0 (CMD_RET_SUCCESS) in case of bad
arguments. Fix that.

NOTE: we remove printing usage information from command body
so it won't print twice.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-27 14:55:29 -04:00
Mauro Condarelli
3fd0231432 mips: Add support for SoM "VoCore2".
Small patch to add support for VoCore/VoCore2 board.

VoCore is open hardware and runs OpenWrt/LEDE.
It has WIFI, USB, UART, 20+ GPIOs but is only one inch square.
It will help you to make a smart house, study embedded system
or even make the tiniest router in the world.

Details about this SoM can be found at "https://vocore.io/v2.html".

Signed-off-by: Mauro Condarelli <mc5686@mclink.it>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-27 20:30:14 +02:00
Stefan Roese
04d21a93fa mips: mt76x8: ddr_cal: Correct dqs_find_min/max implementations
The current implementations have some issues detecting the correct
values:

dqs_find_max() will return "last passing fieldval + 1" instead of
"last passing fieldval". Also it will return "maxval + 1" in the
case that all fieldvals are tested valid (without error).

dqs_find_min() will not test the "lowest" value because of using ">"
instead of ">=".

This patch now rewrites these functions to fix those issues. Also,
this patch uses the same approach of a for loop in both functions making
it easier to read and maintain.

Since the variables are integers now, we can use min()/max(), which
handles the wrap around case for fieldval=0: return (0 - 1).

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Weijie Gao <weijie.gao@mediatek.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27 20:30:13 +02:00
Stefan Roese
112add362b mips: mt76x8: ddr_cal: Change types from u32 to int in dqs_find_min/max
This change is made to enable comparison of integer variables, which
might be negative in the next patch. No functional change is intended
in this patch.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Weijie Gao <weijie.gao@mediatek.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27 20:30:13 +02:00
Stefan Roese
896449fa29 mips: mt76x8: ddr_cal: Rename dqs_test_valid() to dqs_test_error()
This function returns "-1" (true) upon error. So the function name does
not match its implementation which is confusing. This patch renames the
function to dqs_test_error() which makes the code easier to read.

Also change the return type to bool and return "true" or "false".

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Weijie Gao <weijie.gao@mediatek.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27 20:30:13 +02:00
Stefan Roese
e9dbd1ac82 mips: mtmips: Increase CONFIG_SPL_SYS_MALLOC_F_LEN
Since SPL now uses malloc to allocate the buffer for the compressed
image before decompression to the destination address, we need to
configure a big enough malloc space in SPL. 256k seems to be big
enough even for the GARDENA board.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27 20:30:13 +02:00
Weijie Gao
6bd888b63b mips: mtmips: add support for mt7628-rfb
This patch adds support for mt7628 reference board. SPL_DM and DT are not
enabled for SPL to save about 17KiB for u-boot-spl.bin.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27 20:30:13 +02:00
Weijie Gao
757cbbe956 mips: mtmips: enable SPL for all boards
This patch enables SPL for all mtmips boards. And also remove defconfig
files which are intend to build ram bootable u-boot files.

SPL_DM and OF_CONTROL are enabled for both boards.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27 20:30:13 +02:00
Weijie Gao
7a4b6964b5 mips: mtmips: add SPL support
This patch adds SPL support for mtmips platform. The lowlevel architecture
is split into SPL and the rest parts are built into a memory loadable
u-boot image. Optional SPL_DM and OF_CONTROL are also supported.

The increment of size is very small (< 10 KiB) if SPL_DM and OF_CONTROL are
not enabled and the memory bootable u-boot (u-boot.img) is generated
automatically so there is not need to add a separate config for it.

A lzma compressed payload (u-boot-lzma.img) is also generated and it will
be combined with u-boot-spl.bin to form the unified ROM bootable binary
u-boot-mtmips.bin.

A spl loader is added to support uncompress the payload.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27 20:30:12 +02:00
Weijie Gao
02cd449f0b mips: mtmips: rewrite lowlevel codes of mt7628
This patch rewrites the mtmips architecture with the following changes:

1. Move MT7628 soc parts into a subfolder.
2. Lock parts of D-Cache as temporary stack.
3. Reimplement DDR initialization in C language.
4. Reimplement DDR calibration in a clear logic.
5. Add full support for auto size detection for DDR1 and DDR2.
6. Use accurate CPU clock depending on the input xtal frequency for timer
   and delay functions.

Note:

print_cpuinfo() has incompatible parts with MT7620 so it's moved into
mt7628 subfolder.

Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27 20:29:33 +02:00
Weijie Gao
c95c3ec025 mips: add a option to support not reserving malloc space on initial stack
The initial stack on some platforms is too small to hold a large malloc
space. This patch adds a option to allow these platforms not reserving the
malloc space on initial stack. These platforms should set the malloc base
after DRAM is usable.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27 20:29:33 +02:00
Weijie Gao
2434f58c78 mips: add an option to support initialize SRAM for initial stack
Currently CONFIG_MIPS_INIT_STACK_IN_SRAM assumes the memory space for the
initial stack can be used directly. However on some platform the SRAM needs
initialization, e.g. lock cache.

This patch adds an option to allow a new function mips_sram_init() being
called before setup_stack_gd.

Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27 20:29:33 +02:00
Weijie Gao
aba6e77a30 spl: spl_legacy: Add lzma decompression support for legacy image
This patch adds support for decompressing LZMA compressed u-boot payload
in legacy uImage format.

Using this patch together with u-boot-lzma.img may be useful for some
platforms as they can reduce the size and load time of u-boot payload.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-04-27 20:29:33 +02:00
Stefan Roese
f1b0f1550b spl: spl_nor: Remove unused variable 'ret' warning
With the if statement now for the legacy image handling, the compiler
now generates this compile time warning:

common/spl/spl_nor.c:27:6: warning: unused variable 'ret' [-Wunused-variable]

This patch removes this warning by changing the 'ret' variable handling.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Weijie Gao <weijie.gao@mediatek.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2020-04-27 20:29:33 +02:00
Stefan Roese
2fc91ed3ba spl: spl_nor: Move legacy image loading into spl_legacy.c
Move the legacy image loading into spl_legacy.c. This makes it easier
to extend the legacy image handling with new features that other
SPL loaders might use (e.g. spl_spi.c etc).

No functional change intended.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Weijie Gao <weijie.gao@mediatek.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2020-04-27 20:29:33 +02:00
Stefan Roese
5ae526b61f spl: spl_legacy: Use IS_ENABLED() to remove #ifdef
Use IS_ENABLED() instead of #ifdef CONFIG_ to remove one #ifdef.

No functional change intended.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Weijie Gao <weijie.gao@mediatek.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2020-04-27 20:29:33 +02:00
Stefan Roese
c11081729f spl: Extract legacy image handling into separate file
This patch moves the legacy image handling into a separate file, which
will be extended with other legacy image features later.

No function change intended.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Weijie Gao <weijie.gao@mediatek.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2020-04-27 20:29:33 +02:00
Weijie Gao
a38f84b439 Makefile: add support to generate LZMA compressed u-boot image
This patch adds support for generating LZMA compressed u-boot image.
The compressed image can be used for SPL to reduce the size of the u-boot
binary.

Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27 20:29:33 +02:00
Weijie Gao
04cb39946c lib: enable lzma decompression support for SPL build
This patch enables LZMA decompression support for SPL build

Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27 20:29:33 +02:00
Weijie Gao
df3bad96f3 dts: mtmips: add alternative pinmux node for uart2
This patch adds a new pinmux for UART2, which shares the pins with SPIS.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27 20:29:33 +02:00
Weijie Gao
a60c1e6d6b mips: add a mtmips-specific field to architecture-specific global data
SoCs of mtmips can use different CPU frequencies depending on the HW/SW
configurations. For example mt7628 uses 580MHz clock if the input xtal
frequency is 40MHz, and 575MHz clock if the xtal is 25MHz. Upon cold boot
the CPU uses the xtal frequency directly.

So hardcoding the timer frequency (half of the CPU frequency) in
CONFIG_SYS_MIPS_TIMER_FREQ is not a good idea for this case.

This patch adds a mtmips-specific field timer_freq to arch_global_data.
This field will be used later in mtmips-specific get_tbclk() to provide
accurate timer frequency in different boot stage.

Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27 20:29:33 +02:00
Weijie Gao
c366a45649 mips: mtmips: make use of sysreset-resetctrl for mt7628 soc
This patch replaces sysreset-syscon with sysreset-resetctrl for mt7628 soc.

Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27 20:29:33 +02:00
Weijie Gao
caf7092294 sysreset: add reset controller based reboot driver
Some chips provide their sysreset function in reset controller, which is
normally a bit written to 1 to perform the sysreset.

This patch adds a new sysreset driver to take advantage of it.

Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27 20:29:33 +02:00
Stefan Roese
2a9d68e41f mips: spl: Flush cache before jumping to U-Boot proper
This patch adds a MIPS specific jump_to_image_no_args() implementation,
which flushes the U-Boot proper image loaded from the boot device in
SPL before jumping to it.

It has been noticed on MT76x8, that this cache flush is needed. Other
MIPS platforms might need it as well.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Weijie Gao <weijie.gao@mediatek.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2020-04-27 20:29:33 +02:00
Weijie Gao
814a8916a9 mips: add an option to enable u_boot_list section for SPL loaders in u-boot-spl.lds
u_boot_list is not only used by DM, but also by some SPL image load methods
such as spl_nor.c.

This patch adds an option CONFIG_SPL_LOADER_SUPPORT in conjunction with
CONFIG_SPL_DM surrounding the u_boot_list section to make sure SPL image
loaders can be correctly built into u-boot SPL without DM enabled.

Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27 20:29:33 +02:00
Weijie Gao
e9511193fa mips: enable support for appending dtb to spl binary
If CONFIG_SPL_OF_CONTROL is enabled for SPL and CONFIG_OF_SEPARATE is also
enabled, the dtb will be appended to the u-boot-spl.bin.

When calling dm_init_and_scan() in SPL, fdtdec_setup() will try to locate
dtb at the end of u-boot-spl.bin, by referencing to _image_binary_end.

However _image_binary_end is currently missing in u-boot-spl.lds.
This patch adds _image_binary_end to u-boot-spl.lds to make sure linking
u-boot-spl will not fail.

Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27 20:29:33 +02:00
Weijie Gao
6e9281b559 mips: start.S: avoid overwriting outside gd when clearing global data in stack
When setting up initial stack, global data will also be put in the stack,
and being cleared.

The assembler instructions for clearing gd is as follows:

	move	t0, k0
1:
	PTR_S	zero, 0(t0)
	blt	t0, t1, 1b
	 PTR_ADDIU t0, PTRSIZE

t0 is the start address of gd, t1 is the end address of gd (t0 + GD_SIZE).

[PTR_ADDIU t0, PTRSIZE] is in the delay slot of [blt t0, t1, 1b], so it
will be executed before the branch operation.

However the comparison for the BLT instruction is done before executing the
delay slot. This means when the last word just before k1 is cleared, the
loop will continue to run once. This will clear an extra word at k1, which
is outside the global data.

Global data is placed at the top of the stack. If the initial stack is a
SRAM or locked cache, the area outside them may be inaccessible. A write
operation performed in this area may cause an exception.

To solve this, [PTR_ADDIU t0, PTRSIZE] should be placed before the BLT
instruction.

Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27 20:29:33 +02:00
Weijie Gao
79765201ca mips: mtmips: add predefined i-cache/d-cache size and linesize
Both mt7620 and mt7628 has the same cache configuration. There is no need
to use CONFIG_SYS_CACHE_SIZE_AUTO to probe it at runtime.

Add them into Kconfig to reduce some code size.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27 20:29:33 +02:00
Weijie Gao
ce7e197ea5 configs: enable CONFIG_RESTORE_EXCEPTION_VECTOR_BASE for all mtmips boards
This patch enables CONFIG_RESTORE_EXCEPTION_VECTOR_BASE for all mtmips
boards.

Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27 20:29:33 +02:00
Weijie Gao
71059736b8 mips: add support to restore exception vector base before booting linux
In U-Boot the exception vector base will be moved to top of memory, to be
used to display register dump when exception occurs.

But some old linux kernel does not honor the base set in CP0_EBASE. A
modified exception vector base will cause kernel crash.

This patch adds an option to enable reset exception vector base to its
previous value, or a user configured value before booting linux kernel.

Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27 20:29:33 +02:00
Álvaro Fernández Rojas
56ed625ba2 bmips: allow disabling usb support
Currently, if usb is disabled the following error is produced:
  CC      drivers/usb/host/ohci-hcd.o
drivers/usb/host/ohci-hcd.c: In function ‘usb_lowlevel_init’:
drivers/usb/host/ohci-hcd.c:2057:35: error: ‘CONFIG_SYS_USB_OHCI_REGS_BASE’ undeclared (first use in this function); did you mean ‘CONFIG_SYS_MONITOR_BASE’?
  gohci.regs = (struct ohci_regs *)CONFIG_SYS_USB_OHCI_REGS_BASE;
                                   ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~
                                   CONFIG_SYS_MONITOR_BASE
drivers/usb/host/ohci-hcd.c:2057:35: note: each undeclared identifier is reported only once for each function it appears in
drivers/usb/host/ohci-hcd.c:2061:20: error: ‘CONFIG_SYS_USB_OHCI_SLOT_NAME’ undeclared (first use in this function); did you mean ‘CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS’?
  gohci.slot_name = CONFIG_SYS_USB_OHCI_SLOT_NAME;
                    ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~
                    CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2020-04-27 20:29:33 +02:00
Álvaro Fernández Rojas
b9ec102bc4 nand: brcmnand: return without disabling clock
Linux Broadcom NAND driver only disabled clock if no childs are initialized.
This section of the code seems to have been accidentally dropped when it was
imported in U-Boot.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2020-04-27 20:29:33 +02:00
Tom Rini
d16d37bcd4 - simple panel 'nv140fhmn49' compatible
- rockchip eDP and LVDS drivers build fix
 -----BEGIN PGP SIGNATURE-----
 
 iGwEABECACwWIQSC4hxrSoIUVfFO0kRM6ATMmsalXAUCXqaXIA4cYWd1c3RAZGVu
 eC5kZQAKCRBM6ATMmsalXBhpAJsGrm29zjaK8WeS54o5CxBG9yO99QCfeyDcItgq
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Merge tag 'video-for-v2020.07-rc1' of https://gitlab.denx.de/u-boot/custodians/u-boot-video

- simple panel 'nv140fhmn49' compatible
- rockchip eDP and LVDS drivers build fix
2020-04-27 09:41:51 -04:00
Patrick van Gelder
27d706937a ARM: zynq: Fix invalid check on NAND_CMD_NONE.
The end_cmd field in the variables cmd_phase_addr and data_phase_addr
contains the value 0xFF when the end_cmd equals NAND_CMD_NONE. This
should be 0x00.

This is caused by comparing NAND_CMD_NONE (int) with end_cmd (u8).
end_cmd will be promoted by the int value -1 and therefore is not equal
to 0xFF. Solved by casting NAND_CMD_NONE to u8 which will avoid int
promotion.

Signed-off-by: Patrick van Gelder <patrick.vangelder@nl.bosch.com>
Reviewed-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-27 14:21:18 +02:00
Michal Simek
19d1304505 xilinx: Make Xilinx custom distro boot commands more verbose
Extend description of Xilinx custom boot commands to make clear what runs
and what failed.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-27 14:21:18 +02:00
T Karthik Reddy
7a3e239e90 ARM: zynq: Change SYS_MALLOC_LEN in zynq_cse_nand_defconfig
nand_scan_tail() function allocates memory dynamically for
struct nand_buffers which needs ~21kbytes of memory. But the
memory alloted with CONFIG_SYS_MALLOC_LEN is 4k which is insufficient.
Increase CONFIG_SYS_MALLOC_LEN to 32Kbytes from which struct
nand_buffers uses ~21kbytes & remaining memory is used for other.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-27 14:21:18 +02:00
T Karthik Reddy
e86dce1c0c ARM: zynq: Add nand controller node in zynq-ces-nand dt
Add memory-controller@e000e000 node in zynq-ces-nand.dts as
zynq_nand driver utilizes flash@e1000000 node. Without this
dt node mini nand u-boot does not probe.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-27 14:21:18 +02:00
Michal Simek
14c0fbbc94 arm64: zynqmp: Fix irps5401 device nodes
- Do not use irps54012 as device node which is not correct.
- Fix addresses of irps5401/u180 on zcu104 revisions.
- Remove clock-cells property. It is PMIC without any clock output.
- Define irps5401 nodes in zynqmp-e-a2197

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-27 14:21:18 +02:00
Eugeniy Paltsev
73b3c23e48 ARC: AXS10x: cleanup kconfig
As we've dropped NAND support for AXS101 and AXS103
see commit 4f5e552d95 ("ARC: AXS10x: drop NAND support")
we don't need bounce buffer anymore.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2020-04-27 15:04:42 +03:00
Michal Simek
51f6c52e6b xilinx: Move bootmode detection to separate function
Create special function for reading bootmode on Versal and ZynqMP.
Zynq is using specific function (without mask) already.
Future patches will be calling this function from different location too.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-27 13:57:18 +02:00
Michal Simek
a29511eeca xilinx: Move initrd_high setup to common location
Moving to common location initrd_high is also setup for Zynq which hasn't
done in run time code.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-27 13:57:18 +02:00
Saeed Nowshadi
783814288b arm64: zynqmp: Add label to GPIO lines for boot mode and POR
Add label to GPIO lines controlling boot mode and POR EMIO pins so System
Controller can assert those lines on Versal.

Signed-off-by: Saeed Nowshadi <saeed.nowshadi@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-27 13:57:18 +02:00
T Karthik Reddy
7eab624baf clk: versal: Fix watchdog clock issue
Enable mux based clocks to populate LPD_LSBUS clock to xilinx_wwdt
driver. Skip reading clock rate for the mux based clocks with
parent clock id is zero.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
2020-04-27 13:57:17 +02:00
Michal Simek
dec206a09b xilinx: zynqmp: Fix MIO 18 configuration on zcu104 revC
Without this change QSPI is not detected on zcu104 revC.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-27 13:57:17 +02:00
Michal Simek
80fdef12b2 xilinx: Introduce board_late_init_xilinx()
This function should keep common shared late configurations for Xilinx
SoCs.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-27 13:57:17 +02:00
Michal Simek
b72f450527 ARM: zynq: Setup stack size via Kconfig
Stack size has been introduced by commit a69814c815 ("arm64: zynqmp:
Set initrd_high to as high as possible") and commit 085201c246 ("arm64:
versal: Set initrd_high to as high as possible")
to support setting up initrd_high as high as possible.
The same change should happen for Zynq because the code is moved to xilinx
common location.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-27 13:53:13 +02:00