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61 commits

Author SHA1 Message Date
Dan Murphy
39fbac91e1 board: ti: DRA7: Add DP83867 TI phy for rev c
Enable the TI DP83867 Giga bit phy on the
dra7 rev c board.  The rx and tx internal
delays are need for this board so the usage
of RGMII_ID is required.

Signed-off-by: Dan Murphy <dmurphy@ti.com>
Acked-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-04-01 17:18:07 -04:00
Nishanth Menon
8cac14719d board: ti: DRA7: Add DRA72-rev C evm pinmux
Add the pinmux data for rev C evm. This is different from previous
revisions of the platform thanks to the deltas introduced both from
silicon side and from SoC side.

Based on J6EcoES2_EVM_Base_Config-20160309b and PCT-DRA72x-v1.3.0.7 for
SR2.0 silicon.

Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-03-27 09:12:16 -04:00
Ravi Babu
6b1c14bb67 board: ti: DRA72: revC evm: Update sdram timing configuration for SR2.0
DDR configuration has changes from SR1.1 based Rev-A/B version of evm
to the SR2.0 based Rev C of the EVM. Rev C evm now uses the higher
density MT41K512M8RH-125-AAT:E (IT) which is of size 2GB.

Update the DDR configuration based on data from EMIF configuration
tool 1.1.1. NOTE: we use eeprom information (ram_size) to update the
configuration.

Tested-by: Vishal Mahaveer <vishalm@ti.com>
Signed-off-by: Ravi Babu <ravibabu@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-03-27 09:12:14 -04:00
Paul Kocialkowski
3ef56e61c8 omap-common: Rename set_muxconf_regs_essential to set_muxconf_regs
There is no distinction between essential and non-essential mux configuration,
so it doesn't make sense to have an "essential" prefix.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
2016-03-15 15:12:06 -04:00
Lokesh Vutla
26eccf31b3 ARM: DRA72-evm: Update mux and VIRTUAL/MANUAL mode timings
All the mux configurations needs to be done as part of the IODelay
sequence to avoid glitch. Adding all the mux configuration, MANUAL/VIRTUAL
mode configuration as needed for DRA72-evm.

Also update the mux for SD card detect on DRA74-evm.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-03-14 19:18:52 -04:00
Lokesh Vutla
d468b1781a ARM: DRA7-evm: Update memory info in banks
Updating the memory banks properly so that DT is populated accordingly.
And updating this only after DDR is properly detected by eeprom, so that
git bisect is still maintained.

Acked-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2016-03-14 19:18:51 -04:00
Lokesh Vutla
c4a2736ca1 ARM: DRA7: EMIF: Add 4GB DDR settings
The REVH and later versions of DRA7-evm uses MICRON MT41K512M16HA-125 memory
chips which is of size 4GB(2GB on EMIF1 and 2GB on EMIF2). Add support for the
same.

Acked-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2016-03-14 19:18:51 -04:00
Lokesh Vutla
a7638833b3 ARM: DRA7: Move emif settings to board specific files
The newer versions of DRA7 boards has EEPROM populated with DDR
size specified in it. Moving DRA7 specific emif related settings
to board files so that emif settings can be identified based on EEPROM.

Acked-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2016-03-14 19:18:50 -04:00
Lokesh Vutla
25afe55de5 ARM: DRA7: Enable EEPROM support
Enable EEPROM support for DRA74-evm.

Acked-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2016-03-14 19:18:50 -04:00
Vignesh R
900e2104d8 ARM : DRA7: Switch QSPI to use MODE-0 at 64MHz
According to Data Manual(SPRS915P) of AM572x, TI QSPI controller on
DRA74 EVM(rev 1.1+) can support up to 64MHz in MODE-0, whereas MODE-3 is
limited to 48MHz. Hence, switch to MODE-0 for better throughput.
Also, add IODelay parameters for the same.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2016-02-15 12:04:46 -05:00
Cooper Jr., Franklin
bc622966c9 ARM: dra7x/am57x: Remove pin input/output config from WAKEUP pins
The WAKEUP_X pins are always an input no matter the pinmux mode.
However, the 18th bit that typical configures a pin as an input is
considered reserved for the WAKEUP_X pins. Therefore, for any WAKEUP
pin remove any configuration that sets that pin as an input. Since
those pins are only inputs remove any output configuration from those
pins.

Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
2015-11-21 21:50:19 -05:00
Tom Rini
d89059beed board/ti: Update MAINTAINERS entries with more boards
A few config files have been added without updating MAINTAINERS.

Reported-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Tom Rini <trini@konsulko.com>
2015-11-10 09:20:27 -05:00
Paul Kocialkowski
07815eb9f3 omap-common: Common serial and usbethaddr functions based on die id
Now that we have a common prototype to grab the omap die id, functions to figure
out a serial number and usb ethernet address can use it directly.
Those also get an omap_die_id prefix for better consistency.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-10-22 14:17:22 -04:00
Paul Kocialkowski
9fd5401659 omap5: omap_die_id support
This introduces omap5 support for omap_die_id, which matches the common
omap_die_id definition. It replaces board-specific code to grab the die id bits.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-10-22 14:17:21 -04:00
Kishon Vijay Abraham I
6f1af1e358 board: ti: invoke clock API to enable and disable clocks
invoke enable_usb_clocks during board_usb_init and disable_usb_clocks
during board_usb_exit to enable and disable clocks respectively.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-08-28 12:33:22 -04:00
Kishon Vijay Abraham I
03c128c949 board: ti: remove duplicate initialization of vbus_id_status
vbus_id_status is initialized in board_usb_init. So remove it
while creating dwc3_device objects.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-08-28 12:33:20 -04:00
Nishanth Menon
76cff2b108 ARM: DRA74-evm: Use SMA_1 spare register to workaround DP83865 phy on SR2.0
DP83865 ethernet phy used on DRA74x-evm is quirky and the datasheet
provided IODELAY values for standard RGMII phys do not work.

Silicon Revision(SR) 2.0 provides an alternative bit configuration
that allows us to do a "gross adjustment" to launch the data off a
different internal clock edge. Manual IO Delay overrides are still
necessary to fine tune the clock-to-data delays. This is a necessary
workaround for the quirky ethernet Phy we have on the platform.

NOTE: SMA registers are spare "kitchen sink" registers that does
contain bits for other workaround as necessary as well. Hence the
control for the same is introduced in a generic SoC specific, board
generic location.

Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-08-28 12:33:13 -04:00
Nishanth Menon
0358923409 ARM: DRA74-evm: Add iodelay values for SR2.0
Silicon revision 2.0 has new signal routing hence has an updated set of
iodelay parameters to be used. Update the configuration for the same.
Padmux remains the same.

Based on data from VayuES2_EVM_Base_Config-20150807.

NOTE: With respect to the RGMII values, the Manual IODelay values
are used for the fine adjusments needed to meet the tight RGMII
specification.

Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-08-28 12:33:13 -04:00
Tom Rini
b4c4fec300 dra7xx: Move CONS_INDEX to Kconfig and enable CONFIG_SPL_STACK_ADDR
- Move the CONS_INDEX selection out of CONFIG_SYS_EXTRA_OPTIONS and
  into Kconfig proper.
- While in here, enable CONFIG_SPL_STACK_ADDR

Signed-off-by: Tom Rini <trini@konsulko.com>
2015-08-12 20:48:07 -04:00
Roger Quadros
a5878f1933 ARM: DRA7-evm: prevent DCAN1 _wait_target_disable failure in kernel
If board is booted with transitions happening on DCAN1 pins then
the following warning is seen in the kernel at boot when the
hwmod layer initializes.

"omap_hwmod: dcan1: _wait_target_disable failed"

This is because DCAN1 module's SWAKEUP mechanism is broken
and it fails to correctly turn OFF if it sees a transition on the
DCAN1 pins. Suggested workaround is to keep DCAN1 pins in safe mode
while enabling/disabling DCAN1 module.

The hwmod layer enables and disables all modules at boot
and we have no opportunity to put the DCAN1 pins in safe mode
at that point.

DCAN1 is not used by u-boot so it doesn't matter to it if these
pins are in safe mode. The kernel driver correctly configures
the right mode when DCAN1 is active.

Signed-off-by: Roger Quadros <rogerq@ti.com>
2015-07-08 18:26:42 -04:00
Mugunthan V N
0a888f584c ARM: DRA72x: fix io delay calibration for ethernet
we currently use in-development IODelay values for DRA72x which are
proposed in the data sheet, however, DRA72x EVM uses DP83865 ethernet
Phy over RGMII. The PHY characteristics and routing choices made on
the EVM, make the current iodelay values fail ethernet communication.

Instead, we need to choose custom values for DRA72x-evm specifically
designed for the PHY and routing on the platform for ethernet to
function.

Cc: Nishanth Menon <nm@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Tested-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
2015-07-07 20:15:52 -04:00
Lokesh Vutla
2cb3cccb8b ARM: DRA7: CPSW: Remove IO delay hack
Now all manual mode configurations are done as part of
IO delay recalibration sequence, remove the hack done for
CPSW.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2015-06-12 13:02:06 -04:00
Nishanth Menon
27d170af17 ARM: DRA7-evm: Add mux data
Adding the mux data, manual and virtual mode
settings for DRA7-evm.

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Vishal Mahaveer <vishalm@ti.com>
2015-06-12 13:02:06 -04:00
Lokesh Vutla
706dd34893 ARM: DRA7-evm: Enable IO delay recalibration sequence
Enabling IO delay recalibration sequence for DRA7 EVM.
UART and I2C are configured before IO delay recalibration sequence
as these are used earlier and safe to use.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
2015-06-12 13:02:06 -04:00
Lokesh Vutla
1f68451ca0 ARM: DRA7: Make do_set_mux32() generic
do_set_mux32() is redefined in dra7xx and beagle_x15 boards.
IO delay recalibration sequence also needs this.
Making it generic to avoid duplication.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
2015-06-12 13:02:05 -04:00
Dileep Katta
f12467d1a5 ARM: DRA7: Set serial number environment variable
This patch populates serial number environment variable from
die_id_0 and die_id_1 register values for DRA7xx boards.

The function is added in omap common code so that this can be re-used.

Serial# environment variable will be useful to show correct
information in "fastboot devices" commands.

Ref:
http://git.omapzoom.org/?p=repo/u-boot.git;a=commit;h=a6bcaaf67f6e4bcd97808f53d0ceb4b0c04d583c

Signed-off-by: Angela Stegmaier <angelabaker@ti.com>
Signed-off-by: Dileep Katta <dileep.katta@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-04-23 13:59:19 -04:00
Joe Hershberger
0adb5b761f net: cosmetic: Name ethaddr variables consistently
Use "_ethaddr" at the end of variables and drop CamelCase.
Make constant values actually 'const'.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-04-18 11:11:32 -06:00
Kishon Vijay Abraham I
2d48aa69bd usb: modify usb_gadget_handle_interrupts to take controller index
Since we support multiple dwc3 controllers to be existent at the same
time, in order to handle the interrupts of a particular dwc3 controller
usb_gadget_handle_interrutps should take controller index as an
argument.

Hence the API of usb_gadget_handle_interrupts is modified to take
controller index as an argument and made the corresponding changes to all
the usb_gadget_handle_interrupts calls.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
2015-04-14 05:48:11 +02:00
Kishon Vijay Abraham I
a17188c1c2 board: ti: DRA7: added USB initializtion code
Implemented board_usb_init(), board_usb_cleanup() and
usb_gadget_handle_interrupts() in dra7xx board file that
can be invoked by various gadget drivers.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
2015-04-14 05:48:11 +02:00
Lubomir Popov
ae525189f0 ARM: OMAP5: DRA7xx: Fix misleading comments in mux_data.h
The comments on the QSPI pad assignments erronously swapped
the qspi1_d0 and qspi1_d1 functionality and could cause
confusion. QSPI1_D[0] is in fact muxed on pad U1 (gpmc_a16),
and QSPI1_D[1] - on pad P3 (gpmc_a17). Fixing comments.

Signed-off-by: Lubomir Popov <l-popov@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
2014-12-04 21:28:31 -05:00
Felipe Balbi
ba2e01c72b arm: omap5: don't enable misc_init_r by default
Out of all OMAP5-like boards, only one of them
needs CONFIG_MISC_INIT_R, so it's best to enable
that for that particular board only, instead of
enabling for all boards unconditionally.

Signed-off-by: Felipe Balbi <balbi@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
2014-12-04 11:04:12 -05:00
Roger Quadros
3160b1b986 OMAP5+: sata/scsi: Implement scsi_init()
On OMAP platforms, SATA controller provides the SCSI subsystem
so implement scsi_init().

Get rid of the unnecessary sata_init() call from dra7xx-evm
and omap5-uevm board files.

Signed-off-by: Roger Quadros <rogerq@ti.com>
2014-10-10 09:44:42 -04:00
Masahiro Yamada
461be2f96e kconfig: remove redundant "string" type in arch and board Kconfigs
Now the types of CONFIG_SYS_{ARCH, CPU, SOC, VENDOR, BOARD, CONFIG_NAME}
are specified in arch/Kconfig.

We can delete the ones in arch and board Kconfig files.

This commit can be easily reproduced by the following command:

find . -name Kconfig -a ! -path ./arch/Kconfig | xargs sed -i -e '
/config[[:space:]]SYS_\(ARCH\|CPU\|SOC\|\VENDOR\|BOARD\|CONFIG_NAME\)/ {
    N
    s/\n[[:space:]]*string//
}
'

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-09-13 16:43:55 -04:00
Masahiro Yamada
6c5431ac81 omap5: kconfig: move board select menu and common settings
Becuase the board select menu in arch/arm/Kconfig is too big,
move the OMAP5 board select menu to omap5/Kconfig.

Move also common settings (CONFIG_SYS_CPU="armv7" and
CONFIG_SYS_SOC="omap5").

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Reviewed-by: Tom Rini <trini@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
2014-08-30 21:21:59 -04:00
Lokesh Vutla
7b92252370 ARM: DRA: Enable VTT regulator
DRA7 evm REV G and later boards uses a vtt regulator for DDR3 termination
and this is controlled by gpio7_11. Configuring gpio7_11.
The pad A22(offset 0x3b4) is used by gpio7_11 on REV G and later boards,
and left unused on previous boards, so it is safe enough to enable gpio
on all DRA7 boards.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2014-08-25 10:48:13 -04:00
pekon gupta
9352697aa0 board/ti/dra7xx: add support for parallel NOR
This patch adds support for parallel NOR device (S29GL512S10) present on J6-EVM.
The Flash device is connected to GPMC controller on chip-select[0] and accessed
as memory-mapped device. It has data-witdh=x16, capacity-64MBytes(512Mbits) and
is CFI compatible.

As multiple devices are share GPMC pins on this board, so following board
settings are required to detect NOR device:
     SW5.1 (NAND_BOOTn) = OFF (logic-1)
     SW5.2 (NOR_BOOTn)  = ON  (logic-0) /* Active-low */
     SW5.3 (eMMC_BOOTn) = OFF (logic-1)
     SW5.4 (QSPI_BOOTn) = OFF (logic-1)

And also set appropriate SYSBOOT configurations:
     SW3.1 (SYSBOOT[ 8])= ON  (logic-1) /* selects SYS_CLK1 speed */
     SW3.2 (SYSBOOT[ 9])= OFF (logic-0) /* selects SYS_CLK1 speed */
     SW3.3 (SYSBOOT[10])= ON  (logic-1) /* wait-pin monitoring = enabled */
     SW3.4 (SYSBOOT[11])= OFF (logic-0) /* device type: Non Muxed */
     SW3.5 (SYSBOOT[12])= OFF (logic-0) /* device type: Non Muxed */
     SW3.6 (SYSBOOT[13])= ON  (logic-1) /* device bus-width: 1(x16) */
     SW3.7 (SYSBOOT[14])= OFF (logic-0) /* reserved */
     SW3.8 (SYSBOOT[15])= ON  (logic-1) /* reserved */

Also, following changes are required to enable NOR Flash support in
dra7xx_evm board profile:
2014-08-25 10:48:12 -04:00
pekon gupta
54a97d2849 board/ti/dra7xx: add support for parallel NAND
This patch adds support for x16 NAND device (MT29F2G16AAD) connected to GPMC
chip-select[0] on DRA7xx EVM.
As GPMC pins are shared by multiple devices, so in addition to this patch
following board settings are required for NAND device detection [1]:

  SW5.9 (GPMC_WPN)   = OFF (logic-1)
  SW5.1 (NAND_BOOTn) = ON  (logic-0) /* Active-low */
  SW5.2 (NOR_BOOTn)  = OFF (logic-1)
  SW5.3 (eMMC_BOOTn) = OFF (logic-1)
  SW5.4 (QSPI_BOOTn) = OFF (logic-1)

And also set appropriate SYSBOOT configurations
  SW2.1 (SYSBOOT[0]) = ON  (logic-1) /* selects NAND Boot */
  SW2.2 (SYSBOOT[1]) = OFF (logic-0) /* selects NAND Boot */
  SW2.3 (SYSBOOT[2]) = OFF (logic-0) /* selects NAND Boot */
  SW2.4 (SYSBOOT[3]) = OFF (logic-0) /* selects NAND Boot */
  SW2.5 (SYSBOOT[4]) = ON  (logic-1) /* selects NAND Boot */
  SW2.6 (SYSBOOT[5]) = ON  (logic-1) /* selects NAND Boot */
  SW2.7 (SYSBOOT[6]) = OFF (logic-0) /* reserved */
  SW2.8 (SYSBOOT[7]) = OFF (logic-0) /* reserved */

  SW3.1 (SYSBOOT[ 8])= ON  (logic-1) /* selects SYS_CLK1 speed */
  SW3.2 (SYSBOOT[ 9])= OFF (logic-0) /* selects SYS_CLK1 speed */
  SW3.3 (SYSBOOT[10])= ON  (logic-1) /* wait-pin monitoring = enabled */
  SW3.4 (SYSBOOT[11])= OFF (logic-0) /* device type: Addr/Data Muxed */
  SW3.5 (SYSBOOT[12])= ON  (logic-1) /* device type: Addr/Data Muxed */
  SW3.6 (SYSBOOT[13])= ON  (logic-1) /* device bus-width: 1(x16) */
  SW3.7 (SYSBOOT[14])= OFF (logic-0) /* reserved */
  SW3.8 (SYSBOOT[15])= ON  (logic-1) /* reserved */

Following changes are required in board.cfg to enable NAND on J6-EVM:
2014-08-25 10:48:12 -04:00
Masahiro Yamada
93d4334f7f Add board MAINTAINERS files
We have switched to Kconfig and the boards.cfg file is going to
be removed. We have to retrieve the board status and maintainers
information from it.

The MAINTAINERS format as in Linux Kernel would be nice
because we can crib the scripts/get_maintainer.pl script.

After some discussion, we chose to put a MAINTAINERS file under each
board directory, not the top-level one because we want to collect
relevant information for a board into a single place.

TODO:
Modify get_maintainer.pl to scan multiple MAINTAINERS files.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Suggested-by: Tom Rini <trini@ti.com>
Acked-by: Simon Glass <sjg@chromium.org>
2014-07-30 08:48:06 -04:00
Masahiro Yamada
dd84058d24 kconfig: add board Kconfig and defconfig files
This commit adds:
 - arch/${ARCH}/Kconfig
    provide a menu to select target boards
 - board/${VENDOR}/${BOARD}/Kconfig or board/${BOARD}/Kconfig
    set CONFIG macros to the appropriate values for each board
 - configs/${TARGET_BOARD}_defconfig
    default setting of each board

(This commit was automatically generated by a conversion script
based on boards.cfg)

In Linux Kernel, defconfig files are located under
arch/${ARCH}/configs/ directory.
It works in Linux Kernel since ARCH is always given from the
command line for cross compile.

But in U-Boot, ARCH is not given from the command line.
Which means we cannot know ARCH until the board configuration is done.
That is why all the "*_defconfig" files should be gathered into a
single directory ./configs/.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
2014-07-30 08:48:01 -04:00
Albert ARIBAUD
b1cdd8baa1 Merge branch 'u-boot-ti/master' into 'u-boot-arm/master' 2014-07-28 12:26:21 +02:00
Mugunthan V N
4c8014b942 ARM: dra7_evm: Add Ethernet support for dra72x platform
Set the active_slave to 1 as slave 1 is pinned out in dra72x base board

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
2014-07-25 15:21:05 -04:00
Mugunthan V N
e5ff845bff ARM: DRA7xx: Add cpsw second port pinmux
Add cpsw second slave port pinmux to use it as primary ethernet port

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
2014-07-25 15:21:05 -04:00
Lokesh Vutla
4ec3f6e510 ARM: DRA7xx: Update the board_name env variable
Update the board_name env variable and accordingly
populate the dtb file.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2014-07-14 11:16:38 -04:00
Felipe Balbi
49b633b3d3 board: ti: dra7xx: add mux data for UART3
J6 EVM can be built with UART3 as console, but currently
there's nothing muxing UART3 correctly. Likely this only
works because, based on commit log, author was only testing
with UART3 boot and - I assume - ROM code leave UART3 correctly
muxed in that case.

If we want to boot from MMC and still use UART3 as console,
then we need to mux those signals correctly.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-07-07 19:42:34 -04:00
Tom Rini
79b079f35c dra7xx_evm: Add QSPI_4 support, qspiboot build target
We previously only supported QSPI_1 (single) support.  Add QSPI_4 (quad)
read support as well.  This means we can be given one of two boot device
values, but don't care which it is, so perform a fixup on the QSPI_4
value.  We add a qspiboot build target to better show how you would use
QSPI as a boot device in deployment.  When we boot from QSPI, we can
check the environment for 'boot_os' to control Falcon Mode.

Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
2014-04-17 17:24:37 -04:00
Tom Rini
33ace362fd mmc: Add 'mmc rst-function' sub-command
Some eMMC chips may need the RST_n_FUNCTION bit set to a non-zero value
in order for warm reset of the system to work.  Details on this being
required will be part of the eMMC datasheet.  Also add using this
command to the dra7xx README.

* Whitespace fix by panto

Signed-off-by: Tom Rini <trini@ti.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-04-02 13:02:58 +03:00
Mugunthan V N
8feb37b9be ARM: DRA7xx: add support for reading cpsw 2nd mac from efuse
Adding support for reading cpsw 2nd mac address from efuse and pass it
to kernel via dtb which will be used in dual emac mode of cpsw.
Also correct the bit masking of mac id read from the efuse.

Acked-by: Tom Rini <trini@ti.com>
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
2014-03-04 09:42:07 -05:00
Mugunthan V N
9c653aad16 drivers: net: cpsw: add support to have phy address from cpsw platform data
Some platforms like AM437x have different EVMs with different phy addresses,
so this patch adds support for passing phy address via cpsw plaform data.
Also renamed phy_id to phy_addr so better understanding of the code.

Reviewed-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
[trini: Update BuR am335x_igep0033 pcm051_rev3 pcm051_rev1 cm_t335
pengwyn boards]
Signed-off-by: Tom Rini <trini@ti.com>
2014-03-04 09:41:53 -05:00
Dan Murphy
e9024ef27d ARM: O5/dra7xx: Add SATA boot support
Add the SATA boot support for OMAP5 and dra7xx.

Renamed the omap_sata_init to the common init_sata(int dev)
for commonality in with sata stack.

Added the ROM boot device ID for SATA.

Signed-off-by: Dan Murphy <dmurphy@ti.com>
Reviewed-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
2014-02-19 10:47:45 -05:00
Tom Rini
b818d9ab8d dra7xx_evm: Add CONFIG_SUPPORT_EMMC_BOOT, document usage
Add a README to the board which lists the commands required to enable
booting from the eMMC boot partitions found on the board.

Cc: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-02-07 18:17:49 +02:00