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Author SHA1 Message Date
Eugen Hristev
dc470834a1 clk: at91: sama7g5: add 5th divisor for mck0 layout and characteristics 
This SoC has the 5th divisor for the mck0 master clock.
Adapt the characteristics accordingly.

Reported-by: Mihai Sain <mihai.sain@microchip.com>
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
 2020-10-19 09:19:53 +03:00
Claudiu Beznea
6a6fe3ed4d clk: at91: sama7g5: add clock support 
Add clock support for SAMA7G5.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
 2020-09-22 11:27:18 +03:00