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2 commits

Author SHA1 Message Date
Siva Durga Prasad Paladugu
95105089af clk: versal: Add clock driver support 
This patch adds clock driver support for Versal platform. The clock driver
queries and performs clock operations using PLM firmware by communicating
with it using SMC calls.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
 2019-10-08 09:41:24 +02:00
Rajan Vaja
14723ed544 zynqmp: firmware: Add Xilinx ZynqMP firmware driver 
Add simple ZynqMP firmware drive to populate child nodes under
zynqmp_firmware DT node.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
 2019-10-08 09:11:14 +02:00