The RD-AC5X doesn't make use of EFI or SMBIOS. Recently we started seeing
boot failures such as
WARNING: SMBIOS table_address overflow 27f60f020
Failed to write SMBIOS table
initcall failed at event 10/(unknown) (err=-22)
### ERROR ### Please RESET the board ###
The error is because the physical address of the RAM on the AC5X SoC is
above the 32GiB boundary. As we don't need SMBIOS or EFI this can be
safely disabled.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
In this platform, arch_misc_init doesn't perform any real function. The
call to get_soc_type_rev has no lasting side effects.
Cc: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
This converts the following to Kconfig:
CONFIG_GATEWAYIP
CONFIG_HOSTNAME
CONFIG_IPADDR
CONFIG_NETMASK
CONFIG_ROOTPATH
CONFIG_SERVERIP
CONFIG_UBOOTPATH
To do this, we introduce a CONFIG_USE_ form of each of the above and
change include/env_default.h to test for that to be set before setting a
value. Further, we don't want to stringify the IP address related values
as they are now properly strings via Kconfig.
Signed-off-by: Tom Rini <trini@konsulko.com>
The RD-AC5X-32G16HVG6HLG-A0 development board main components and
features include:
* Main 12V/54V power supply
* 270 Gbps throughput packet processor on the main board
* DDR4:
* SR1: 2GB DDR4 2400MT/S(1GB x 2 pcs ) with ECC(1GB x 1 pcs)
* SR2: 4GB DDR4 2400MT/S(2GB x 2 pcs ) with ECC(2GB x 1 pcs)
* PCB co-layout with 4GB device to support 8GB (Dual CS) requirement
* 16GB eMMC (Samsung KLMAG1JETD-B041006)
* 16MB SPI NOR(GD25Q127C)
* 32 x 1000 Base-T interfaces
* 16 x 2500 Base-T interfaces
* SR1: 88E2540*4
* SR2: 88E2580*1+88E2540*2
* Six (6) x 25G Base-R SFP28 interfaces
* One (1) x RJ-45 console connector, interfacing to the on board UART
* One (1) x USB Type-A connector, interfacing to the USB 2.0 port (0)
* One (1) x USB Type-mini B connector, interfacing to the USB 2.0 port (1)
* One (1) x RJ-45 1G Base-T Management port, interfacing to the host
port (shared with PCIe) Connected to 88E1512 Gigabit Ethernet Phy
* One (1) x Oculink port, interfacing to the PCIe port for external CPU
connection
* POE 802.3AT support on Port 1 ~ Port 32, 802.3BT support on Port 33 ~
Port 48 (Microsemi PD69208T4, PD69208M or TI TPS2388,TPS23881
solution)
* POE total power budget 780W
* LED interfaces per network port/POE
* LED interfaces (common) showing system status
* PTP TC mode Supported (Reserved M.2 connector to support BC mode)
Signed-off-by: Chris Packham <judge.packham@gmail.com>
