Commit graph

105 commits

Author SHA1 Message Date
Vignesh R
6d82517836 configs: Don't use SPI_FLASH_BAR as default
Now that new SPI NOR layer uses stateless 4 byte opcodes by default,
don't enable SPI_FLASH_BAR. For SPI controllers that cannot support
4-byte addressing, (stm32_qspi.c, fsl_qspi.c, mtk_qspi.c, ich.c,
renesas_rpc_spi.c) add an imply clause to enable SPI_FLASH_BAR so as to
not break functionality.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Stefan Roese <sr@denx.de>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
2019-02-07 15:33:22 +05:30
Michal Simek
89fe08bb88 arm64: versal: Enable dm command
It is useful to have this command enable to see which devices are
bind/probed.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-01-24 10:03:44 +01:00
Michal Simek
c447a17d9e arm64: versal: Enable i2c cadence controller and i2c command
Enable communication over i2c.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-01-24 10:03:44 +01:00
Michal Simek
fa7971574c arm64: versal: Setup DM_ETH/MMC if NET/MMC is enabled
Setup proper ETH/MMC dependency for the whole platform.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-01-24 10:03:43 +01:00
Michal Simek
ddccf5ef90 arm64: versal: Add Xilinx Versal Virtual QEMU board
Virtual QEMU board is generating DTB self and putting it to
VERSAL_QEMU_DTB_ADDR address.
Board is using CONFIG_OF_BOARD which ensures that u-boot is aligned with
board created by QEMU.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-10-16 16:53:24 +02:00