Commit graph

27677 commits

Author SHA1 Message Date
Kevin Hilman
d210718d9a common/board_f.c: fix compile error when tracing disabled
When CONFIG_TRACE is disabled, linking fails with:

common/built-in.o:(.data.init_sequence_f+0x8): undefined reference to `trace_early_init'

To fix, wrap the call to trace_early_init() with #ifdef CONFIG_TRACE.

Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@ti.com>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
2014-12-29 16:31:23 -05:00
Steve Rae
4d013d8fa8 bcm281xx: add support for "USB OTG clock"
enable this clock with the following:
  clk_usb_otg_enable((void *)HSOTG_BASE_ADDR)

Signed-off-by: Steve Rae <srae@broadcom.com>
Reviewed-by: Felipe Balbi <balbi@ti.com>
2014-12-29 16:31:23 -05:00
Alexey Brodkin
e38d1cb28c initcall: add explicit hint if initcall was relocated
Commit "initcall: Improve debugging support" makes sense and indeed
simplifies process of matching initcalls executed with static
disassembly.

Until you are debugging relocation functionality.

Existign output may make you think that at some point execution somehow
returned back to non-relocated area. And there're many reasons/problems
that may provoke this behavior.

In order to make things clear let's add explicit mention in case initall
was actually relocated like this:
--->---
initcall: 810015f8
Relocation Offset is: 0efcf000
Relocating to 8ffcf000, new gd at 8fdced3c, sp at 8fdced20
initcall: 810015b8
initcall: 8ffd093c
initcall: 8ffd0a14
initcall: 81001940 (relocated to 8ffd0940)
initcall: 81001958 (relocated to 8ffd0958)
--->---

Note "unexpected" jump from 0x8f... area to 0x81... area.
Without explanation this raises many questions: execution jumped in
relocated area right as expected and then for some reason returned back?

But I hope comment in brackets will save some time for those curious
developers who are careful enough to catch "unexpected jump to pre-reloc
area" or those unlucky ones who'll have to deal with relocation
debugging.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Minkyu Kang <mk7.kang@samsung.com>
2014-12-29 16:31:23 -05:00
Masahiro Yamada
73c2575306 scripts: fix binutils-version.sh
The current binutils-version.sh expects the version string at the end
of the first line.  It turned out to not work with Linaro toolchain:
It has "Linaro 2014.09" at the back.

To fix this issue, let's parse the word right after the close
parenthesis.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Reported-by: York Sun <yorksun@freescale.com>
Acked-by: Dirk Behme <dirk.behme@gmail.com>
2014-12-29 16:31:23 -05:00
Stephen Warren
914627fe1c ARM: rpi: consolidate board rev error checking
Create a fake model table entry with default values, so we can error
check the board rev value once when querying it from the firmware, rather
than error-checking for invalid board rev values every time the model
table is used.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
2014-12-29 16:31:22 -05:00
Stephen Warren
47705eff7a ARM: rpi: support model A+
Add a board rev entry for the new model A+, and augment the board
rev error handling code to be a bit more verbose.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
2014-12-29 16:31:22 -05:00
Stephen Warren
3207d8fc9c ARM: rpi: only set usbethaddr on relevant systems
Model A and CM RPis don't have an on-board USB Ethernet device. Hence,
there's no point setting $usbethaddr based on the device fuses. Use the
model detection code to gate this. Note that the fuses are actually
programmed even on those devices though.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
2014-12-29 16:31:22 -05:00
Linus Walleij
03ca6a394a vexpress64: switch to generic board
The few Versatile Express ARMv8 platforms we have may just as
well be switched to generic board from the beginning.

Tested on the ARM foundation model and the in progress support
for the ARMv8 Juno board.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Steve Rae <srae@broadcom.com>
2014-12-29 07:44:06 -05:00
Linus Walleij
058235c06b vexpress64: take over maintenance of the semi vexpress64
As agreed with Steve Rae I'm taking over maintenance of the
semihosted, emulated FVP/foundation model Versatile Express
64 bit board variant.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Steve Rae <srae@broadcom.com>
2014-12-29 07:44:06 -05:00
Linus Walleij
9be5c661be arm: semihosting: get rid of forward declarations
By rearranging the functions in the semihosting code we can
avoid forward-declaration of the internal static functions.
This puts the stuff in a logical order: read/open/close/len
and then higher-order functions follow at the end.

Cc: Darwin Rambo <drambo@broadcom.com>
Cc: AKASHI Takahiro <takahiro.akashi@linaro.org>
Cc: Mark Hambleton <mark.hambleton@arm.com>
Cc: Tom Rini <trini@ti.com>
Acked-by: Steve Rae <srae@broadcom.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-12-29 07:44:06 -05:00
Linus Walleij
4e1ef15091 arm: semihosting: fix up compile bugs
There is currently a regression when using newer ARM64 compilers
for semihosting: the way long types are inferred from context
is no longer the same.

The semihosting runtime uses long and size_t, so use this
explicitly in the semihosting code and interface, and voila:
the code now works again.

Tested with aarch64-linux-gnu-gcc: Linaro GCC 4.9-2014.09.

Cc: Darwin Rambo <drambo@broadcom.com>
Cc: AKASHI Takahiro <takahiro.akashi@linaro.org>
Cc: Mark Hambleton <mark.hambleton@arm.com>
Cc: Tom Rini <trini@ti.com>
Acked-by: Steve Rae <srae@broadcom.com>
Suggested-by: Mark Hambleton <mark.hambleton@arm.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-12-29 07:44:06 -05:00
Linus Walleij
50b5639430 arm: semihosting: staticize internal functions
The semihosting code exposes internal file handle handling
functions to read(), open(), close() and get the length of
a certain file handle.

However the code using it is only interested in either
reading and entire named file into memory or getting the
file length of a file referred by name. No file handles
are used.

Thus make the file handle code internal to this file by
removing these functions from the semihosting header file
and staticize them.

This gives us some freedom to rearrange the semihosting
code without affecting the external interface.

Cc: Darwin Rambo <drambo@broadcom.com>
Cc: AKASHI Takahiro <takahiro.akashi@linaro.org>
Cc: Mark Hambleton <mark.hambleton@arm.com>
Cc: Tom Rini <trini@ti.com>
Acked-by: Steve Rae <srae@broadcom.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-12-29 07:44:06 -05:00
Tom Rini
437b23e67f Merge branch 'rmobile' of git://git.denx.de/u-boot-sh 2014-12-28 22:09:27 -05:00
Nobuhiro Iwamatsu
2a1d2a0351 arm: rmobile: kconfig: Remove '+S:' prefix from defconfig files
'+S' is unnecessary because boards of rmobile do not use SPL.
This removes from armadillo-800eva and kzm9g.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2014-12-26 10:21:17 +09:00
Joonyoung Shim
fb56435f50 arm: exynos: clock: support SPLL as mmc source clock for exynos5420
MMC of exynos5420 can select SPLL as source clock, so add to support
SPLL in exynos5420_get_mmc_clk(). It was tested on Odroid-XU3 board.

Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-12-24 10:56:24 +09:00
Sjoerd Simons
68904c8322 ARM: exynos5420: Leave VBUS GPIO configuration up to common code
Since commit 4a271cb1b4 (exynos: usb: Switch USB VBUS GPIOs to be
device tree configured) it's not needed for the board specific files to
turn on the VBUS GPIO by hand as that gets done based on device tree. So
drop the redundant code from the SMDK5420 board file.

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-12-22 20:49:41 +09:00
Sjoerd Simons
ce88a25cc2 odroid-XU3: Add entry for DTS EHCI GPIO
Add samsung,vbus-gpio information for the XU3. This allows the usage of
the EHCI controller on the XU3, which is connected to the SMSC LAN9514
chip (usb hub + network).

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-12-22 20:48:01 +09:00
Sjoerd Simons
a7b99204a0 exynos5420: fix compilation without parade video
Not all exynos 5420 based devices with an LCD also have a parade LVDS
bridge. So make sure compilation doesn't break if CONFIG_LCD is enabled
and CONFIG_VIDEO_PARADE is not.

As a side-effect move the parade functions from the exynos system header
file to its own file.

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-12-22 20:38:27 +09:00
Sjoerd Simons
307e90e617 Exynos5800: The Peach-Pi board does not have a Parade video bridge
Unlike the Peach-Pit board, there is no parade edp to lvds bridge on the
Pi. So drop it from  device-tree

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-12-22 20:38:22 +09:00
Hyungwon Hwang
d10e953137 Odroid-XU3: Add documentation for Odroid-XU3
This patch adds documentation for Odroid-XU3. This documentation is
based on that of Odroid (doc/README-odroid) made by Przemyslaw Marczak.
The documentation includes basic information about boot media layout,
environment, partition layout, and the instruction to burn the u-boot
image to boot media.

Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-12-22 20:37:10 +09:00
Hyungwon Hwang
6207604f9c Odroid-XU3: Add support for Odroid-XU3
This patch adds support for Odroid-XU3.

Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com>
Reviewed-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Tested-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-12-22 20:37:10 +09:00
Hyungwon Hwang
43900da886 config: exynos5420: move non common configs to specific board files
The media for boot and environment is a board-specific feature, not a
processor-specific. This is same to console port number and  some
other addresses. This patch moves the that kinds of configs to each
board-specific files from the common config file for Exynos5420.

Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-12-22 20:37:10 +09:00
Stefan Roese
d0e932de7c arm: socfpga: Change watchdog timeout
The current current watchdog timeout of 12 seconds is a bit small for
booting into Linux, especially when using a NFS based rootfs. So lets
change this timeout to a more defensive value of 30 seconds.

Also we now call the hw_watchdog_init() function so that we override
the value already configured from the Preloader.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Vince Bridgers <vbridger@opensource.altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Chin Liang See <clsee@altera.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Pavel Machek <pavel@denx.de>
2014-12-21 14:39:04 +01:00
Tom Rini
d8046ff0b0 Merge git://git.denx.de/u-boot-x86 2014-12-19 17:09:26 -05:00
Jan Luebbe
7ae350a030 arm: mxs: olinuxino: move DRAM config tuning to SPL
The weak mxs_adjust_memory_params function is called from spl_mem_init.c,
so it must be linked into the SPL to have an effect. Move it from
mx23_olinuxino.c to spl_boot.c.

This change was verified by reading back the register values.

Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2014-12-19 15:32:14 +01:00
Fabio Estevam
76494f7ac3 mx51evk: Fix MX51EVK_USB_CLK_EN_B definition
As per the mx51evk schematics MX51EVK_USB_CLK_EN_B is GPIO2_1, not GPIO2_2.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-12-19 15:32:14 +01:00
Stefan Roese
576cd6b3fa arm: mx6: gw_ventana: Change clock init to enable NAND related clocks
Otherwise NAND booting is likely to fail. Since this disables the NAND related
clocks and SPL can't load the main U-Boot from NAND.

This problem was introduced with this patch:

e25fbe3f (gw_ventana: Move the DCD settings to spl code)

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Tim Harvey <tharvey@gateworks.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-12-19 15:32:14 +01:00
Christian Gmeiner
7f22307c03 ot1200: enable support for USB_STORAGE
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2014-12-19 15:32:13 +01:00
Christian Gmeiner
bd2600d375 ot1200: add fsuuid command
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2014-12-19 15:32:13 +01:00
Peng Fan
fb00bda705 imx:mx6qarm2 add board level support for usb
Add pinmux settings and implement board_ehci_hcd_init

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
2014-12-19 15:32:13 +01:00
Peng Fan
5a3d63c5cd imx:mx6sabresd add board level support for usb
Add pinmux settings, implement board_ehci_hcd_init and board_ehci_power

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
2014-12-19 15:32:13 +01:00
Peng Fan
eb412d79e4 imx:mx6 fix return value of mxc_get_clock
mxc_get_clock's return type is unsigned int. 'return -1' is same with
'return 0xffffffff', so 0 should be used as the return value when
unsupported mxc_clock type is passed to mxc_get_clock.

Also include an err message when unsupported mxc_clock type is passed
to mxc_get_clock.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-12-19 10:43:04 +01:00
Simon Glass
d2c6181d2d x86: Add a script to process Intel microcode files
Intel delivers microcode updates in a microcode.dat file which must be
split up into individual files for each CPU. Add a tool which performs
this task. It can list available microcode updates for each model and
produce a new microcode update in U-Boot's .dtsi format.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2014-12-18 17:26:08 -07:00
Bin Meng
255fd5caa5 x86: Clean up the FSP support codes
This is the follow-on patch to clean up the FSP support codes:

- Remove the _t suffix on the structures defines
- Use __packed for structure defines
- Use U-Boot's assert()
- Use standard bool true/false
- Remove read_unaligned64()
- Use memcmp() in the compare_guid()
- Remove the cast in the memset() call
- Replace some magic numbers with macros
- Use panic() when no valid FSP image header is found
- Change some FSP utility routines to use an fsp_ prefix
- Add comment blocks for asm_continuation and fsp_init_done
- Remove some casts in find_fsp_header()
- Change HOB access macros to static inline routines
- Add comments to mention find_fsp_header() may be called in a
  stackless environment
- Add comments to mention init(&params) in fsp_init() cannot
  be removed

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2014-12-18 17:26:08 -07:00
Bin Meng
5dad97ed61 x86: Add a README.x86 for U-Boot on x86 support
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
(Use 'Link' as the name for the Chromebook Pixel consistently)

Change-Id: I158c88653978ff212334f6d4ffeaf49fa81baefe
2014-12-18 17:26:08 -07:00
Bin Meng
41702bac01 x86: Rename coreboot-serial to x86-serial
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2014-12-18 17:26:08 -07:00
Bin Meng
aada6276c6 x86: crownbay: Add SDHCI support
There are two standard SD card slots on the Crown Bay board, which
are connected to the Topcliff PCH SDIO controllers. Enable the SDHC
support so that we can use them.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2014-12-18 17:26:08 -07:00
Bin Meng
0ff65eb99c x86: crownbay: Enable Intel E1000 NIC support
We don't have driver for the Intel Topcliff PCH Gigabit Ethernet
controller for now, so enable the Intle E1000 NIC support, which
can be plugged into any PCIe slot on the Crown Bay board.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2014-12-18 17:26:07 -07:00
Bin Meng
adfe3b247a x86: crownbay: Add SPI flash support
The Crown Bay board has an SST25VF016B flash connected to the Tunnel
Creek processor SPI controller used as the BIOS media where U-Boot
is stored. Enable this flash support.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2014-12-18 17:26:07 -07:00
Bin Meng
63faf2507d x86: Include FSP and CMC binary in the u-boot.rom build rules
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2014-12-18 17:26:07 -07:00
Bin Meng
8c5224c9f5 x86: Use consistent name XXX_ADDR for binary blob flash address
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2014-12-18 17:26:07 -07:00
Bin Meng
405d8205d7 x86: Add crownbay defconfig and config.h
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2014-12-18 17:26:07 -07:00
Bin Meng
58f542de30 x86: Add queensbay and crownbay Kconfig files
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2014-12-18 17:26:06 -07:00
Bin Meng
240a79d95c x86: Enable the queensbay cpu directory build
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2014-12-18 17:26:06 -07:00
Bin Meng
b71eec3129 x86: ich6-gpio: Add Intel Tunnel Creek GPIO support
Intel Tunnel Creek GPIO register block is compatible with current
ich6-gpio driver, except the offset and content of GPIO block base
address register in the LPC PCI configuration space are different.

Use u16 instead of u32 to store the 16-bit I/O address of the GPIO
registers so that it could support both Ivybridge and Tunnel Creek.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2014-12-18 17:26:06 -07:00
Simon Glass
0f61de8d9d x86: Convert microcode format to device-tree-only
To avoid having two microcode formats, adjust the build system to support
obtaining the microcode from the device tree, even in the case where it
must be made available before the device tree can be accessed.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2014-12-18 17:26:06 -07:00
Bin Meng
b2e02d2865 x86: Add basic support to queensbay platform and crownbay board
Implement minimum required functions for the basic support to
queensbay platform and crownbay board.

Currently the implementation is to call fsp_init() in the car_init().
We may move that call to cpu_init_f() in the future.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2014-12-18 17:26:06 -07:00
Bin Meng
efbeeafe95 x86: Integrate Tunnel Creek processor microcode
Integrate the processor microcode version 1.05 for Tunnel Creek,
CPUID device 20661h.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2014-12-18 17:26:05 -07:00
Simon Glass
b591ee3913 x86: Correct problems in the microcode loading
There are several problems in the code. The device tree decode is incorrect
in ways that are masked due to a matching bug. Both are fixed. Also
microcode_read_rev() should be inline and called before the microcode is
written.

Note: microcode writing does not work correctly on ivybridge for me. Further
work is needed to resolve this. But this patch tidies up the existing code
so that will be easier.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-12-18 17:26:05 -07:00
Simon Glass
cf29e3e303 x86: ivybridge: Update the microcode
There are new microcode revisions available. Update them. Also change
the format so that the first 48 bytes are not omitted from the device tree
data.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-12-18 17:26:05 -07:00