Commit graph

19821 commits

Author SHA1 Message Date
Dario Binacchi
6337d53fdf arm: dts: sync am33xx with Linux 5.9-rc7
There have been several changes to the am33xx.dtsi, so this patch
re-syncs it with Linux.

Let's add proper interconnect hierarchy for l4 interconnect instances
with the related ti-sysc interconnect module data as documented in
Documentation/devicetree/bindings/bus/ti-sysc.txt of the Linux kernel.
With l4 interconnect hierarchy and ti-sysc interconnect target module
data in place, we can simply move all the related child devices to their
proper location and enable probing using ti-sysc.

The am33xx-clock.dtsi file is the same as that of the Linux kernel,
except for the reg property of the node l4-wkup-clkctrl@0.
As for the am33xx.dtsi file, all the devices with drivers not yet
implemented and those I was able to test with this patch have been moved
to am33xx-l4.dtsi. In case of any regressions, problem devices can be
reverted by moving them back and removing the related interconnect
target module node.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
2021-01-12 10:58:04 +05:30
Dario Binacchi
92cc4e1c21 bus: ti: add minimal sysc interconnect target driver
We can handle the sysc interconnect target module in a generic way for
many TI SoCs. Initially let's just enable domain clocks before the
children are probed.

The code is loosely based on the drivers/bus/ti-sysc.c of the Linux
kernel version 5.9-rc7.
For DT binding details see:
- Documentation/devicetree/bindings/bus/ti-sysc.txt

Signed-off-by: Dario Binacchi <dariobin@libero.it>
2021-01-12 10:58:04 +05:30
Praneeth Bajjuri
9c789fec10 arm: dts: k3-j721e: ddr: Update to 0.5.0 version of DDR config tool
Update the ddr settings to use the DDR reg config tool rev 0.5.0.
This enables 4266MTs DDR configuration.

Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
Signed-off-by: Kevin Scholz <k-scholz@ti.com>
2021-01-12 10:21:41 +05:30
Aswath Govindraju
62be2367f5 arm: dts: am654-base-board-uboot: Add aliases for USB subsystems
The sequence number assigned for USB subsystem in a uclass is dependent on
the order of occurrence in the device tree. If the dr_mode of USB3SS0
controller is varied then the sequence number of USB3SS1 controller also
changes. If aliases are added then sequence numbers are assigned using the
alias number. This makes the sequence number of USB3SS1 controller
independent of USB3SS0 controller's dr_mode.

Therefore, add aliases to fix the sequence number assigned to the USB
subsystems.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2021-01-12 10:21:40 +05:30
Aswath Govindraju
d3af9e3772 arm: dts: am654-base-board-uboot: Set USB0 dr_mode to host
USB3SS0 controller is to be used as a host in U-boot. Fix it by changing
the dr_mode to host.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2021-01-12 10:21:40 +05:30
Tom Rini
d71be19902 Merge branch 'next'
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-01-11 13:55:03 -05:00
Hugh Cole-Baker
92cb207af1 rockchip: pinebook-pro: default to SPI bus 1 for SPI-flash
SPI flash on this machine is located on bus 1, default to using bus 1
for SPI flash and stop aliasing it to bus 0.

Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
Suggested-by: Simon Glass <sjg@chromium.org>
Fixes: c4cea2bb ("rockchip: Enable building a SPI ROM image on bob")
2021-01-08 08:40:43 -05:00
Tom Rini
bc0b99bd8b Xilinx changes for v2021.04
arm64:
 - DT updates
 
 microblaze:
 - Add support for NOR device support
 
 spi:
 - Fix unaligned data write issue
 
 nand:
 - Minor code change
 
 xilinx:
 - Fru fix in limit calculation
 - Fill git repo link for all Xilinx boards
 
 video:
 - Add support for seps525 spi display
 
 tools:
 - Minor Vitis file support
 
 cmd/common
 - Minor code indentation fixes
 
 serial:
 - Uartlite debug uart initialization fix
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Merge tag 'xilinx-for-v2021.04' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into next

Xilinx changes for v2021.04

arm64:
- DT updates

microblaze:
- Add support for NOR device support

spi:
- Fix unaligned data write issue

nand:
- Minor code change

xilinx:
- Fru fix in limit calculation
- Fill git repo link for all Xilinx boards

video:
- Add support for seps525 spi display

tools:
- Minor Vitis file support

cmd/common
- Minor code indentation fixes

serial:
- Uartlite debug uart initialization fix
2021-01-06 07:57:33 -05:00
Marek Vasut
ec4efd5ae7 ARM: dts: stm32: Fix GPIO hog flags on DHCOM DRC02
The GPIO hog flags are ignored by gpiolib-of.c now, set the flags to 0.
Since GPIO_ACTIVE_HIGH is defined as 0, this change only increases the
correctness of the DT.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-01-06 11:01:31 +01:00
Marek Vasut
1a6de002e5 ARM: dts: stm32: Fix GPIO hog flags on DHCOM PicoITX
The GPIO hog flags are ignored by gpiolib-of.c now, set the flags to 0.
Due to a change in gpiolib-of.c, setting flags to GPIO_ACTIVE_LOW and
using output-low DT property leads to the GPIO being set high instead.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-01-06 11:01:31 +01:00
Tom Rini
b11f634b1c Driver model: make some udevice fields private
Driver model: Rename U_BOOT_DEVICE et al.
 dtoc: Tidy up and add more tests
 ns16550 code clean-up
 x86 and sandbox minor fixes for of-platdata
 dtoc prepration for adding build-time instantiation
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Merge tag 'dm-pull-5jan21' of git://git.denx.de/u-boot-dm into next

Driver model: make some udevice fields private
Driver model: Rename U_BOOT_DEVICE et al.
dtoc: Tidy up and add more tests
ns16550 code clean-up
x86 and sandbox minor fixes for of-platdata
dtoc prepration for adding build-time instantiation
2021-01-05 22:34:43 -05:00
Tom Rini
720620e691 Prepare v2021.01-rc5
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Merge tag 'v2021.01-rc5' into next

Prepare v2021.01-rc5

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-01-05 16:20:26 -05:00
Simon Glass
65e25bea59 dm: Rename DM_GET_DRIVER() to DM_DRIVER_GET()
In the spirit of using the same base name for all of these related macros,
rename this to have the operation at the end. This is not widely used so
the impact is fairly small.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:26:35 -07:00
Simon Glass
20e442ab2d dm: Rename U_BOOT_DEVICE() to U_BOOT_DRVINFO()
The current macro is a misnomer since it does not declare a device
directly. Instead, it declares driver_info record which U-Boot uses at
runtime to create a device.

The distinction seems somewhat minor most of the time, but is becomes
quite confusing when we actually want to declare a device, with
of-platdata. We are left trying to distinguish between a device which
isn't actually device, and a device that is (perhaps an 'instance'?)

It seems better to rename this macro to describe what it actually is. The
macros is not widely used, since boards should use devicetree to declare
devices.

Rename it to U_BOOT_DRVINFO(), which indicates clearly that this is
declaring a new driver_info record, not a device.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:26:35 -07:00
Simon Glass
f10643cf8a dm: core: Access device ofnode through functions
At present ofnode is present in the device even if it is never used. With
of-platdata this field is not used, so can be removed. In preparation for
this, change the access to go through inline functions.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
e7144b07e4 x86: Drop rtc from SPL
The RTC is not currently used in SPL. Drop it so that it does not take up
space.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
a59f3d230e x86: coral: Remove unwanted nodes from SPL/TPL
Some devices are not needed in SPL/TPL. For TPL this causes the
generation of unnecessary of-platadata structs. Make some adjustments to
fix this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
21303d1de7 x86: apl: Adjust how the UART gets its platform data
At present this driver calls malloc() to start a new platform data
structure, fills it in and tells driver model to use it.

We want to avoid malloc, particularly with the new version of of-platdata.
Create a new struct which encompasses both the dtd struct and the ns16550
one, to avoid this. Unfortunately we must copy the data into the right
place for the ns16550 driver. Add some comments about this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
6a2350f8c9 x86: sysreset: Move priv/plat structs to headers
With the new of-platdata, these need to be available to dt_platdata.c
so must be in header files. Move them and add the dtd struct too.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2021-01-05 12:24:41 -07:00
Simon Glass
332b98660f x86: apl: Use struct spi_nor instead of struct spi_flash
This construct effectively uses struct spi_nor due to a #define in
spi-nor.h so we may as well use that struct here. This allows dtoc to
parse it correctly.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
f6257f7914 x86: Move priv/plat structs for intel_common to headers
With the new of-platdata, these need to be available to dt_platdata.c
so must be in header files. Move them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
366c4eb4b5 x86: apl: Move priv/plat structs to headers
With the new of-platdata, these need to be available to dt_platdata.c
so must be in header files. Move them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
370746ada7 sandbox: Update dts files to reduce SPL size
At present there are require a few devices in the devicetree which are
not actually used in SPL. This will cause problems with the new
of-platdata, since it will try to instantiate devices which are not
compiled into U-Boot.

Update the devicetree to remove these devices from SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
f05a7c5ba4 sandbox: i2c: Move priv into a header file
Move this struct into a header file so that dtoc can include it in its
dt-platdata.c file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
bfae6cc48a sandbox: serial: Move priv into a header file
Move this struct into a header file so that dtoc can include it in its
dt-platdata.c file.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2021-01-05 12:24:41 -07:00
Patrick Delaunay
10bb90fa30 sandbox: remove ram buffer file when U-Boot is loaded by SPL
Update management of "--rm_memory" sandbox's option and force
this option when U-Boot is loaded by SPL in os_spl_to_uboot()
and remove the ram file after reading in main() as described
in option help message: "Remove memory file after reading".

This patch avoids that the file "/tmp/u-boot.mem.XXXXXX" [created in
os_jump_to_file() when U-Boot is loaded by SPL] is never deleted
because state_uninit() is not called after U-Boot execution
(CtrlC or with running pytest for example).

This issue is reproduced by
> build-sandbox_spl/spl/u-boot-spl
  and CtrlC in U-Bot console

> make qcheck

One temp file is created after each SPL and U-Boot execution
(7 tims in qcheck after test_handoff.py, test_ofplatdata.py,
 test_spl.py execution).

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
941e6304f4 x86: Fix header guard in asm/pmu.h
This has the wrong name. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
cee58bd2ad x86: tpl: Remove unwanted devicetree string
Update this driver to use of_match_ptr().

This reduces the TPL binary size by about 32 bytes.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
8b842be10c x86: apl: Reduce size for TPL
Update various drivers to use of_match_ptr() and to avoid including debug
strings in TPL. Omit the WiFi driver entirely, since it is not used in
TPL.

This reduces the TPL binary size by about 608 bytes.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
5e89be1efd x86: apl: Update hostbridge to remove unwanted TPL code
At present several strings from this file appear in the TPL binary. Add
preprocessor checks to drop them.

This reduces the TPL binary size by about 128 bytes.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
1d2b8585f6 x86: coral: Move fsp-m settings to a subnode
At present these settings are in the node for host-bridge and so are
visible in TPL as well as SPL. But they are only used for SPL.

Move them to a subnode so that TPL does not included them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
7dc82591d6 x86: Move call64 into its own section
When this code is not used (e.g. by TPL) we want it to be excluded from
the image. Put it in its own section so that this happens.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
52d2e9c142 x86: apl: Use const for driver operations
Update these declarations to const to ensure that the data ends up in the
rodata section.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
477a6bcb3b arc: m68k: nds32: nios2: sh: xtensa: Add empty spl.h header
At present it is not possible to include spl.h in on these architectures
since the asm/spl.h file is not present. We want to be able to use the
spl_phase() function, so add empty headers to make things build.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:40 -07:00
Simon Glass
0fd3d91152 dm: Use access methods for dev/uclass private data
Most drivers use these access methods but a few do not. Update them.

In some cases the access is not permitted, so mark those with a FIXME tag
for the maintainer to check.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Pratyush Yadav <p.yadav@ti.com>
2021-01-05 12:24:40 -07:00
Simon Glass
c238eeebc9 x86: apl: Drop support for !OF_PLATDATA_PARENT
This code was kept around after of-platdata started supporting parent
devices. That feature seems stable now, so let's drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:40 -07:00
Simon Glass
38d6b7ebda spl: Drop bd_info in the data section
This uses up space in the SPL binary but it always starts as zero. Also
some boards cannot support data in TPL (e.g. Intel Apollo Lake).

Use malloc() to allocate this structure instead, by moving the init a
little later, after malloc() is inited. Make this function optional since
it pulls in malloc().

This reduces the TPL binary size on coral by about 64 bytes

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:40 -07:00
Simon Glass
acfb5308f5 sandbox: Drop unnecessary test node
The spl-test4 node deliberately has an invalid compatible string. This
causes a warning from dtoc and the check it does is not really necessary.
Drop it, to avoid the warning and associated confusion.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:40 -07:00
Simon Glass
2d6bf754ce serial: Rename ns16550 functions to lower case
Lower case should be used for function names. Update this driver and its
callers accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>

Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2021-01-05 12:24:40 -07:00
Simon Glass
d30c7209df serial: Update NS16550_t and struct NS16550
Typedefs should not be used in U-Boot and structs should be lower case.
Update the code to use struct ns16550 consistently.

Put a header guard on the file while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>

Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2021-01-05 12:24:40 -07:00
Harini Katakam
0e3a7aa7a9 arm64: zynqmp: Add Ethernet node for zcu1285 revA
This patch add ethernet node gem1 to zcu1285 RevB.
GMII to RGMII converter sits between MAC and external
phy connected over GMII to MAC and RGMMI to external phy

Signed-off-by: Harini Katakam <harini.katakam@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-01-05 11:54:53 +01:00
Siva Durga Prasad Paladugu
59fbd5c1f8 arm64: zynqmp: Add ethernet node for zcu1275 revB
This patch add ethernet node gem1 to zcu1275 RevB.
GMII to RGMII converter sits between MAC and external
phy connected over GMII to MAC and RGMMI to external phy.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-01-05 11:54:44 +01:00
Michal Simek
2d381d2fe2 arm64: zynqmp: Sync DT with Linux kernel
All changes are recorded in lore.kernel.org. Here are links to that patches
for the record.
Link: https://lore.kernel.org/r/f59a63d8cb941592de6d2dee8afa6f120b2e40c8.1601379794.git.michal.simek@xilinx.com
Link: https://lore.kernel.org/r/68f20a2b2bb0feee80bc3348619c2ee98aa69963.1598263539.git.michal.simek@xilinx.com
Link: https://lore.kernel.org/r/f767fe007e446a2299fda9905e75b723c650a424.1605021644.git.michal.simek@xilinx.com
Link: https://lore.kernel.org/r/cc294ae1a79ef845af6809ddb4049f0c0f5bb87a.1598259551.git.michal.simek@xilinx.com
Link: https://lore.kernel.org/r/20200629081744.13916-1-krzk@kernel.org

And there are other minor changes (just moving things around).

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-01-04 10:51:27 +01:00
Sughosh Ganu
ab201a116f fsp: Move and rename fsp_types.h file
The fsp_types.h header file contains macros for building signatures of
different widths. These signature macros are architecture agnostic,
and can be used in all places which use signatures in a data
structure. Move and rename the fsp_types.h under the common include
header.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-12-31 14:41:31 +01:00
Sughosh Ganu
e1ee06dde7 qemu: arm: Initialise virtio devices in board_late_init
On the qemu arm platform, the virtio devices are initialised in the
board_init function, which gets called before the initr_pci. With
this sequence, the virtio block devices on the pci bus are not
initialised. Move the initialisation of the virtio devices to
board_late_init which gets called after the call to initr_pci.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
2020-12-31 14:41:31 +01:00
Tom Rini
ab865a8ee5 Fixes for 2021.1
----------------
 
 CI: https://gitlab.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/5680
 
 - fixes for Variscite dart6ul
 - imx8mp : increase malloc area
 - fixes for bx50v3
 - imx8m: HS400ES and UHS for EVK
 - imx8qm-rom7720: fix phy bind
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Merge tag 'u-boot-imx-20201227' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

Fixes for 2021.1
----------------

CI: https://gitlab.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/5680

- fixes for Variscite dart6ul
- imx8mp : increase malloc area
- fixes for bx50v3
- imx8m: HS400ES and UHS for EVK
- imx8qm-rom7720: fix phy bind
2020-12-28 07:44:03 -05:00
Stefan Roese
ce040932b5 arm: mvebu: armada-xp-gp.dts: Add spi0 alias
For correct spi bus detection the spi0 alias is needed in the DT.
Otherwise this error will ocurr in U-Boot:

Invalid bus 0 (err=-19)
Failed to initialize SPI flash at 0:0 (error -19)

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Dennis Gilmore <dgilmore@redhat.com>
Tested-by: Dennis Gilmore <dgilmore@redhat.com>
2020-12-28 09:42:06 +01:00
Stefan Roese
33fc6fc105 arm: mvebu: Add armada-xp-gp-u-boot.dtsi for U-Boot properties
Add some missing "u-boot,dm-pre-reloc;" properties to UART0, SPI
controller and SPI NOR flash node to enable usage in SPL. Otherwise
these devices will not be available.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Dennis Gilmore <dgilmore@redhat.com>
Tested-by: Dennis Gilmore <dgilmore@redhat.com>
2020-12-28 09:42:06 +01:00
Heinrich Schuchardt
e6abe163bf imx: mx7: clock: use correct format strings
Use %u and not %d for unsigned values.
Print kHz and not khz.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-12-26 14:56:09 +01:00
Marc Ferland
37648b600c arm: dart6ul: read and print SoM info from eeprom on startup
The dart6ul has an i2c eeprom at 0x50 which contains, among other
things, the manufacturing/revision/options info of the SoM. This patch
replaces the current checkboard() implementation with a more
exhaustive one based on the content of the eeprom.

Since this code uses the new driver model, some changes were also
required in the DTS to make the nodes related to i2c available before
relocation.

This code was inspired from the supported u-boot code from Variscite
which can be found here:

https://github.com/varigit/uboot-imx/tree/imx_v2018.03_4.14.78_1.0.0_ga_var02

New output example:

Board: PN: VSM-6UL-705B, Assy: AS1812142257, Date: 2019 Feb 17
       Storage: eMMC, Wifi: yes, DDR: 1024 MiB, Rev: 2.4G

Signed-off-by: Marc Ferland <ferlandm@amotus.ca>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-12-26 14:56:09 +01:00